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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Oct 2021 18:41:28.5515 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0d251080-2a82-4699-11a4-08d98c1d924c X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM5EUR03FT040.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB7PR08MB2970 Content-Type: text/plain This patch adds missing documentation for few of the functions and fixes few formatting changes. Signed-off-by: Khasim Syed Mohammed --- .../PciHostBridgeLib/PciHostBridgeLib.c | 18 ++++---- .../Library/PlatformLib/PlatformLib.c | 43 ++++++++++++++++--- 2 files changed, 47 insertions(+), 14 deletions(-) diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/PciHostBridgeLib.c b/Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/PciHostBridgeLib.c index 9332939f63..ac88415fd2 100644 --- a/Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/PciHostBridgeLib.c +++ b/Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/PciHostBridgeLib.c @@ -1,10 +1,10 @@ /** @file -* PCI Host Bridge Library instance for ARM Neoverse N1 platform -* -* Copyright (c) 2019 - 2020, ARM Limited. All rights reserved. -* -* SPDX-License-Identifier: BSD-2-Clause-Patent -* + PCI Host Bridge Library instance for ARM Neoverse N1 platform + + Copyright (c) 2019 - 2021, ARM Limited. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + **/ #include @@ -96,7 +96,7 @@ STATIC PCI_ROOT_BRIDGE mPciRootBridge[] = { /** Return all the root bridge instances in an array. - @param Count Return the count of root bridge instances. + @param Count Return the count of root bridge instances. @return All the root bridge instances in an array. The array should be passed into PciHostBridgeFreeRootBridges() @@ -115,8 +115,8 @@ PciHostBridgeGetRootBridges ( /** Free the root bridge instances array returned from PciHostBridgeGetRootBridges(). - @param Bridges The root bridge instances array. - @param Count The count of the array. + @param Bridges The root bridge instances array. + @param Count The count of the array. **/ VOID EFIAPI diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c index f722080e56..d5ec0ff30d 100644 --- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c +++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c @@ -1,9 +1,9 @@ /** @file -* -* Copyright (c) 2018-2020, ARM Limited. All rights reserved. -* -* SPDX-License-Identifier: BSD-2-Clause-Patent -* + + Copyright (c) 2018-2021, ARM Limited. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + **/ #include @@ -17,6 +17,12 @@ STATIC ARM_CORE_INFO mCoreInfoTable[] = { { 0x1, 0x1 } // Cluster 1, Core 1 }; +/** + Return the current Boot Mode. + + This function returns the boot reason on the platform. + +**/ EFI_BOOT_MODE ArmPlatformGetBootMode ( VOID @@ -25,6 +31,15 @@ ArmPlatformGetBootMode ( return BOOT_WITH_FULL_CONFIGURATION; } +/** + Initialize controllers that must be setup in the normal world. + + This function is called by the ArmPlatformPkg/Pei or ArmPlatformPkg/Pei/PlatformPeim + in the PEI phase. + + @param[in] MpId Processor ID + +**/ RETURN_STATUS ArmPlatformInitialize ( IN UINTN MpId @@ -33,6 +48,15 @@ ArmPlatformInitialize ( return RETURN_SUCCESS; } +/** + Populate the Platform core information. + + This function populates the ARM_MP_CORE_INFO_PPI with information about the cores. + + @param[out] CoreCount Number of cores + @param[out] ArmCoreTable Table containing information about the cores + +**/ EFI_STATUS PrePeiCoreGetMpCoreInfo ( OUT UINTN *CoreCount, @@ -56,6 +80,15 @@ EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = { } }; +/** + Return the Platform specific PPIs + + This function exposes the N1Sdp Specific PPIs. + + @param[out] PpiListSize Size in Bytes of the Platform PPI List + @param[out] PpiList Platform PPI List + +**/ VOID ArmPlatformGetPlatformPpiList ( OUT UINTN *PpiListSize, -- 2.17.1