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dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; Received: from SATLEXMB04.amd.com (165.204.84.17) by CO1NAM11FT039.mail.protection.outlook.com (10.13.174.110) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.4608.15 via Frontend Transport; Wed, 13 Oct 2021 16:57:37 +0000 Received: from sbrijesh-desktop.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2308.8; Wed, 13 Oct 2021 11:57:36 -0500 From: "Brijesh Singh" To: CC: James Bottomley , Min Xu , "Jiewen Yao" , Tom Lendacky , "Jordan Justen" , Ard Biesheuvel , Erdem Aktas , "Michael Roth" , Gerd Hoffmann , Brijesh Singh Subject: [PATCH v9 00/32] Add AMD Secure Nested Paging (SEV-SNP) support Date: Wed, 13 Oct 2021 11:56:41 -0500 Message-ID: <20211013165713.727815-1-brijesh.singh@amd.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Return-Path: brijesh.singh@amd.com X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 2c479f37-759c-4520-1860-08d98e6a8fd9 X-MS-TrafficTypeDiagnostic: BN9PR12MB5324: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:9508; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2021 16:57:37.9173 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2c479f37-759c-4520-1860-08d98e6a8fd9 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT039.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN9PR12MB5324 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3275 SEV-SNP builds upon existing SEV and SEV-ES functionality while adding new hardware-based memory protections. SEV-SNP adds strong memory integrity protection to help prevent malicious hypervisor-based attacks like data replay, memory re-mapping and more in order to create an isolated memory encryption environment. =20 This series provides the basic building blocks to support booting the SEV-S= NP VMs, it does not cover all the security enhancement introduced by the SEV-S= NP such as interrupt protection. Many of the integrity guarantees of SEV-SNP are enforced through a new structure called the Reverse Map Table (RMP). Adding a new page to SEV-SNP VM requires a 2-step process. First, the hypervisor assigns a page to the guest using the new RMPUPDATE instruction. This transitions the page to guest-invalid. Second, the guest validates the page using the new PVALIDATE instruction. The SEV-SNP VMs can use the new "Page State Change Request NAE= " defined in the GHCB specification to ask hypervisor to add or remove page from the RMP table. Each page assigned to the SEV-SNP VM can either be validated or unvalidated= , as indicated by the Validated flag in the page's RMP entry. There are two approaches that can be taken for the page validation: Pre-validation and Lazy Validation. Under pre-validation, the pages are validated prior to first use. And under lazy validation, pages are validated when first accessed. An access to a unvalidated page results in a #VC exception, at which time the exception handler may validate the page. Lazy validation requires careful tracking of the validated pages to avoid validating the same GPA more than once. The recently introduced "Unaccepted" memory type can be used to communicate the unvalidated memory ranges to the Guest OS. At this time we only support the pre-validation. OVMF detects all the avail= able system RAM in the PEI phase. When SEV-SNP is enabled, the memory is validat= ed before it is made available to the EDK2 core. Now that series contains all the basic support required to launch SEV-SNP guest. We are still missing the Interrupt security feature provided by the SNP. The feature will be added after the base support is accepted. Additional resources --------------------- SEV-SNP whitepaper https://www.amd.com/system/files/TechDocs/SEV-SNP-strengthening-vm-isolatio= n-with-integrity-protection-and-more.pdf APM 2: https://www.amd.com/system/files/TechDocs/24593.pdf (section 15.36) The complete source is available at https://github.com/AMDESE/ovmf/tree/snp-v9 GHCB spec: https://developer.amd.com/wp-content/resources/56421.pdf SEV-SNP firmware specification: https://www.amd.com/system/files/TechDocs/56860.pdf Changes since v8: * drop the generic metadata and make it specific to SEV. Changes since v7: * Move SEV specific changes in MpLib in AmdSev file * Update the GHCB register function to not restore the GHCB MSR because we were already in the MSR protocol mode. * Drop the SNP name from PcdSnpSecPreValidate. * Add new section for GHCB memory in the OVMF metadata. Change since v6: * Drop the SNP boot block GUID and switch to using the Metadata guided str= ucture proposed by Min in TDX series. * Exclude the GHCB page from the pre-validated region. It simplifies the r= eset vector code where we do not need to unvalidate the GHCB page. * Now that GHCB page is not validated so move the VMPL check from reset ve= ctor code to the MemEncryptSevLib on the first page validation. * Introduce the ConfidentialComputingGuestAttr PCD to communicate which memory encryption is active so that MpInitLib can make use of it. * Drop the SEVES specific PCD as the information can be communicated via the ConfidentialComputingGuestAttr. * Move the SNP specific AP creation function in AmdSev.c. * Define the SNP Blob GUID in a new file. Change since v5: * When possible use the CPUID value from CPUID page * Move the SEV specific functions from SecMain.c in AmdSev.c * Rebase to the latest code * Add the review feedback from Yao. Change since v4: * Use the correct MSR for the SEV_STATUS * Add VMPL-0 check Change since v3: * ResetVector: move all SEV specific code in AmdSev.asm and add macros to = keep the code readable. * Drop extending the EsWorkArea to contain SNP specific state. * Drop the GhcbGpa library and call the VmgExit directly to register GHCB = GPA. * Install the CC blob config table from AmdSevDxe instead of extending the AmdSev/SecretsDxe for it. * Add the separate PCDs for the SNP Secrets. Changes since v2: * Add support for the AP creation. * Use the module-scoping override to make AmdSevDxe use the IO port for PC= I reads. * Use the reserved memory type for CPUID and Secrets page. *=20 Changes since v1: * Drop the interval tree support to detect the pre-validated overlap regio= n. * Use an array to keep track of pre-validated regions. * Add support to query the Hypervisor feature and verify that SNP feature = is supported. * Introduce MemEncryptSevClearMmioPageEncMask() to clear the C-bit from MM= IO ranges. * Pull the SevSecretDxe and SevSecretPei into OVMF package build. * Extend the SevSecretDxe to expose confidential computing blob location t= hrough EFI configuration table. Brijesh Singh (28): OvmfPkg/SecMain: move SEV specific routines in AmdSev.c UefiCpuPkg/MpInitLib: move SEV specific routines in AmdSev.c OvmfPkg/ResetVector: move clearing GHCB in SecMain OvmfPkg/ResetVector: introduce SEV metadata descriptor for VMM use OvmfPkg: reserve SNP secrets page OvmfPkg: reserve CPUID page OvmfPkg/ResetVector: pre-validate the data pages used in SEC phase OvmfPkg/MemEncryptSevLib: add MemEncryptSevSnpEnabled() OvmfPkg/SecMain: register GHCB gpa for the SEV-SNP guest OvmfPkg/PlatformPei: register GHCB gpa for the SEV-SNP guest OvmfPkg/AmdSevDxe: do not use extended PCI config space OvmfPkg/MemEncryptSevLib: add support to validate system RAM OvmfPkg/MemEncryptSevLib: add function to check the VMPL0 OvmfPkg/BaseMemEncryptSevLib: skip the pre-validated system RAM OvmfPkg/MemEncryptSevLib: add support to validate > 4GB memory in PEI phase OvmfPkg/SecMain: validate the memory used for decompressing Fv OvmfPkg/PlatformPei: validate the system RAM when SNP is active UefiCpuPkg: Define ConfidentialComputingGuestAttr OvmfPkg/PlatformPei: set PcdConfidentialComputingAttr when SEV is active UefiCpuPkg/MpInitLib: use PcdConfidentialComputingAttr to check SEV status UefiCpuPkg: add PcdGhcbHypervisorFeatures OvmfPkg/PlatformPei: set the Hypervisor Features PCD MdePkg/GHCB: increase the GHCB protocol max version UefiCpuPkg/MpLib: add support to register GHCB GPA when SEV-SNP is enabled OvmfPkg/MemEncryptSevLib: change the page state in the RMP table OvmfPkg/MemEncryptSevLib: skip page state change for Mmio address OvmfPkg/PlatformPei: mark cpuid and secrets memory reserved in EFI map OvmfPkg/AmdSev: expose the SNP reserved pages through configuration table Michael Roth (3): OvmfPkg/ResetVector: use SEV-SNP-validated CPUID values OvmfPkg/VmgExitLib: use SEV-SNP-validated CPUID values UefiCpuPkg/MpInitLib: use BSP to do extended topology check Tom Lendacky (1): UefiCpuPkg/MpInitLib: Use SEV-SNP AP Creation NAE event to launch APs OvmfPkg/OvmfPkg.dec | 18 + UefiCpuPkg/UefiCpuPkg.dec | 9 + OvmfPkg/AmdSev/AmdSevX64.dsc | 5 +- OvmfPkg/Bhyve/BhyveX64.dsc | 5 +- OvmfPkg/OvmfPkgIa32.dsc | 1 + OvmfPkg/OvmfPkgIa32X64.dsc | 6 +- OvmfPkg/OvmfPkgX64.dsc | 5 +- OvmfPkg/OvmfXen.dsc | 5 +- OvmfPkg/OvmfPkgX64.fdf | 6 + OvmfPkg/AmdSevDxe/AmdSevDxe.inf | 7 + .../DxeMemEncryptSevLib.inf | 3 + .../PeiMemEncryptSevLib.inf | 7 + .../SecMemEncryptSevLib.inf | 3 + OvmfPkg/Library/VmgExitLib/SecVmgExitLib.inf | 2 + OvmfPkg/Library/VmgExitLib/VmgExitLib.inf | 3 + OvmfPkg/PlatformPei/PlatformPei.inf | 8 + OvmfPkg/ResetVector/ResetVector.inf | 5 + OvmfPkg/Sec/SecMain.inf | 4 + UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf | 6 +- UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf | 6 +- MdePkg/Include/Register/Amd/Ghcb.h | 2 +- .../Guid/ConfidentialComputingSevSnpBlob.h | 33 ++ OvmfPkg/Include/Library/MemEncryptSevLib.h | 26 + .../X64/SnpPageStateChange.h | 36 ++ .../BaseMemEncryptSevLib/X64/VirtualMemory.h | 19 + OvmfPkg/PlatformPei/Platform.h | 5 + OvmfPkg/Sec/AmdSev.h | 95 ++++ .../Include/ConfidentialComputingGuestAttr.h | 25 + UefiCpuPkg/Library/MpInitLib/MpLib.h | 93 ++++ OvmfPkg/AmdSevDxe/AmdSevDxe.c | 23 + .../DxeMemEncryptSevLibInternal.c | 27 ++ .../Ia32/MemEncryptSevLib.c | 17 + .../PeiMemEncryptSevLibInternal.c | 27 ++ .../SecMemEncryptSevLibInternal.c | 19 + .../X64/DxeSnpSystemRamValidate.c | 40 ++ .../X64/PeiDxeVirtualMemory.c | 167 ++++++- .../X64/PeiSnpSystemRamValidate.c | 127 +++++ .../X64/SecSnpSystemRamValidate.c | 82 ++++ .../X64/SnpPageStateChangeInternal.c | 294 ++++++++++++ OvmfPkg/Library/VmgExitLib/VmgExitVcHandler.c | 444 ++++++++++++++++-- OvmfPkg/PlatformPei/AmdSev.c | 235 +++++++++ OvmfPkg/PlatformPei/MemDetect.c | 2 + OvmfPkg/Sec/AmdSev.c | 299 ++++++++++++ OvmfPkg/Sec/SecMain.c | 158 +------ UefiCpuPkg/Library/MpInitLib/AmdSev.c | 239 ++++++++++ UefiCpuPkg/Library/MpInitLib/DxeMpLib.c | 16 +- UefiCpuPkg/Library/MpInitLib/Ia32/AmdSev.c | 70 +++ UefiCpuPkg/Library/MpInitLib/MpLib.c | 338 ++++--------- UefiCpuPkg/Library/MpInitLib/PeiMpLib.c | 4 +- UefiCpuPkg/Library/MpInitLib/X64/AmdSev.c | 261 ++++++++++ OvmfPkg/FvmainCompactScratchEnd.fdf.inc | 5 + OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm | 17 + OvmfPkg/ResetVector/Ia32/AmdSev.asm | 86 +++- OvmfPkg/ResetVector/ResetVector.nasmb | 18 + OvmfPkg/ResetVector/X64/OvmfSevMetadata.asm | 74 +++ UefiCpuPkg/Library/MpInitLib/MpEqu.inc | 2 + UefiCpuPkg/Library/MpInitLib/X64/AmdSev.nasm | 200 ++++++++ UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm | 100 +--- 58 files changed, 3311 insertions(+), 528 deletions(-) create mode 100644 OvmfPkg/Include/Guid/ConfidentialComputingSevSnpBlob.h create mode 100644 OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateCh= ange.h create mode 100644 OvmfPkg/Sec/AmdSev.h create mode 100644 UefiCpuPkg/Include/ConfidentialComputingGuestAttr.h create mode 100644 OvmfPkg/Library/BaseMemEncryptSevLib/X64/DxeSnpSystemRa= mValidate.c create mode 100644 OvmfPkg/Library/BaseMemEncryptSevLib/X64/PeiSnpSystemRa= mValidate.c create mode 100644 OvmfPkg/Library/BaseMemEncryptSevLib/X64/SecSnpSystemRa= mValidate.c create mode 100644 OvmfPkg/Library/BaseMemEncryptSevLib/X64/SnpPageStateCh= angeInternal.c create mode 100644 OvmfPkg/Sec/AmdSev.c create mode 100644 UefiCpuPkg/Library/MpInitLib/AmdSev.c create mode 100644 UefiCpuPkg/Library/MpInitLib/Ia32/AmdSev.c create mode 100644 UefiCpuPkg/Library/MpInitLib/X64/AmdSev.c create mode 100644 OvmfPkg/ResetVector/X64/OvmfSevMetadata.asm create mode 100644 UefiCpuPkg/Library/MpInitLib/X64/AmdSev.nasm --=20 2.25.1