From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mx.groups.io with SMTP id smtpd.web08.7023.1634203069770685282 for ; Thu, 14 Oct 2021 02:17:57 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.88, mailfrom: chasel.chiu@intel.com) X-IronPort-AV: E=McAfee;i="6200,9189,10136"; a="251071805" X-IronPort-AV: E=Sophos;i="5.85,372,1624345200"; d="scan'208";a="251071805" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Oct 2021 02:17:56 -0700 X-IronPort-AV: E=Sophos;i="5.85,372,1624345200"; d="scan'208";a="491871840" Received: from cchiu4-mobl.gar.corp.intel.com ([10.252.188.134]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Oct 2021 02:17:54 -0700 From: "Chiu, Chasel" To: devel@edk2.groups.io Cc: Chasel Chiu , Nate DeSimone Subject: [edk2-platforms: PATCH v5 7/9] WhiskeylakeOpenBoardPkg: Use same variable name for FspNvsHob. Date: Thu, 14 Oct 2021 17:16:20 +0800 Message-Id: <20211014091622.2168-8-chasel.chiu@intel.com> X-Mailer: git-send-email 2.28.0.windows.1 In-Reply-To: <20211014091622.2168-1-chasel.chiu@intel.com> References: <20211014091622.2168-1-chasel.chiu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3678 To simplify the implementation the variable Name/GUID has been changed to "FspNvsBuffer" and gFspNvsBufferVariableGuid regardless it stores the data from FSP_NON_VOLATILE_STORAGE_HOB2 or FSP_NON_VOLATILE_STORAGE_HOB. Cc: Nate DeSimone Signed-off-by: Chasel Chiu Reviewed-by: Nate DeSimone --- Platform/Intel/WhiskeylakeOpenBoardPkg/FspWrapper/Library/PeiSiliconPolicy= UpdateLibFsp/PeiFspMiscUpdUpdateLib.c | 63 ++++++++++++---= ------------------------------------------------ Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Library/PeiSili= conPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c | 63 ++++++++++++---= ------------------------------------------------ Platform/Intel/WhiskeylakeOpenBoardPkg/FspWrapper/Library/PeiSiliconPolicy= UpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf | 5 ++--- Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Library/PeiSili= conPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf | 4 ++-- Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMapInclud= e.fdf | 18 +++++++++------= --- 5 files changed, 37 insertions(+), 116 deletions(-) diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/FspWrapper/Library/PeiS= iliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c b/Platform/Intel/Whiskeyl= akeOpenBoardPkg/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscU= pdUpdateLib.c index a341a58930..ab35bc3f8f 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/FspWrapper/Library/PeiSiliconP= olicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/FspWrapper/Library/PeiSiliconP= olicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c @@ -2,7 +2,7 @@ Implementation of Fsp Misc UPD Initialization.=0D =0D =0D - Copyright (c) 2019, Intel Corporation. All rights reserved.
=0D + Copyright (c) 2019 - 2021, Intel Corporation. All rights reserved.
=0D SPDX-License-Identifier: BSD-2-Clause-Patent=0D **/=0D =0D @@ -17,11 +17,9 @@ #include =0D #include =0D =0D -#include =0D #include =0D #include =0D #include =0D -#include =0D #include =0D #include =0D =0D @@ -44,55 +42,18 @@ PeiFspMiscUpdUpdatePreMem ( )=0D {=0D EFI_STATUS Status;=0D - EFI_PEI_READ_ONLY_VARIABLE2_PPI *VariableServices;=0D - UINTN VariableSize;=0D - VOID *MemorySavedData;=0D -=0D - Status =3D PeiServicesLocatePpi (=0D - &gEfiPeiReadOnlyVariable2PpiGuid,=0D - 0,=0D - NULL,=0D - (VOID **) &VariableServices=0D - );=0D - if (EFI_ERROR (Status)) {=0D - ASSERT_EFI_ERROR (Status);=0D - return Status;=0D - }=0D -=0D - VariableSize =3D 0;=0D - MemorySavedData =3D NULL;=0D - Status =3D VariableServices->GetVariable (=0D - VariableServices,=0D - L"MemoryConfig",=0D - &gFspNonVolatileStorageHobGuid,=0D - NULL,=0D - &VariableSize,=0D - MemorySavedData=0D - );=0D - if (Status =3D=3D EFI_BUFFER_TOO_SMALL) {=0D - MemorySavedData =3D AllocatePool (VariableSize);=0D - if (MemorySavedData =3D=3D NULL) {=0D - ASSERT (MemorySavedData !=3D NULL);=0D - return EFI_OUT_OF_RESOURCES;=0D - }=0D -=0D - DEBUG ((DEBUG_INFO, "VariableSize is 0x%x\n", VariableSize));=0D - Status =3D VariableServices->GetVariable (=0D - VariableServices,=0D - L"MemoryConfig",=0D - &gFspNonVolatileStorageHobGuid,=0D - NULL,=0D - &VariableSize,=0D - MemorySavedData=0D - );=0D - if (Status =3D=3D EFI_SUCCESS) {=0D - FspmUpd->FspmArchUpd.NvsBufferPtr =3D MemorySavedData;=0D - } else {=0D - DEBUG ((DEBUG_ERROR, "Fail to retrieve Variable:\"MemoryConfig\" gMe= moryConfigVariableGuid, Status =3D %r\n", Status));=0D - ASSERT_EFI_ERROR (Status);=0D - }=0D + UINTN FspNvsBufferSize;=0D + VOID *FspNvsBufferPtr;=0D +=0D + FspNvsBufferPtr =3D NULL;=0D + FspNvsBufferSize =3D 0;=0D + Status =3D PeiGetLargeVariable (L"FspNvsBuffer", &gFspNvsBufferVariableG= uid, &FspNvsBufferPtr, &FspNvsBufferSize);=0D + if (Status =3D=3D EFI_SUCCESS) {=0D + FspmUpd->FspmArchUpd.NvsBufferPtr =3D FspNvsBufferPtr;=0D + } else {=0D + DEBUG ((DEBUG_INFO, "Cannot create FSP NVS Buffer, UEFI variable does = not exist (this is likely a first boot)\n"));=0D + FspmUpd->FspmArchUpd.NvsBufferPtr =3D NULL;=0D }=0D - FspmUpd->FspmArchUpd.NvsBufferPtr =3D MemorySavedData;=0D =0D return EFI_SUCCESS;=0D }=0D diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Lib= rary/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c b/Platform/Intel= /WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Library/PeiSiliconPolicyUpdate= LibFsp/PeiFspMiscUpdUpdateLib.c index 145deb5de3..381ef232ea 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Library/Pe= iSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Library/Pe= iSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c @@ -2,7 +2,7 @@ Implementation of Fsp Misc UPD Initialization.=0D =0D =0D - Copyright (c) 2020, Intel Corporation. All rights reserved.
=0D + Copyright (c) 2020 - 2021, Intel Corporation. All rights reserved.
=0D SPDX-License-Identifier: BSD-2-Clause-Patent=0D **/=0D =0D @@ -18,11 +18,9 @@ #include =0D #include =0D =0D -#include =0D #include =0D #include =0D #include =0D -#include =0D #include =0D #include =0D #include =0D @@ -46,54 +44,17 @@ PeiFspMiscUpdUpdatePreMem ( )=0D {=0D EFI_STATUS Status;=0D - EFI_PEI_READ_ONLY_VARIABLE2_PPI *VariableServices;=0D - UINTN VariableSize;=0D - VOID *MemorySavedData;=0D -=0D - Status =3D PeiServicesLocatePpi (=0D - &gEfiPeiReadOnlyVariable2PpiGuid,=0D - 0,=0D - NULL,=0D - (VOID **) &VariableServices=0D - );=0D - if (EFI_ERROR (Status)) {=0D - ASSERT_EFI_ERROR (Status);=0D - return Status;=0D - }=0D -=0D - VariableSize =3D 0;=0D - MemorySavedData =3D NULL;=0D - Status =3D VariableServices->GetVariable (=0D - VariableServices,=0D - L"MemoryConfig",=0D - &gFspNonVolatileStorageHobGuid,=0D - NULL,=0D - &VariableSize,=0D - MemorySavedData=0D - );=0D - if (Status =3D=3D EFI_BUFFER_TOO_SMALL) {=0D - MemorySavedData =3D AllocatePool (VariableSize);=0D - if (MemorySavedData =3D=3D NULL) {=0D - ASSERT (MemorySavedData !=3D NULL);=0D - return EFI_OUT_OF_RESOURCES;=0D - }=0D -=0D - DEBUG ((DEBUG_INFO, "VariableSize is 0x%x\n", VariableSize));=0D - Status =3D VariableServices->GetVariable (=0D - VariableServices,=0D - L"MemoryConfig",=0D - &gFspNonVolatileStorageHobGuid,=0D - NULL,=0D - &VariableSize,=0D - MemorySavedData=0D - );=0D - if (Status =3D=3D EFI_SUCCESS) {=0D - FspmUpd->FspmArchUpd.NvsBufferPtr =3D MemorySavedData;=0D - } else {=0D - FspmUpd->FspmArchUpd.NvsBufferPtr =3D NULL;=0D - DEBUG ((DEBUG_ERROR, "Fail to retrieve Variable:\"MemoryConfig\" gMe= moryConfigVariableGuid, Status =3D %r\n", Status));=0D - ASSERT_EFI_ERROR (Status);=0D - }=0D + UINTN FspNvsBufferSize;=0D + VOID *FspNvsBufferPtr;=0D +=0D + FspNvsBufferPtr =3D NULL;=0D + FspNvsBufferSize =3D 0;=0D + Status =3D PeiGetLargeVariable (L"FspNvsBuffer", &gFspNvsBufferVariableG= uid, &FspNvsBufferPtr, &FspNvsBufferSize);=0D + if (Status =3D=3D EFI_SUCCESS) {=0D + FspmUpd->FspmArchUpd.NvsBufferPtr =3D FspNvsBufferPtr;=0D + } else {=0D + DEBUG ((DEBUG_INFO, "Cannot create FSP NVS Buffer, UEFI variable does = not exist (this is likely a first boot)\n"));=0D + FspmUpd->FspmArchUpd.NvsBufferPtr =3D NULL;=0D }=0D =0D FspmUpd->FspmConfig.TsegSize =3D FixedPcdGet32 (PcdTsegSize= );=0D diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/FspWrapper/Library/PeiS= iliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf b/Platform/Intel/= WhiskeylakeOpenBoardPkg/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/Pei= SiliconPolicyUpdateLibFsp.inf index 2c90d0cb94..362dc2c995 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/FspWrapper/Library/PeiSiliconP= olicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/FspWrapper/Library/PeiSiliconP= olicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf @@ -2,7 +2,7 @@ # Provide FSP wrapper platform related function.=0D #=0D #=0D -# Copyright (c) 2019 - 2020 Intel Corporation. All rights reserved.
=0D +# Copyright (c) 2019 - 2021 Intel Corporation. All rights reserved.
=0D #=0D # SPDX-License-Identifier: BSD-2-Clause-Patent=0D #=0D @@ -82,7 +82,6 @@ PchInfoLib=0D PchHsioLib=0D PchPcieRpLib=0D - MemoryAllocationLib=0D DebugPrintErrorLevelLib=0D SiPolicyLib=0D PchGbeLib=0D @@ -132,7 +131,7 @@ gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdMrcSpdAddressTable3=0D =0D [Guids]=0D - gFspNonVolatileStorageHobGuid ## CONSUMES=0D + gFspNvsBufferVariableGuid ## CONSUMES=0D gTianoLogoGuid ## CONSUMES=0D gEfiMemoryOverwriteControlDataGuid=0D =0D diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Lib= rary/PeiSiliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf b/Platfo= rm/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Library/PeiSiliconPoli= cyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf index 529c2f1253..1a664b1327 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Library/Pe= iSiliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Library/Pe= iSiliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf @@ -2,7 +2,7 @@ # FSP silicon policy updates for the Up Xtreme board.=0D #=0D #=0D -# Copyright (c) 2020, Intel Corporation. All rights reserved.
=0D +# Copyright (c) 2020 - 2021, Intel Corporation. All rights reserved.
= =0D #=0D # SPDX-License-Identifier: BSD-2-Clause-Patent=0D #=0D @@ -136,7 +136,7 @@ gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdBoardBomId=0D =0D [Guids]=0D - gFspNonVolatileStorageHobGuid ## CONSUMES=0D + gFspNvsBufferVariableGuid ## CONSUMES=0D gTianoLogoGuid ## CONSUMES=0D gEfiMemoryOverwriteControlDataGuid=0D =0D diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/Fl= ashMapInclude.fdf b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include= /Fdf/FlashMapInclude.fdf index f7aa730ae7..698efce248 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMapI= nclude.fdf +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Include/Fdf/FlashMapI= nclude.fdf @@ -2,7 +2,7 @@ # Flash map for the UpXtreme Board.=0D #=0D #=0D -# Copyright (c) 2020, Intel Corporation. All rights reserved.
=0D +# Copyright (c) 2020 - 2021, Intel Corporation. All rights reserved.
= =0D #=0D # SPDX-License-Identifier: BSD-2-Clause-Patent=0D #=0D @@ -35,16 +35,16 @@ SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize = =3D 0x00090000 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset =3D 0x= 00190000 # Flash addr (0xFFAE0000)=0D SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize =3D 0x= 00190000 #=0D SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset =3D 0x= 00320000 # Flash addr (0xFFC70000)=0D -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize =3D 0x= 00170000 #=0D -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset =3D 0x= 00490000 # Flash addr (0xFFDE0000)=0D +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize =3D 0x= 00160000 #=0D +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset =3D 0x= 00480000 # Flash addr (0xFFDD0000)=0D SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize =3D 0x= 00070000 #=0D -SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset =3D 0x= 00500000 # Flash addr (0xFFE50000)=0D +SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset =3D 0x= 004F0000 # Flash addr (0xFFE40000)=0D SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize =3D 0x= 00050000 #=0D -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset =3D 0x= 00550000 # Flash addr (0xFFEA0000)=0D +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset =3D 0x= 00540000 # Flash addr (0xFFE90000)=0D SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize =3D 0x= 000EA000 #=0D -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset =3D 0x= 0063A000 # Flash addr (0xFFF8A000)=0D +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset =3D 0x= 0062A000 # Flash addr (0xFFF7A000)=0D SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize =3D 0x= 00006000 #=0D -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemoryOffset =3D 0x= 00640000 # Flash addr (0xFFF90000)=0D +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemoryOffset =3D 0x= 00630000 # Flash addr (0xFFF80000)=0D SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemorySize =3D 0x= 00010000 #=0D -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset =3D 0x= 00650000 # Flash addr (0xFFFA0000)=0D -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize =3D 0x= 00060000 #=0D +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset =3D 0x= 00640000 # Flash addr (0xFFF90000)=0D +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize =3D 0x= 00070000 #=0D --=20 2.28.0.windows.1