From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0b-002e3701.pphosted.com (mx0b-002e3701.pphosted.com [148.163.143.35]) by mx.groups.io with SMTP id smtpd.web12.6697.1634286675981199508 for ; Fri, 15 Oct 2021 01:31:18 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@hpe.com header.s=pps0720 header.b=NLIe7+0N; spf=temperror, err=temporary DNS error (domain: hpe.com, ip: 148.163.143.35, mailfrom: prvs=0922d4c8eb=abner.chang@hpe.com) Received: from pps.filterd (m0150244.ppops.net [127.0.0.1]) by mx0b-002e3701.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 19EKfh9b030918; Fri, 15 Oct 2021 08:31:15 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=hpe.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version; s=pps0720; bh=YVcdYyg5KUjB+8gbCbfhlMLThZWFhkdbHius0Zq8qQY=; b=NLIe7+0NEck7/+VW5Vxnwg3SYKWFOBpELYDeKwfYN8SFD1HUo64bwYJsEpTrW319tN// c7ydeiqc84DG05yJGvZxKQNpL9bpEyg3IsBgdACo8U7+wGazMAZ92VtJyq4/96ntgRuw uG59xf+rP7KGcyhEQr5NqUNkdI+uVDXvWlFQMs07uuIlfQmJLuacp93W/udzSoXkEmwt vpw77TtwpGL1bMJucr5wCOSeODKMB/IQ69D71YRZ0Oxpj4/YziPybyA7YhQGAkLJZQfZ WoId4Jp3rUNJAB1wruHGJY1Pruu+WMSFy6/wmCBuGyvGMXyNHvMRCWeTcCfcLE+TlNfx mA== Received: from g9t5009.houston.hpe.com (g9t5009.houston.hpe.com [15.241.48.73]) by mx0b-002e3701.pphosted.com with ESMTP id 3bprhmntrs-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 15 Oct 2021 08:31:15 +0000 Received: from g9t2301.houston.hpecorp.net (g9t2301.houston.hpecorp.net [16.220.97.129]) by g9t5009.houston.hpe.com (Postfix) with ESMTP id 59B4C5B; Fri, 15 Oct 2021 08:31:14 +0000 (UTC) Received: from abner-virtual-machine.asiapacific.hpqcorp.net (abner-virtual-machine.asiapacific.hpqcorp.net [15.119.210.153]) by g9t2301.houston.hpecorp.net (Postfix) with ESMTP id E78444F; Fri, 15 Oct 2021 08:31:12 +0000 (UTC) From: "Abner Chang" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Leif Lindholm , Graeme Gregory , Radoslaw Biernacki , Daniel Schaefer Subject: [edk2-platforms][PATCH V3 7/9] Silicon/SabaQemu: Use PcdPciMmio(32)64Translation PCD from MdePkg Date: Fri, 15 Oct 2021 15:33:03 +0800 Message-Id: <20211015073305.30438-8-abner.chang@hpe.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211015073305.30438-1-abner.chang@hpe.com> References: <20211015073305.30438-1-abner.chang@hpe.com> X-Proofpoint-ORIG-GUID: SSgpZno40mfXDooQwfV4qxuw3wVUu-6_ X-Proofpoint-GUID: SSgpZno40mfXDooQwfV4qxuw3wVUu-6_ X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-HPE-SCL: -1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475 definitions=2021-10-15_02,2021-10-14_02,2020-04-07_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 suspectscore=0 impostorscore=0 phishscore=0 mlxlogscore=921 lowpriorityscore=0 bulkscore=0 spamscore=0 clxscore=1015 mlxscore=0 malwarescore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2109230001 definitions=main-2110150054 Compliant with BZ: #3665 https://bugzilla.tianocore.org/show_bug.cgi?id=3665 PcdPciMmio(32)64Translation PCD is relocated to MdePkg that leveraged by both ARM and RISC-V arch. This patch uses the one from MdePkg instead the one under ArmPkg. Signed-off-by: Abner Chang Cc: Ard Biesheuvel Cc: Leif Lindholm Cc: Graeme Gregory Cc: Radoslaw Biernacki Cc: Daniel Schaefer --- Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf | 4 ++-- .../SbsaQemuPciHostBridgeLib/SbsaQemuPciHostBridgeLib.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf b/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf index 0ad9cc7ce4..176d8fab83 100644 --- a/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf +++ b/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf @@ -56,12 +56,12 @@ gArmTokenSpaceGuid.PcdPciMmio32Base gArmTokenSpaceGuid.PcdPciMmio32Size - gArmTokenSpaceGuid.PcdPciMmio32Translation + gEfiMdePkgTokenSpaceGuid.PcdPciMmio32Translation gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPciMmio32Limit gArmTokenSpaceGuid.PcdPciMmio64Base gArmTokenSpaceGuid.PcdPciMmio64Size - gArmTokenSpaceGuid.PcdPciMmio64Translation + gEfiMdePkgTokenSpaceGuid.PcdPciMmio64Translation gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPciMmio64Limit gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuPciHostBridgeLib/SbsaQemuPciHostBridgeLib.c b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuPciHostBridgeLib/SbsaQemuPciHostBridgeLib.c index 5021b096f7..9739c7500d 100644 --- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuPciHostBridgeLib/SbsaQemuPciHostBridgeLib.c +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuPciHostBridgeLib/SbsaQemuPciHostBridgeLib.c @@ -96,7 +96,7 @@ STATIC PCI_ROOT_BRIDGE mRootBridge = { /* PCI_ROOT_BRIDGE_APERTURE Mem; MMIO aperture below 4GB which can be used by the root bridge - (gArmTokenSpaceGuid.PcdPciMmio32Translation as 0x0) */ + (gEfiMdePkgTokenSpaceGuid.PcdPciMmio32Translation as 0x0) */ { FixedPcdGet32 (PcdPciMmio32Base), FixedPcdGet32 (PcdPciMmio32Base) + FixedPcdGet32 (PcdPciMmio32Size) - 1, @@ -104,7 +104,7 @@ STATIC PCI_ROOT_BRIDGE mRootBridge = { /* PCI_ROOT_BRIDGE_APERTURE MemAbove4G; MMIO aperture above 4GB which can be used by the root bridge. - (gArmTokenSpaceGuid.PcdPciMmio64Translation as 0x0) */ + (gEfiMdePkgTokenSpaceGuid.PcdPciMmio64Translation as 0x0) */ { FixedPcdGet64 (PcdPciMmio64Base), FixedPcdGet64 (PcdPciMmio64Base) + FixedPcdGet64 (PcdPciMmio64Size) - 1 -- 2.17.1