From: "Sheng Wei" <w.sheng@intel.com>
To: devel@edk2.groups.io
Cc: Robert Kowalewski <robert.kowalewski@intel.com>,
Jenny Huang <jenny.huang@intel.com>, Ray Ni <ray.ni@intel.com>,
Rangasai V Chaganty <rangasai.v.chaganty@intel.com>,
Albecki Mateusz <mateusz.albecki@intel.com>
Subject: [PATCH v2] IntelSiliconPkg/IntelVTdDxe: Support Multi PCI Root Bus
Date: Mon, 18 Oct 2021 16:42:44 +0800 [thread overview]
Message-ID: <20211018084244.15316-1-w.sheng@intel.com> (raw)
Some system may has multi PCI root bus. It needs to use function
PciHostBridgeGetRootBridges () to get the root bus count. Then,
scan each root bus to get all devices.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3695
Signed-off-by: Robert Kowalewski <robert.kowalewski@intel.com>
Signed-off-by: Sheng Wei <w.sheng@intel.com>
Cc: Jenny Huang <jenny.huang@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Robert Kowalewski <robert.kowalewski@intel.com>
Cc: Albecki Mateusz <mateusz.albecki@intel.com>
---
.../Feature/VTd/IntelVTdDxe/DmaProtection.h | 1 +
.../Feature/VTd/IntelVTdDxe/DmarAcpiTable.c | 17 ++++++++++++++---
.../Feature/VTd/IntelVTdDxe/IntelVTdDxe.inf | 1 +
3 files changed, 16 insertions(+), 3 deletions(-)
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmaProtection.h b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmaProtection.h
index a24fbc37..97061de5 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmaProtection.h
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmaProtection.h
@@ -23,6 +23,7 @@
#include <Library/PerformanceLib.h>
#include <Library/PrintLib.h>
#include <Library/ReportStatusCodeLib.h>
+#include <Library/PciHostBridgeLib.h>
#include <Guid/EventGroup.h>
#include <Guid/Acpi.h>
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmarAcpiTable.c b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmarAcpiTable.c
index 2d9b4374..e717aeb2 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmarAcpiTable.c
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmarAcpiTable.c
@@ -682,6 +682,9 @@ ProcessDhrd (
UINT8 SecondaryBusNumber;
EFI_STATUS Status;
VTD_SOURCE_ID SourceId;
+ PCI_ROOT_BRIDGE *RootBridges;
+ UINTN RootBridgeCount;
+ UINTN Index;
mVtdUnitInformation[VtdIndex].VtdUnitBaseAddress = (UINTN)DmarDrhd->RegisterBaseAddress;
DEBUG ((DEBUG_INFO," VTD (%d) BaseAddress - 0x%016lx\n", VtdIndex, DmarDrhd->RegisterBaseAddress));
@@ -692,9 +695,17 @@ ProcessDhrd (
mVtdUnitInformation[VtdIndex].PciDeviceInfo.IncludeAllFlag = TRUE;
DEBUG ((DEBUG_INFO," ProcessDhrd: with INCLUDE ALL\n"));
- Status = ScanPciBus((VOID *)VtdIndex, DmarDrhd->SegmentNumber, 0, ScanBusCallbackRegisterPciDevice);
- if (EFI_ERROR (Status)) {
- return Status;
+ RootBridges = PciHostBridgeGetRootBridges (&RootBridgeCount);
+ if ((RootBridges == NULL) || (RootBridgeCount == 0)) {
+ return EFI_UNSUPPORTED;
+ }
+ DEBUG ((DEBUG_INFO,"Find %d root bridges\n", RootBridgeCount));
+ for (Index = 0; Index < RootBridgeCount; Index++) {
+ DEBUG ((DEBUG_INFO,"Scan root bridges : %d, Segment : %d, Bus : 0x%02X\n", Index, RootBridges[Index].Segment, RootBridges[Index].Bus.Base));
+ Status = ScanPciBus((VOID *)VtdIndex, (UINT16) RootBridges[Index].Segment, (UINT8) RootBridges[Index].Bus.Base, ScanBusCallbackRegisterPciDevice);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
}
} else {
mVtdUnitInformation[VtdIndex].PciDeviceInfo.IncludeAllFlag = FALSE;
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxe.inf b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxe.inf
index 220636ad..25ff86f4 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxe.inf
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxe.inf
@@ -55,6 +55,7 @@
PerformanceLib
PrintLib
ReportStatusCodeLib
+ PciHostBridgeLib
[Guids]
gEfiEventExitBootServicesGuid ## CONSUMES ## Event
--
2.16.2.windows.1
next reply other threads:[~2021-10-18 8:42 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-18 8:42 Sheng Wei [this message]
2021-10-20 0:29 ` [PATCH v2] IntelSiliconPkg/IntelVTdDxe: Support Multi PCI Root Bus Ni, Ray
2021-10-20 2:42 ` Sheng Wei
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