* [edk2-platforms] [PATCH v3 01/14] U5SeriesPkg: Deduplicate PlatformPei
2021-10-19 3:48 [edk2-platforms] [PATCH v3 00/14] Use generic OpenSBI platform Daniel Schaefer
@ 2021-10-19 3:48 ` Daniel Schaefer
2021-10-19 3:48 ` [edk2-platforms] [PATCH v3 02/14] RISC-V: Split SMBIOS out of PlatformPei Daniel Schaefer
` (13 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Daniel Schaefer @ 2021-10-19 3:48 UTC (permalink / raw)
To: devel; +Cc: Daniel Schaefer, Abner Chang, Sunil V L
The current (and future) RISC-V platforms share a lot of PlatformPei
code that does not need to be duplicated. If we see that they need to
have different behavior in the future, we can add platform specific
libraires for that specific code.
The upcoming RiscvVirt is only 1205 lines with this patch.
Still way too much. Hopefully MinPlatform will help.
26 ./RiscvVirt.dec
13 ./RiscvVirt.uni
12 ./RiscvVirtPkgExtra.uni
78 ./VarStore.fdf.inc
66 ./RiscvVirt.fdf.inc
654 ./RiscvVirt.dsc
356 ./RiscvVirt.fdf
1205 total
Cc: Abner Chang <abner.chang@hpe.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Abner Chang <abner.chang@hpe.com>
Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
---
Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc | 2 +-
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc | 2 +-
Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf | 2 +-
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf | 2 +-
Platform/{SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard => RISC-V/PlatformPkg}/Universal/Pei/PlatformPei/PlatformPei.inf | 4 +-
Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Universal/Pei/PlatformPei/PlatformPei.inf | 73 -----
Platform/{SiFive/U5SeriesPkg/FreedomU500VC707Board => RISC-V/PlatformPkg}/Universal/Pei/PlatformPei/Platform.h | 0
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/Platform.h | 86 ------
Platform/{SiFive/U5SeriesPkg/FreedomU500VC707Board => RISC-V/PlatformPkg}/Universal/Pei/PlatformPei/Fv.c | 0
Platform/{SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard => RISC-V/PlatformPkg}/Universal/Pei/PlatformPei/MemDetect.c | 11 +-
Platform/{SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard => RISC-V/PlatformPkg}/Universal/Pei/PlatformPei/Platform.c | 6 +-
Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Universal/Pei/PlatformPei/MemDetect.c | 74 -----
Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Universal/Pei/PlatformPei/Platform.c | 310 --------------------
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/Fv.c | 51 ----
14 files changed, 21 insertions(+), 602 deletions(-)
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc
index 9f0a25f8a6af..fce1c5057879 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc
@@ -395,7 +395,7 @@
NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
}
- Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Universal/Pei/PlatformPei/PlatformPei.inf {
+ Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf {
<LibraryClasses>
PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
}
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
index afe63c80ba28..14d83fb25a9f 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
@@ -394,7 +394,7 @@
NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
}
- Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/PlatformPei.inf {
+ Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf {
<LibraryClasses>
PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
}
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf
index 5f3ac8e0b70f..7db3a02bcb8e 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf
@@ -99,7 +99,7 @@ INF MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf
INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
# RISC-V Platform PEI Driver
-INF Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Universal/Pei/PlatformPei/PlatformPei.inf
+INF Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf
################################################################################
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf
index a1a4b342e329..74717377287b 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf
@@ -99,7 +99,7 @@ INF MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf
INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
# RISC-V Platform PEI Driver
-INF Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/PlatformPei.inf
+INF Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf
################################################################################
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/PlatformPei.inf b/Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf
similarity index 88%
rename from Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/PlatformPei.inf
rename to Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf
index 59ada9305694..e7f5eef6300f 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/PlatformPei.inf
+++ b/Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf
@@ -3,7 +3,7 @@
#
# This module provides platform specific function to detect boot mode.
#
-# Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -62,6 +62,8 @@
gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDxeFvBase
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDxeFvSize
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdTemporaryRamBase
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdTemporaryRamSize
gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdNumberofU5Cores
gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdE5MCSupported
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Universal/Pei/PlatformPei/PlatformPei.inf b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Universal/Pei/PlatformPei/PlatformPei.inf
deleted file mode 100644
index 0e96c33e8fff..000000000000
--- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Universal/Pei/PlatformPei/PlatformPei.inf
+++ /dev/null
@@ -1,73 +0,0 @@
-## @file
-# Platform PEI driver
-#
-# This module provides platform specific function to detect boot mode.
-#
-# Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
-#
-# SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-##
-
-[Defines]
- INF_VERSION = 0x0001001b
- BASE_NAME = PlatformPei
- FILE_GUID = 222c386d-5abc-4fb4-b124-fbb82488acf4
- MODULE_TYPE = PEIM
- VERSION_STRING = 1.0
- ENTRY_POINT = InitializePlatform
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = RISCV64
-#
-
-[Sources]
- Fv.c
- MemDetect.c
- Platform.c
-
-[Packages]
- MdeModulePkg/MdeModulePkg.dec
- MdePkg/MdePkg.dec
- Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec
- Platform/SiFive/U5SeriesPkg/U5SeriesPkg.dec
- Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec
- Silicon/SiFive/SiFive.dec
- UefiCpuPkg/UefiCpuPkg.dec
-
-[Guids]
- gEfiMemoryTypeInformationGuid
- gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid
-
-[LibraryClasses]
- DebugLib
- HobLib
- IoLib
- PciLib
- PeiResourcePublicationLib
- PeiServicesLib
- PeiServicesTablePointerLib
- PeimEntryPoint
- PcdLib
- SiliconSiFiveU5MCCoreplexInfoLib
-
-[Pcd]
- gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
- gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
- gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration
- gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize
- gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress
- gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDxeFvBase
- gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDxeFvSize
- gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdNumberofU5Cores
- gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdE5MCSupported
-
-
-[Ppis]
- gEfiPeiMasterBootModePpiGuid
-
-[Depex]
- TRUE
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Universal/Pei/PlatformPei/Platform.h b/Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/Platform.h
similarity index 100%
rename from Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Universal/Pei/PlatformPei/Platform.h
rename to Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/Platform.h
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/Platform.h b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/Platform.h
deleted file mode 100644
index c2cdd6d75b14..000000000000
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/Platform.h
+++ /dev/null
@@ -1,86 +0,0 @@
-/** @file
- Platform PEI module include file.
-
- Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
- Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#ifndef PLATFORM_PEI_H_INCLUDED_
-#define PLATFORM_PEI_H_INCLUDED_
-
-VOID
-AddIoMemoryBaseSizeHob (
- EFI_PHYSICAL_ADDRESS MemoryBase,
- UINT64 MemorySize
- );
-
-VOID
-AddIoMemoryRangeHob (
- EFI_PHYSICAL_ADDRESS MemoryBase,
- EFI_PHYSICAL_ADDRESS MemoryLimit
- );
-
-VOID
-AddMemoryBaseSizeHob (
- EFI_PHYSICAL_ADDRESS MemoryBase,
- UINT64 MemorySize
- );
-
-VOID
-AddMemoryRangeHob (
- EFI_PHYSICAL_ADDRESS MemoryBase,
- EFI_PHYSICAL_ADDRESS MemoryLimit
- );
-
-VOID
-AddUntestedMemoryBaseSizeHob (
- EFI_PHYSICAL_ADDRESS MemoryBase,
- UINT64 MemorySize
- );
-
-VOID
-AddReservedMemoryBaseSizeHob (
- EFI_PHYSICAL_ADDRESS MemoryBase,
- UINT64 MemorySize
- );
-
-VOID
-AddUntestedMemoryRangeHob (
- EFI_PHYSICAL_ADDRESS MemoryBase,
- EFI_PHYSICAL_ADDRESS MemoryLimit
- );
-
-VOID
-AddressWidthInitialization (
- VOID
- );
-
-EFI_STATUS
-PublishPeiMemory (
- VOID
- );
-
-UINT32
-GetSystemMemorySizeBelow4gb (
- VOID
- );
-
-VOID
-InitializeRamRegions (
- VOID
- );
-
-EFI_STATUS
-PeiFvInitialization (
- VOID
- );
-
-EFI_STATUS
-InitializeXen (
- VOID
- );
-
-#endif // _PLATFORM_PEI_H_INCLUDED_
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Universal/Pei/PlatformPei/Fv.c b/Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/Fv.c
similarity index 100%
rename from Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Universal/Pei/PlatformPei/Fv.c
rename to Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/Fv.c
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/MemDetect.c b/Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/MemDetect.c
similarity index 79%
rename from Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/MemDetect.c
rename to Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/MemDetect.c
index 755eae931844..c15d6bb5d425 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/MemDetect.c
+++ b/Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/MemDetect.c
@@ -1,7 +1,7 @@
/**@file
Memory Detection for Virtual Machines.
- Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+ Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -46,6 +46,10 @@ PublishPeiMemory (
EFI_PHYSICAL_ADDRESS MemoryBase;
UINT64 MemorySize;
+ //
+ // TODO: This value should come from platform
+ // configuration or the memory sizing code.
+ //
MemoryBase = 0x80000000UL + 0x1000000UL;
MemorySize = 0x40000000UL - 0x1000000UL; //1GB - 16MB
@@ -69,6 +73,9 @@ InitializeRamRegions (
VOID
)
{
+ //
+ // TODO: This value should come from platform
+ // configuration or the memory sizing code.
+ //
AddMemoryRangeHob(0x81000000UL, 0x81000000UL + 0x3F000000UL);
-
}
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/Platform.c b/Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/Platform.c
similarity index 93%
rename from Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/Platform.c
rename to Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/Platform.c
index 9a2cb9413caf..24192c692ba7 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/Platform.c
+++ b/Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/Platform.c
@@ -199,11 +199,14 @@ MiscInitialization (
// of IO space. (Side note: unlike other HOBs, the CPU HOB is needed during
// S3 resume as well, so we build it unconditionally.)
//
+ // TODO: Determine this dynamically from the platform
+ // setting or the HART configuration.
+ //
BuildCpuHob (48, 32);
}
/**
- Check if system retunrs from S3.
+ Check if system returns from S3.
@return BOOLEAN TRUE, system returned from S3
FALSE, system is not returned from S3
@@ -254,6 +257,7 @@ BuildCoreInformationHob (
EFI_STATUS Status;
RISC_V_PROCESSOR_SMBIOS_HOB_DATA *SmbiosHobPtr;
+ // TODO: Create SMBIOS libs for non-U540 platforms
Status = CreateU5MCCoreplexProcessorSpecificDataHob (0);
if (EFI_ERROR (Status)) {
ASSERT(FALSE);
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Universal/Pei/PlatformPei/MemDetect.c b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Universal/Pei/PlatformPei/MemDetect.c
deleted file mode 100644
index 755eae931844..000000000000
--- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Universal/Pei/PlatformPei/MemDetect.c
+++ /dev/null
@@ -1,74 +0,0 @@
-/**@file
- Memory Detection for Virtual Machines.
-
- Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
- Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-
-Module Name:
-
- MemDetect.c
-
-**/
-
-//
-// The package level header files this module uses
-//
-#include <PiPei.h>
-
-//
-// The Library classes this module consumes
-//
-#include <Library/BaseMemoryLib.h>
-#include <Library/DebugLib.h>
-#include <Library/HobLib.h>
-#include <Library/IoLib.h>
-#include <Library/PcdLib.h>
-#include <Library/PeimEntryPoint.h>
-#include <Library/ResourcePublicationLib.h>
-
-#include "Platform.h"
-
-
-/**
- Publish PEI core memory
-
- @return EFI_SUCCESS The PEIM initialized successfully.
-
-**/
-EFI_STATUS
-PublishPeiMemory (
- VOID
- )
-{
- EFI_STATUS Status;
- EFI_PHYSICAL_ADDRESS MemoryBase;
- UINT64 MemorySize;
-
- MemoryBase = 0x80000000UL + 0x1000000UL;
- MemorySize = 0x40000000UL - 0x1000000UL; //1GB - 16MB
-
- DEBUG((DEBUG_INFO, "%a: MemoryBase:0x%x MemorySize:%x\n", __FUNCTION__, MemoryBase, MemorySize));
-
- //
- // Publish this memory to the PEI Core
- //
- Status = PublishSystemMemory(MemoryBase, MemorySize);
- ASSERT_EFI_ERROR (Status);
-
- return Status;
-}
-
-/**
- Publish system RAM and reserve memory regions
-
-**/
-VOID
-InitializeRamRegions (
- VOID
- )
-{
- AddMemoryRangeHob(0x81000000UL, 0x81000000UL + 0x3F000000UL);
-
-}
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Universal/Pei/PlatformPei/Platform.c b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Universal/Pei/PlatformPei/Platform.c
deleted file mode 100644
index 6641e10f2ec3..000000000000
--- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Universal/Pei/PlatformPei/Platform.c
+++ /dev/null
@@ -1,310 +0,0 @@
-/**@file
- Platform PEI driver
-
- Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
- Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
- Copyright (c) 2011, Andrei Warkentin <andreiw@motorola.com>
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-//
-// The package level header files this module uses
-//
-#include <PiPei.h>
-
-//
-// The Library classes this module consumes
-//
-#include <Library/DebugLib.h>
-#include <Library/HobLib.h>
-#include <Library/IoLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/PcdLib.h>
-#include <Library/PciLib.h>
-#include <Library/PeimEntryPoint.h>
-#include <Library/PeiServicesLib.h>
-#include <Library/ResourcePublicationLib.h>
-#include <Guid/MemoryTypeInformation.h>
-#include <Ppi/MasterBootMode.h>
-#include <IndustryStandard/Pci22.h>
-
-#include <SiFiveU5MCCoreplex.h>
-
-#include "Platform.h"
-
-EFI_MEMORY_TYPE_INFORMATION mDefaultMemoryTypeInformation[] = {
- { EfiACPIMemoryNVS, 0x004 },
- { EfiACPIReclaimMemory, 0x008 },
- { EfiReservedMemoryType, 0x004 },
- { EfiRuntimeServicesData, 0x024 },
- { EfiRuntimeServicesCode, 0x030 },
- { EfiBootServicesCode, 0x180 },
- { EfiBootServicesData, 0xF00 },
- { EfiMaxMemoryType, 0x000 }
-};
-
-
-EFI_PEI_PPI_DESCRIPTOR mPpiBootMode[] = {
- {
- EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
- &gEfiPeiMasterBootModePpiGuid,
- NULL
- }
-};
-
-STATIC EFI_BOOT_MODE mBootMode = BOOT_WITH_FULL_CONFIGURATION;
-
-VOID
-AddIoMemoryBaseSizeHob (
- EFI_PHYSICAL_ADDRESS MemoryBase,
- UINT64 MemorySize
- )
-{
- BuildResourceDescriptorHob (
- EFI_RESOURCE_MEMORY_MAPPED_IO,
- EFI_RESOURCE_ATTRIBUTE_PRESENT |
- EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
- EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
- EFI_RESOURCE_ATTRIBUTE_TESTED,
- MemoryBase,
- MemorySize
- );
-}
-
-VOID
-AddReservedMemoryBaseSizeHob (
- EFI_PHYSICAL_ADDRESS MemoryBase,
- UINT64 MemorySize
- )
-{
- BuildResourceDescriptorHob (
- EFI_RESOURCE_MEMORY_RESERVED,
- EFI_RESOURCE_ATTRIBUTE_PRESENT |
- EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
- EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
- EFI_RESOURCE_ATTRIBUTE_TESTED,
- MemoryBase,
- MemorySize
- );
-}
-
-VOID
-AddIoMemoryRangeHob (
- EFI_PHYSICAL_ADDRESS MemoryBase,
- EFI_PHYSICAL_ADDRESS MemoryLimit
- )
-{
- AddIoMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase));
-}
-
-
-VOID
-AddMemoryBaseSizeHob (
- EFI_PHYSICAL_ADDRESS MemoryBase,
- UINT64 MemorySize
- )
-{
- BuildResourceDescriptorHob (
- EFI_RESOURCE_SYSTEM_MEMORY,
- EFI_RESOURCE_ATTRIBUTE_PRESENT |
- EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
- EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
- EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
- EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
- EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |
- EFI_RESOURCE_ATTRIBUTE_TESTED,
- MemoryBase,
- MemorySize
- );
-}
-
-
-VOID
-AddMemoryRangeHob (
- EFI_PHYSICAL_ADDRESS MemoryBase,
- EFI_PHYSICAL_ADDRESS MemoryLimit
- )
-{
- AddMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase));
-}
-
-
-VOID
-AddUntestedMemoryBaseSizeHob (
- EFI_PHYSICAL_ADDRESS MemoryBase,
- UINT64 MemorySize
- )
-{
- BuildResourceDescriptorHob (
- EFI_RESOURCE_SYSTEM_MEMORY,
- EFI_RESOURCE_ATTRIBUTE_PRESENT |
- EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
- EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
- EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
- EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
- EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE,
- MemoryBase,
- MemorySize
- );
-}
-
-VOID
-AddUntestedMemoryRangeHob (
- EFI_PHYSICAL_ADDRESS MemoryBase,
- EFI_PHYSICAL_ADDRESS MemoryLimit
- )
-{
- AddUntestedMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase));
-}
-
-VOID
-AddPciResource (
- VOID
- )
-{
- //
- // Platform-specific
- //
-}
-
-VOID
-MemMapInitialization (
- VOID
- )
-{
- //
- // Create Memory Type Information HOB
- //
- BuildGuidDataHob (
- &gEfiMemoryTypeInformationGuid,
- mDefaultMemoryTypeInformation,
- sizeof(mDefaultMemoryTypeInformation)
- );
-
- //
- // Add PCI IO Port space available for PCI resource allocations.
- //
- AddPciResource ();
-}
-
-VOID
-MiscInitialization (
- VOID
- )
-{
- //
- // Build the CPU HOB with guest RAM size dependent address width and 16-bits
- // of IO space. (Side note: unlike other HOBs, the CPU HOB is needed during
- // S3 resume as well, so we build it unconditionally.)
- //
- BuildCpuHob (32, 32);
-}
-
-/**
- Check if system retunrs from S3.
-
- @return BOOLEAN TRUE, system returned from S3
- FALSE, system is not returned from S3
-
-**/
-BOOLEAN
-CheckResumeFromS3 (
- VOID
- )
-{
- //
- //Platform implementation-specific
- //
- return FALSE;
-}
-
-
-VOID
-BootModeInitialization (
- VOID
- )
-{
- EFI_STATUS Status;
-
- if (CheckResumeFromS3 () == TRUE) {
- DEBUG ((DEBUG_INFO, "This is wake from S3\n"));
- } else {
- DEBUG ((DEBUG_INFO, "This is normal boot\n"));
- }
- Status = PeiServicesSetBootMode (mBootMode);
- ASSERT_EFI_ERROR (Status);
-
- Status = PeiServicesInstallPpi (mPpiBootMode);
- ASSERT_EFI_ERROR (Status);
-}
-
-/**
- Build processor information for U54 Coreplex processor.
-
- @return EFI_SUCCESS Status.
-
-**/
-EFI_STATUS
-BuildCoreInformationHob (
- VOID
-)
-{
- EFI_STATUS Status;
- RISC_V_PROCESSOR_SMBIOS_HOB_DATA *SmbiosHobPtr;
-
- Status = CreateU5MCCoreplexProcessorSpecificDataHob (0);
- if (EFI_ERROR (Status)) {
- ASSERT(FALSE);
- }
- Status = CreateU5MCProcessorSmbiosDataHob (0, &SmbiosHobPtr);
- if (EFI_ERROR (Status)) {
- ASSERT(FALSE);
- }
-
- DEBUG ((DEBUG_INFO, "U5 MC Coreplex SMBIOS DATA HOB at address 0x%x\n", SmbiosHobPtr));
-
- return EFI_SUCCESS;
-}
-
-/**
- Perform Platform PEI initialization.
-
- @param FileHandle Handle of the file being invoked.
- @param PeiServices Describes the list of possible PEI Services.
-
- @return EFI_SUCCESS The PEIM initialized successfully.
-
-**/
-EFI_STATUS
-EFIAPI
-InitializePlatform (
- IN EFI_PEI_FILE_HANDLE FileHandle,
- IN CONST EFI_PEI_SERVICES **PeiServices
- )
-{
- EFI_STATUS Status;
-
- DEBUG ((DEBUG_INFO, "Platform PEIM Loaded\n"));
-
- BootModeInitialization ();
- DEBUG ((DEBUG_INFO, "Platform BOOT mode initiated.\n"));
- PublishPeiMemory ();
- DEBUG ((DEBUG_INFO, "PEI memory published.\n"));
- InitializeRamRegions ();
- DEBUG ((DEBUG_INFO, "Platform RAM regions initiated.\n"));
-
- if (mBootMode != BOOT_ON_S3_RESUME) {
- PeiFvInitialization ();
- MemMapInitialization ();
- }
-
- MiscInitialization ();
- Status = BuildCoreInformationHob ();
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "Fail to build processor informstion HOB.\n"));
- ASSERT(FALSE);
- }
- return EFI_SUCCESS;
-}
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/Fv.c b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/Fv.c
deleted file mode 100644
index 060d66238dff..000000000000
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universal/Pei/PlatformPei/Fv.c
+++ /dev/null
@@ -1,51 +0,0 @@
-/** @file
- Build FV related hobs for platform.
-
- Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
- Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include "PiPei.h"
-#include "Platform.h"
-#include <Library/DebugLib.h>
-#include <Library/HobLib.h>
-#include <Library/PcdLib.h>
-#include <Library/PeiServicesLib.h>
-
-/**
- Publish PEI & DXE (Decompressed) Memory based FVs to let PEI
- and DXE know about them.
-
- @retval EFI_SUCCESS Platform PEI FVs were initialized successfully.
-
-**/
-EFI_STATUS
-PeiFvInitialization (
- VOID
- )
-{
- DEBUG ((DEBUG_INFO, "Platform PEI Firmware Volume Initialization\n"));
- //
- // Let DXE know about the DXE FV
- //
- BuildFvHob (PcdGet32 (PcdRiscVDxeFvBase), PcdGet32 (PcdRiscVDxeFvSize));
- DEBUG ((DEBUG_INFO, "Platform builds DXE FV at %x, size %x.\n",
- PcdGet32 (PcdRiscVDxeFvBase),
- PcdGet32 (PcdRiscVDxeFvSize)));
-
- //
- // Let PEI know about the DXE FV so it can find the DXE Core
- //
- PeiServicesInstallFvInfoPpi (
- NULL,
- (VOID *)(UINTN) PcdGet32 (PcdRiscVDxeFvBase),
- PcdGet32 (PcdRiscVDxeFvSize),
- NULL,
- NULL
- );
-
- return EFI_SUCCESS;
-}
--
2.31.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [edk2-platforms] [PATCH v3 02/14] RISC-V: Split SMBIOS out of PlatformPei
2021-10-19 3:48 [edk2-platforms] [PATCH v3 00/14] Use generic OpenSBI platform Daniel Schaefer
2021-10-19 3:48 ` [edk2-platforms] [PATCH v3 01/14] U5SeriesPkg: Deduplicate PlatformPei Daniel Schaefer
@ 2021-10-19 3:48 ` Daniel Schaefer
2021-10-19 3:48 ` [edk2-platforms] [PATCH v3 03/14] RISC-V: Use U5 SMBIOS library only for those platforms Daniel Schaefer
` (12 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Daniel Schaefer @ 2021-10-19 3:48 UTC (permalink / raw)
To: devel; +Cc: Daniel Schaefer, Abner Chang, Sunil V L
Cc: Abner Chang <abner.chang@hpe.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Abner Chang <abner.chang@hpe.com>
Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
---
Platform/SiFive/U5SeriesPkg/Include/SiFiveU5MCCoreplex.h | 33 ++++----------------
Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/Platform.c | 17 +---------
Platform/SiFive/U5SeriesPkg/Library/PeiCoreInfoHobLib/CoreInfoHob.c | 32 ++++++++++++++++++-
3 files changed, 38 insertions(+), 44 deletions(-)
diff --git a/Platform/SiFive/U5SeriesPkg/Include/SiFiveU5MCCoreplex.h b/Platform/SiFive/U5SeriesPkg/Include/SiFiveU5MCCoreplex.h
index 5d70e26f8359..363b34a8f1ac 100644
--- a/Platform/SiFive/U5SeriesPkg/Include/SiFiveU5MCCoreplex.h
+++ b/Platform/SiFive/U5SeriesPkg/Include/SiFiveU5MCCoreplex.h
@@ -1,7 +1,7 @@
/** @file
SiFive U54 Coreplex library definitions.
- Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+ Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -17,35 +17,14 @@
#define SIFIVE_U5MC_COREPLEX_MC_HART_ID 0
/**
- Build up U5MC coreplex processor core-specific information.
+ Build processor and platform information for the U5 platform
- @param UniqueId U5MC unique ID.
-
- @return EFI_STATUS
+ @return EFI_SUCCESS Status.
**/
EFI_STATUS
-EFIAPI
-CreateU5MCCoreplexProcessorSpecificDataHob (
- IN UINTN UniqueId
- );
-
-/**
- Function to build processor related SMBIOS information. RISC-V SMBIOS DXE driver collect
- this information and build SMBIOS Type4 and Type7 record.
-
- @param ProcessorUid Unique ID of pysical processor which owns this core.
- @param SmbiosDataHobPtr Pointer to receive RISC_V_PROCESSOR_SMBIOS_DATA_HOB. The pointers
- maintained in this structure is only valid before memory is discovered.
- Access to those pointers after memory is installed will cause unexpected issues.
+BuildRiscVSmbiosHobs (
+ VOID
+);
- @return EFI_SUCCESS The PEIM initialized successfully.
-
-**/
-EFI_STATUS
-EFIAPI
-CreateU5MCProcessorSmbiosDataHob (
- IN UINTN ProcessorUid,
- OUT RISC_V_PROCESSOR_SMBIOS_HOB_DATA **SmbiosDataHobPtr
- );
#endif
diff --git a/Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/Platform.c b/Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/Platform.c
index 24192c692ba7..8586a94b6285 100644
--- a/Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/Platform.c
+++ b/Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/Platform.c
@@ -254,22 +254,7 @@ BuildCoreInformationHob (
VOID
)
{
- EFI_STATUS Status;
- RISC_V_PROCESSOR_SMBIOS_HOB_DATA *SmbiosHobPtr;
-
- // TODO: Create SMBIOS libs for non-U540 platforms
- Status = CreateU5MCCoreplexProcessorSpecificDataHob (0);
- if (EFI_ERROR (Status)) {
- ASSERT(FALSE);
- }
- Status = CreateU5MCProcessorSmbiosDataHob (0, &SmbiosHobPtr);
- if (EFI_ERROR (Status)) {
- ASSERT(FALSE);
- }
-
- DEBUG ((DEBUG_INFO, "U5 MC Coreplex SMBIOS DATA HOB at address 0x%x\n", SmbiosHobPtr));
-
- return EFI_SUCCESS;
+ return BuildRiscVSmbiosHobs ();
}
/**
diff --git a/Platform/SiFive/U5SeriesPkg/Library/PeiCoreInfoHobLib/CoreInfoHob.c b/Platform/SiFive/U5SeriesPkg/Library/PeiCoreInfoHobLib/CoreInfoHob.c
index b2f74c2a743b..bc1b252946d9 100644
--- a/Platform/SiFive/U5SeriesPkg/Library/PeiCoreInfoHobLib/CoreInfoHob.c
+++ b/Platform/SiFive/U5SeriesPkg/Library/PeiCoreInfoHobLib/CoreInfoHob.c
@@ -1,7 +1,7 @@
/**@file
Build up platform processor information.
- Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+ Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -32,6 +32,7 @@
@return EFI_SUCCESS The PEIM initialized successfully.
**/
+STATIC
EFI_STATUS
EFIAPI
CreateU5MCCoreplexProcessorSpecificDataHob (
@@ -96,6 +97,7 @@ CreateU5MCCoreplexProcessorSpecificDataHob (
@return EFI_SUCCESS The SMBIOS Hobs were created successfully.
**/
+STATIC
EFI_STATUS
EFIAPI
CreateU5MCProcessorSmbiosDataHob (
@@ -163,3 +165,31 @@ CreateU5MCProcessorSmbiosDataHob (
return EFI_SUCCESS;
}
+
+/**
+ Build processor and platform information for the U5 platform
+
+ @return EFI_SUCCESS Status.
+
+**/
+EFI_STATUS
+BuildRiscVSmbiosHobs (
+ VOID
+)
+{
+ EFI_STATUS Status;
+ RISC_V_PROCESSOR_SMBIOS_HOB_DATA *SmbiosHobPtr;
+
+ Status = CreateU5MCCoreplexProcessorSpecificDataHob (0);
+ if (EFI_ERROR (Status)) {
+ ASSERT(FALSE);
+ }
+ Status = CreateU5MCProcessorSmbiosDataHob (0, &SmbiosHobPtr);
+ if (EFI_ERROR (Status)) {
+ ASSERT(FALSE);
+ }
+
+ DEBUG ((DEBUG_INFO, "U5 MC Coreplex SMBIOS DATA HOB at address 0x%x\n", SmbiosHobPtr));
+
+ return EFI_SUCCESS;
+}
--
2.31.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [edk2-platforms] [PATCH v3 03/14] RISC-V: Use U5 SMBIOS library only for those platforms
2021-10-19 3:48 [edk2-platforms] [PATCH v3 00/14] Use generic OpenSBI platform Daniel Schaefer
2021-10-19 3:48 ` [edk2-platforms] [PATCH v3 01/14] U5SeriesPkg: Deduplicate PlatformPei Daniel Schaefer
2021-10-19 3:48 ` [edk2-platforms] [PATCH v3 02/14] RISC-V: Split SMBIOS out of PlatformPei Daniel Schaefer
@ 2021-10-19 3:48 ` Daniel Schaefer
2021-10-19 3:48 ` [edk2-platforms] [PATCH v3 04/14] Silicon/RISC-V: Introduce FirmwareContext library Daniel Schaefer
` (11 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Daniel Schaefer @ 2021-10-19 3:48 UTC (permalink / raw)
To: devel; +Cc: Daniel Schaefer, Abner Chang, Sunil V L
Cc: Abner Chang <abner.chang@hpe.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Abner Chang <abner.chang@hpe.com>
Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
---
Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc | 2 +-
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc | 2 +-
Platform/RISC-V/PlatformPkg/Library/PeiCoreInfoHobLibNull/PeiCoreInfoHobLib.inf | 43 ++++++++++++++++++++
Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf | 2 +-
Platform/SiFive/U5SeriesPkg/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf | 4 +-
Platform/RISC-V/PlatformPkg/Library/PeiCoreInfoHobLibNull/CoreInfoHob.c | 37 +++++++++++++++++
6 files changed, 85 insertions(+), 5 deletions(-)
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc
index fce1c5057879..1dc6405a20f0 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc
@@ -212,7 +212,7 @@
# RISC-V core libraries
#
SiliconSiFiveU54CoreInfoLib|Silicon/SiFive/U54/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf
- SiliconSiFiveU5MCCoreplexInfoLib|Platform/SiFive/U5SeriesPkg/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf
+ RiscVCoreplexInfoLib|Platform/SiFive/U5SeriesPkg/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf
[LibraryClasses.common.DXE_CORE]
TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
index 14d83fb25a9f..18a99b86d849 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
@@ -213,7 +213,7 @@
# RISC-V core libraries
#
SiliconSiFiveU54CoreInfoLib|Silicon/SiFive/U54/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf
- SiliconSiFiveU5MCCoreplexInfoLib|Platform/SiFive/U5SeriesPkg/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf
+ RiscVCoreplexInfoLib|Platform/SiFive/U5SeriesPkg/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf
[LibraryClasses.common.DXE_CORE]
TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf
diff --git a/Platform/RISC-V/PlatformPkg/Library/PeiCoreInfoHobLibNull/PeiCoreInfoHobLib.inf b/Platform/RISC-V/PlatformPkg/Library/PeiCoreInfoHobLibNull/PeiCoreInfoHobLib.inf
new file mode 100644
index 000000000000..5a8db5071f40
--- /dev/null
+++ b/Platform/RISC-V/PlatformPkg/Library/PeiCoreInfoHobLibNull/PeiCoreInfoHobLib.inf
@@ -0,0 +1,43 @@
+## @file
+# Library instance to create core information HOB
+#
+# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001b
+ BASE_NAME = RiscVCoreplexInfoLibNull
+ FILE_GUID = E5783AF0-B7C5-4FAA-BAB4-D52C06B98BBE
+ MODULE_TYPE = PEIM
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = RiscVCoreplexInfoLib
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = RISCV64
+#
+
+[Sources]
+ CoreInfoHob.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec
+ Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec
+
+[LibraryClasses]
+ BaseLib
+ PcdLib
+ MemoryAllocationLib
+ PrintLib
+
+[Guids]
+
+[Ppis]
+
+[FixedPcd]
diff --git a/Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf b/Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf
index e7f5eef6300f..0db88abba420 100644
--- a/Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf
+++ b/Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf
@@ -51,7 +51,7 @@
PeiServicesTablePointerLib
PeimEntryPoint
PcdLib
- SiliconSiFiveU5MCCoreplexInfoLib
+ RiscVCoreplexInfoLib
[Pcd]
gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved
diff --git a/Platform/SiFive/U5SeriesPkg/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf b/Platform/SiFive/U5SeriesPkg/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf
index b3124a6daf77..d741f0474769 100644
--- a/Platform/SiFive/U5SeriesPkg/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf
+++ b/Platform/SiFive/U5SeriesPkg/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf
@@ -1,7 +1,7 @@
## @file
# Library instance to create core information HOB
#
-# Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -13,7 +13,7 @@
FILE_GUID = 4E397A71-5164-4E69-9884-70CBE2740AAB
MODULE_TYPE = PEIM
VERSION_STRING = 1.0
- LIBRARY_CLASS = SiliconSiFiveU5MCCoreplexInfoLib
+ LIBRARY_CLASS = RiscVCoreplexInfoLib
#
# The following information is for reference only and not required by the build tools.
diff --git a/Platform/RISC-V/PlatformPkg/Library/PeiCoreInfoHobLibNull/CoreInfoHob.c b/Platform/RISC-V/PlatformPkg/Library/PeiCoreInfoHobLibNull/CoreInfoHob.c
new file mode 100644
index 000000000000..9aad7991bc77
--- /dev/null
+++ b/Platform/RISC-V/PlatformPkg/Library/PeiCoreInfoHobLibNull/CoreInfoHob.c
@@ -0,0 +1,37 @@
+/**@file
+ Build up platform processor information.
+
+ Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+//
+// The package level header files this module uses
+//
+#include <PiPei.h>
+
+//
+// The Library classes this module consumes
+//
+#include <Library/DebugLib.h>
+#include <Library/HobLib.h>
+#include <Library/BaseMemoryLib.h>
+
+#include <ProcessorSpecificHobData.h>
+
+
+/**
+ Build processor and platform information for a generic RISC-V
+
+ @return EFI_SUCCESS Status.
+
+**/
+EFI_STATUS
+BuildRiscVSmbiosHobs (
+ VOID
+)
+{
+ return EFI_SUCCESS;
+}
--
2.31.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [edk2-platforms] [PATCH v3 04/14] Silicon/RISC-V: Introduce FirmwareContext library
2021-10-19 3:48 [edk2-platforms] [PATCH v3 00/14] Use generic OpenSBI platform Daniel Schaefer
` (2 preceding siblings ...)
2021-10-19 3:48 ` [edk2-platforms] [PATCH v3 03/14] RISC-V: Use U5 SMBIOS library only for those platforms Daniel Schaefer
@ 2021-10-19 3:48 ` Daniel Schaefer
2021-10-19 3:48 ` [edk2-platforms] [PATCH v3 05/14] Silicon/RISC-V: PeiServiceTableLib uses RiscVFirmwareContextLib Daniel Schaefer
` (10 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Daniel Schaefer @ 2021-10-19 3:48 UTC (permalink / raw)
To: devel; +Cc: Abner Chang, Sunil V L, Daniel Schaefer
From: Abner Chang <abner.chang@hpe.com>
Add RISC-V FirmwareContext library for different FirmwareContext
implementations. This instance uses SBI firmware extension to
get the pointer to FirmwareContext.
Cc: Sunil V L <sunilvl@ventanamicro.com>
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
Reviewed-by: Abner Chang <abner.chang@hpe.com>
Reviewed-by: Daniel Schaefer <daniel.schaefer@hpe.com>
Signed-off-by: Abner Chang <abner.chang@hpe.com>
---
Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec | 1 +
Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc | 4 +-
Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSbiLib/RiscVFirmwareContextSbiLib.inf | 34 +++++++++++++
Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSscratchLib/RiscVFirmwareContextSscratchLib.inf | 33 +++++++++++++
Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextStvecLib/RiscVFirmwareContextStvecLib.inf | 34 +++++++++++++
Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscV.h | 3 +-
Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h | 14 +++++-
Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVFirmwareContextLib.h | 43 ++++++++++++++++
Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSbiLib/RiscVFirmwareContextSbiLib.c | 52 ++++++++++++++++++++
Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSscratchLib/RiscVFirmwareContextSscratchLib.c | 48 ++++++++++++++++++
Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextStvecLib/RiscVFirmwareContextStvecLib.c | 48 ++++++++++++++++++
Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/Cpu.S | 34 ++++++++++++-
12 files changed, 344 insertions(+), 4 deletions(-)
diff --git a/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec b/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec
index 0b64b33f0fba..08279a97b1c5 100644
--- a/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec
+++ b/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec
@@ -24,6 +24,7 @@
RiscVPlatformDxeIplLib|Include/Library/RiscVPlatformDxeIpl.h
RiscVCpuLib|Include/Library/RiscVCpuLib.h
RiscVEdk2SbiLib|Include/Library/RiscVEdk2SbiLib.h
+ RiscVFirmwareContextLib|Include/Library/RiscVFirmwareContextLib.h
[Guids]
gUefiRiscVPkgTokenSpaceGuid = { 0x4261e9c8, 0x52c0, 0x4b34, { 0x85, 0x3d, 0x48, 0x46, 0xea, 0xd3, 0xb7, 0x2c}}
diff --git a/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc b/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc
index 5c5cfcb525ca..1292ba1beab7 100644
--- a/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc
+++ b/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc
@@ -65,13 +65,14 @@
UefiLib|MdePkg/Library/UefiLib/UefiLib.inf
DevicePathLib|MdePkg/Library/UefiDevicePathLibDevicePathProtocol/UefiDevicePathLibDevicePathProtocol.inf
RiscVPlatformTimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVPlatformTimerLibNull/RiscVPlatformTimerLib.inf
- PeiServicesTablePointerLib|Silicon/RISC-V/ProcessorPkg/Library/PeiServicesTablePointerLibOpenSbi/PeiServicesTablePointerLibOpenSbi.inf
[LibraryClasses.common.PEI_CORE]
PeiServicesTablePointerLib|Silicon/RISC-V/ProcessorPkg/Library/PeiServicesTablePointerLibOpenSbi/PeiServicesTablePointerLibOpenSbi.inf
+ RiscVFirmwareContextLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSbiLib/RiscVFirmwareContextSbiLib.inf
[LibraryClasses.common.PEIM]
PeiServicesTablePointerLib|Silicon/RISC-V/ProcessorPkg/Library/PeiServicesTablePointerLibOpenSbi/PeiServicesTablePointerLibOpenSbi.inf
+ RiscVFirmwareContextLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSbiLib/RiscVFirmwareContextSbiLib.inf
HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf
@@ -92,6 +93,7 @@
[Components]
Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf
Silicon/RISC-V/ProcessorPkg/Library/RiscVExceptionLib/CpuExceptionHandlerDxeLib.inf
+ Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSbiLib/RiscVFirmwareContextSbiLib.inf
Silicon/RISC-V/ProcessorPkg/Library/PeiServicesTablePointerLibOpenSbi/PeiServicesTablePointerLibOpenSbi.inf
Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/RiscVOpensbiLib.inf
Silicon/RISC-V/ProcessorPkg/Library/RiscVPlatformTimerLibNull/RiscVPlatformTimerLib.inf
diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSbiLib/RiscVFirmwareContextSbiLib.inf b/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSbiLib/RiscVFirmwareContextSbiLib.inf
new file mode 100644
index 000000000000..168b70545390
--- /dev/null
+++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSbiLib/RiscVFirmwareContextSbiLib.inf
@@ -0,0 +1,34 @@
+## @file
+# Instance of OpebSBI Firmware Conext Library
+#
+# This iinstance uses RISC-V OpenSBI Firmware Extension SBI.
+#
+# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001b
+ BASE_NAME = RiscVFirmwareContextSbiLib
+ FILE_GUID = 3709E048-6794-427A-B728-BFE3FFD6D461
+ MODULE_TYPE = PEIM
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = RiscVFirmwareContextLib|PEIM PEI_CORE
+
+#
+# VALID_ARCHITECTURES = RISCV64
+#
+[Sources]
+ RiscVFirmwareContextSbiLib.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec
+
+[LibraryClasses]
+ DebugLib
+ RiscVCpuLib
+ RiscVEdk2SbiLib
+
diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSscratchLib/RiscVFirmwareContextSscratchLib.inf b/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSscratchLib/RiscVFirmwareContextSscratchLib.inf
new file mode 100644
index 000000000000..750c1cf51ffa
--- /dev/null
+++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSscratchLib/RiscVFirmwareContextSscratchLib.inf
@@ -0,0 +1,33 @@
+## @file
+# Instance of OpebSBI Firmware Conext Library
+#
+# This instance uses RISC-V Supervisor mode SCRATCH CSR
+#
+# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001b
+ BASE_NAME = RiscVFirmwareContextSscratchLib
+ FILE_GUID = 3709E048-6794-427A-B728-BFE3FFD6D461
+ MODULE_TYPE = PEIM
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = RiscVFirmwareContextLib|PEIM PEI_CORE
+
+#
+# VALID_ARCHITECTURES = RISCV64
+#
+[Sources]
+ RiscVFirmwareContextSscratchLib.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec
+
+[LibraryClasses]
+ DebugLib
+ RiscVCpuLib
+
diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextStvecLib/RiscVFirmwareContextStvecLib.inf b/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextStvecLib/RiscVFirmwareContextStvecLib.inf
new file mode 100644
index 000000000000..fa894cda9164
--- /dev/null
+++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextStvecLib/RiscVFirmwareContextStvecLib.inf
@@ -0,0 +1,34 @@
+## @file
+# Instance of OpebSBI Firmware Conext Library
+#
+# This iinstance Supervisor mode STVEC CSR
+#
+# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001b
+ BASE_NAME = RiscVFirmwareContextStvecLib
+ FILE_GUID = 42DCFFAC-1DBD-4264-80A3-85CC7167AC82
+ MODULE_TYPE = PEIM
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = RiscVFirmwareContextLib|PEIM PEI_CORE
+
+#
+# VALID_ARCHITECTURES = RISCV64
+#
+[Sources]
+ RiscVFirmwareContextStvecLib.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec
+
+[LibraryClasses]
+ DebugLib
+ RiscVCpuLib
+
+
diff --git a/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscV.h b/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscV.h
index 2a992394edbb..f6726bda240b 100644
--- a/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscV.h
+++ b/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscV.h
@@ -1,7 +1,7 @@
/** @file
RISC-V package definitions.
- Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+ Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -96,6 +96,7 @@
#define SSTATUS_SIE_BIT_POSITION 1
#define SSTATUS_SPP_BIT_POSITION 8
#define RISCV_CSR_SUPERVISOR_SIE 0x104
+#define RISCV_CSR_SUPERVISOR_STVEC 0x105
#define RISCV_CSR_SUPERVISOR_SSCRATCH 0x140
#define RISCV_CSR_SUPERVISOR_SEPC 0x141
#define RISCV_CSR_SUPERVISOR_SCAUSE 0x142
diff --git a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h
index f37d4c20d068..f70723567e22 100644
--- a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h
+++ b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h
@@ -1,7 +1,7 @@
/** @file
RISC-V CPU library definitions.
- Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+ Copyright (c) 2016 - 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -68,4 +68,16 @@ RiscVReadMachineImplementId (VOID);
VOID
RiscVSetSupervisorAddressTranslationRegister(UINT64);
+VOID
+RiscVSetSupervisorScratch (UINT64);
+
+UINT64
+RiscVGetSupervisorScratch (VOID);
+
+VOID
+RiscVSetSupervisorStvec (UINT64);
+
+UINT64
+RiscVGetSupervisorStvec (VOID);
+
#endif
diff --git a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVFirmwareContextLib.h b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVFirmwareContextLib.h
new file mode 100644
index 000000000000..f35c4e0c5123
--- /dev/null
+++ b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVFirmwareContextLib.h
@@ -0,0 +1,43 @@
+/** @file
+ Library to get/set Firmware Context.
+
+ Copyright (c) 2021, Hewlett Packard Development LP. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef RISCV_FIRMWARE_CONTEXT_LIB_H_
+#define RISCV_FIRMWARE_CONTEXT_LIB_H_
+
+#include <Uefi.h>
+#include <IndustryStandard/RiscVOpensbi.h>
+
+/**
+ Get pointer to OpenSBI Firmware Context
+
+ Get the pointer of firmware context.
+
+ @param FirmwareContextPtr Pointer to retrieve pointer to the
+ Firmware Context.
+**/
+VOID
+EFIAPI
+GetFirmwareContextPointer (
+ IN OUT EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT **FirmwareContextPtr
+ );
+
+/**
+ Set pointer to OpenSBI Firmware Context
+
+ Set the pointer of firmware context.
+
+ @param FirmwareContextPtr Pointer to Firmware Context.
+**/
+VOID
+EFIAPI
+SetFirmwareContextPointer (
+ IN EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT *FirmwareContextPtr
+ );
+
+#endif
diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSbiLib/RiscVFirmwareContextSbiLib.c b/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSbiLib/RiscVFirmwareContextSbiLib.c
new file mode 100644
index 000000000000..6125618eaf4d
--- /dev/null
+++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSbiLib/RiscVFirmwareContextSbiLib.c
@@ -0,0 +1,52 @@
+/** @file
+ This iinstance uses RISC-V OpenSBI Firmware Extension SBI to
+ get the pointer of firmware context.
+
+ Copyright (c) 2021 Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include <PiPei.h>
+#include <Library/DebugLib.h>
+#include <Library/RiscVCpuLib.h>
+#include <Library/RiscVEdk2SbiLib.h>
+#include <sbi/sbi_scratch.h>
+#include <sbi/sbi_platform.h>
+
+/**
+ Get pointer to OpenSBI Firmware Context
+
+ Get the pointer of firmware context through OpenSBI FW Extension SBI.
+
+ @param FirmwareContextPtr Pointer to retrieve pointer to the
+ Firmware Context.
+**/
+VOID
+EFIAPI
+GetFirmwareContextPointer (
+ IN OUT EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT **FirmwareContextPtr
+ )
+{
+ SbiGetFirmwareContext (FirmwareContextPtr);
+}
+
+/**
+ Set the pointer to OpenSBI Firmware Context
+
+ Set the pointer of firmware context through OpenSBI FW Extension SBI.
+
+ @param FirmwareContextPtr Pointer to Firmware Context.
+**/
+VOID
+EFIAPI
+SetFirmwareContextPointer (
+ IN EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT *FirmwareContextPtr
+ )
+{
+ //
+ // We don't have to set firmware context pointer using
+ // OpenSBI FW Extension SBI.
+ //
+}
+
diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSscratchLib/RiscVFirmwareContextSscratchLib.c b/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSscratchLib/RiscVFirmwareContextSscratchLib.c
new file mode 100644
index 000000000000..2504e17132c4
--- /dev/null
+++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSscratchLib/RiscVFirmwareContextSscratchLib.c
@@ -0,0 +1,48 @@
+/** @file
+ This instance uses Supervisor mode SCRATCH CSR to get/set the
+ pointer of firmware context.
+
+ Copyright (c) 2021 Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include <PiPei.h>
+
+#include <IndustryStandard/RiscVOpensbi.h>
+
+#include <Library/DebugLib.h>
+#include <Library/RiscVCpuLib.h>
+
+/**
+ Get pointer to OpenSBI Firmware Context
+
+ Get the pointer of firmware context through Supervisor mode SCRATCH CSR.
+
+ @param FirmwareContextPtr Pointer to retrieve pointer to the
+ Firmware Context.
+**/
+VOID
+EFIAPI
+GetFirmwareContextPointer (
+ IN OUT EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT **FirmwareContextPtr
+ )
+{
+ *FirmwareContextPtr = (EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT *)RiscVGetSupervisorScratch ();
+}
+
+/**
+ Set the pointer to OpenSBI Firmware Context
+
+ Set the pointer of firmware context through Supervisor mode SCRATCH CSR.
+
+ @param FirmwareContextPtr Pointer to Firmware Context.
+**/
+VOID
+EFIAPI
+SetFirmwareContextPointer (
+ IN EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT *FirmwareContextPtr
+ )
+{
+ RiscVSetSupervisorScratch ((UINT64)FirmwareContextPtr);
+}
diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextStvecLib/RiscVFirmwareContextStvecLib.c b/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextStvecLib/RiscVFirmwareContextStvecLib.c
new file mode 100644
index 000000000000..7d1675355a50
--- /dev/null
+++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextStvecLib/RiscVFirmwareContextStvecLib.c
@@ -0,0 +1,48 @@
+/** @file
+ This instance uses This iinstance Supervisor mode STVEC CSR to
+ get/set the pointer of firmware context.
+
+ Copyright (c) 2021 Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include <PiPei.h>
+
+#include <IndustryStandard/RiscVOpensbi.h>
+
+#include <Library/DebugLib.h>
+#include <Library/RiscVCpuLib.h>
+
+/**
+ Get pointer to OpenSBI Firmware Context
+
+ Get the pointer of firmware context through Supervisor mode STVEC CSR.
+
+ @param FirmwareContextPtr Pointer to retrieve pointer to the
+ Firmware Context.
+**/
+VOID
+EFIAPI
+GetFirmwareContextPointer (
+ IN OUT EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT **FirmwareContextPtr
+ )
+{
+ *FirmwareContextPtr = (EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT *)RiscVGetSupervisorStvec ();
+}
+
+/**
+ Set pointer to OpenSBI Firmware Context
+
+ Set the pointer of firmware context through Supervisor mode STVEC CSR
+
+ @param FirmwareContextPtr Pointer to Firmware Context.
+**/
+VOID
+EFIAPI
+SetFirmwareContextPointer (
+ IN EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT *FirmwareContextPtr
+ )
+{
+ RiscVSetSupervisorStvec ((UINT64)FirmwareContextPtr);
+}
diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/Cpu.S b/Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/Cpu.S
index 06ba80cb5fcb..e242c9b866a1 100644
--- a/Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/Cpu.S
+++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/Cpu.S
@@ -2,7 +2,7 @@
//
// RISC-V CPU functions.
//
-// Copyright (c) 2016 - 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+// Copyright (c) 2016 - 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
//
// SPDX-License-Identifier: BSD-2-Clause-Patent
//
@@ -101,6 +101,38 @@ ASM_FUNC (RiscVReadMachineImplementId)
csrr a0, RISCV_CSR_MACHINE_MIMPID
ret
+//
+// Set Supervisor mode scratch.
+// @param a0 : Value set to Supervisor mode scratch
+//
+ASM_FUNC (RiscVSetSupervisorScratch)
+ csrrw a1, RISCV_CSR_SUPERVISOR_SSCRATCH, a0
+ ret
+
+//
+// Get Supervisor mode scratch.
+// @retval a0 : Value in Supervisor mode scratch
+//
+ASM_FUNC (RiscVGetSupervisorScratch)
+ csrr a0, RISCV_CSR_SUPERVISOR_SSCRATCH
+ ret
+
+//
+// Set Supervisor mode trap vector.
+// @param a0 : Value set to Supervisor mode trap vector
+//
+ASM_FUNC (RiscVSetSupervisorStvec)
+ csrrw a1, RISCV_CSR_SUPERVISOR_STVEC, a0
+ ret
+
+//
+// Get Supervisor mode scratch.
+// @retval a0 : Value in Supervisor mode trap vector
+//
+ASM_FUNC (RiscVGetSupervisorStvec)
+ csrr a0, RISCV_CSR_SUPERVISOR_STVEC
+ ret
+
//
// Set Supervisor Address Translation and
// Protection Register.
--
2.31.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [edk2-platforms] [PATCH v3 05/14] Silicon/RISC-V: PeiServiceTableLib uses RiscVFirmwareContextLib
2021-10-19 3:48 [edk2-platforms] [PATCH v3 00/14] Use generic OpenSBI platform Daniel Schaefer
` (3 preceding siblings ...)
2021-10-19 3:48 ` [edk2-platforms] [PATCH v3 04/14] Silicon/RISC-V: Introduce FirmwareContext library Daniel Schaefer
@ 2021-10-19 3:48 ` Daniel Schaefer
2021-10-19 3:48 ` [edk2-platforms] [PATCH v3 06/14] SiFive/U5SeriesPkg: Use FirmwareContext library Daniel Schaefer
` (9 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Daniel Schaefer @ 2021-10-19 3:48 UTC (permalink / raw)
To: devel; +Cc: Abner Chang, Sunil V L, Daniel Schaefer
From: Abner Chang <abner.chang@hpe.com>
Use RISC-V FirmwareContext library to set and get the
pointer of PeiService.
Cc: Sunil V L <sunilvl@ventanamicro.com>
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
Reviewed-by: Daniel Schaefer <daniel.schaefer@hpe.com>
Signed-off-by: Abner Chang <abner.chang@hpe.com>
---
Silicon/RISC-V/ProcessorPkg/Library/PeiServicesTablePointerLibOpenSbi/PeiServicesTablePointerLibOpenSbi.inf | 4 ++--
Silicon/RISC-V/ProcessorPkg/Library/PeiServicesTablePointerLibOpenSbi/PeiServicesTablePointerOpenSbi.c | 8 ++++----
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/Silicon/RISC-V/ProcessorPkg/Library/PeiServicesTablePointerLibOpenSbi/PeiServicesTablePointerLibOpenSbi.inf b/Silicon/RISC-V/ProcessorPkg/Library/PeiServicesTablePointerLibOpenSbi/PeiServicesTablePointerLibOpenSbi.inf
index f23272016b72..fa9fe7851864 100644
--- a/Silicon/RISC-V/ProcessorPkg/Library/PeiServicesTablePointerLibOpenSbi/PeiServicesTablePointerLibOpenSbi.inf
+++ b/Silicon/RISC-V/ProcessorPkg/Library/PeiServicesTablePointerLibOpenSbi/PeiServicesTablePointerLibOpenSbi.inf
@@ -4,7 +4,7 @@
# PEI Services Table Pointer Library implementation that retrieves a pointer to the
# PEI Services Table from a RISC-V OpenSBI sbi_platform firmware context structure.
#
-# Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -35,5 +35,5 @@
[LibraryClasses]
DebugLib
RiscVCpuLib
- RiscVEdk2SbiLib
+ RiscVFirmwareContextLib
diff --git a/Silicon/RISC-V/ProcessorPkg/Library/PeiServicesTablePointerLibOpenSbi/PeiServicesTablePointerOpenSbi.c b/Silicon/RISC-V/ProcessorPkg/Library/PeiServicesTablePointerLibOpenSbi/PeiServicesTablePointerOpenSbi.c
index 0c1473e93288..9aa74b4f9fbf 100644
--- a/Silicon/RISC-V/ProcessorPkg/Library/PeiServicesTablePointerLibOpenSbi/PeiServicesTablePointerOpenSbi.c
+++ b/Silicon/RISC-V/ProcessorPkg/Library/PeiServicesTablePointerLibOpenSbi/PeiServicesTablePointerOpenSbi.c
@@ -1,7 +1,7 @@
/** @file
PEI Services Table Pointer Library.
- Copyright (c) 2019 - 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+ Copyright (c) 2019 - 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -9,7 +9,7 @@
#include <PiPei.h>
#include <Library/DebugLib.h>
#include <Library/RiscVCpuLib.h>
-#include <Library/RiscVEdk2SbiLib.h>
+#include <Library/RiscVFirmwareContextLib.h>
#include <Library/PeiServicesTablePointerLib.h>
#include <sbi/sbi_scratch.h>
#include <sbi/sbi_platform.h>
@@ -32,8 +32,8 @@ SetPeiServicesTablePointer (
)
{
EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT *FirmwareContext;
- SbiGetFirmwareContext (&FirmwareContext);
+ GetFirmwareContextPointer (&FirmwareContext);
FirmwareContext->PeiServiceTable = (VOID *)(UINTN)PeiServicesTablePointer;
DEBUG ((DEBUG_INFO, "Set PEI Service 0x%x at OpenSBI Firmware Context at 0x%x\n",
@@ -61,8 +61,8 @@ GetPeiServicesTablePointer (
)
{
EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT *FirmwareContext;
- SbiGetFirmwareContext (&FirmwareContext);
+ GetFirmwareContextPointer (&FirmwareContext);
return (CONST EFI_PEI_SERVICES **)FirmwareContext->PeiServiceTable;
}
--
2.31.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [edk2-platforms] [PATCH v3 06/14] SiFive/U5SeriesPkg: Use FirmwareContext library
2021-10-19 3:48 [edk2-platforms] [PATCH v3 00/14] Use generic OpenSBI platform Daniel Schaefer
` (4 preceding siblings ...)
2021-10-19 3:48 ` [edk2-platforms] [PATCH v3 05/14] Silicon/RISC-V: PeiServiceTableLib uses RiscVFirmwareContextLib Daniel Schaefer
@ 2021-10-19 3:48 ` Daniel Schaefer
2021-10-19 3:48 ` [edk2-platforms] [PATCH v3 07/14] U540: Add and build device tree Daniel Schaefer
` (8 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Daniel Schaefer @ 2021-10-19 3:48 UTC (permalink / raw)
To: devel; +Cc: Abner Chang, Sunil V L, Daniel Schaefer
From: Abner Chang <abner.chang@hpe.com>
Use RISC-V FirmwareContext library to set and get the
pointer of PeiService on SiFive U5 series platforms.
Cc: Sunil V L <sunilvl@ventanamicro.com>
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
Reviewed-by: Daniel Schaefer <daniel.schaefer@hpe.com>
Signed-off-by: Abner Chang <abner.chang@hpe.com>
---
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
index 18a99b86d849..2b00176c27a0 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
@@ -174,6 +174,7 @@
[LibraryClasses.common.PEI_CORE]
HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
PeiServicesTablePointerLib|Silicon/RISC-V/ProcessorPkg/Library/PeiServicesTablePointerLibOpenSbi/PeiServicesTablePointerLibOpenSbi.inf
+ RiscVFirmwareContextLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSscratchLib/RiscVFirmwareContextSscratchLib.inf
PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf
MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
PeiCoreEntryPoint|MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf
@@ -190,6 +191,7 @@
[LibraryClasses.common.PEIM]
HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
PeiServicesTablePointerLib|Silicon/RISC-V/ProcessorPkg/Library/PeiServicesTablePointerLibOpenSbi/PeiServicesTablePointerLibOpenSbi.inf
+ RiscVFirmwareContextLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSscratchLib/RiscVFirmwareContextSscratchLib.inf
PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf
MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf
--
2.31.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [edk2-platforms] [PATCH v3 07/14] U540: Add and build device tree
2021-10-19 3:48 [edk2-platforms] [PATCH v3 00/14] Use generic OpenSBI platform Daniel Schaefer
` (5 preceding siblings ...)
2021-10-19 3:48 ` [edk2-platforms] [PATCH v3 06/14] SiFive/U5SeriesPkg: Use FirmwareContext library Daniel Schaefer
@ 2021-10-19 3:48 ` Daniel Schaefer
2021-10-19 3:48 ` [edk2-platforms] [PATCH v3 08/14] RISC-V/PlatformPkg: Build DeviceTree and use that in SEC Daniel Schaefer
` (7 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Daniel Schaefer @ 2021-10-19 3:48 UTC (permalink / raw)
To: devel; +Cc: Daniel Schaefer, Abner Chang, Sunil V L
Cc: Daniel Schaefer <daniel.schaefer>
Cc: Abner Chang <abner.chang@hpe.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Abner Chang <abner.chang@hpe.com>
Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
---
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc | 2 +
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf | 6 +
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTree/U540DeviceTree.inf | 25 ++
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTree/gpio.h | 42 +++
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTree/sifive-fu540-prci.h | 18 ++
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTree.fdf.inc | 35 +++
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTree/fu540-c000.dtsi | 287 ++++++++++++++++++++
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTree/hifive-unleashed-a00.dts | 106 ++++++++
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf.inc | 8 +-
9 files changed, 526 insertions(+), 3 deletions(-)
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
index 2b00176c27a0..e971993b7b00 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
@@ -489,6 +489,8 @@
MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
+ Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTree/U540DeviceTree.inf
+
#
# SMBIOS Support
#
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf
index 74717377287b..820e19d11334 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf
@@ -33,6 +33,7 @@ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDxeFvBase|gUefiRiscVPlatformPkgToken
FV = FVMAIN_COMPACT
!include VarStore.fdf.inc
+!include DeviceTree.fdf.inc
################################################################################
@@ -325,3 +326,8 @@ FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
RAW ACPI |.acpi
RAW ASL |.aml
}
+
+[Rule.Common.USER_DEFINED.DTB]
+ FILE FREEFORM = $(NAMED_GUID) {
+ RAW BIN |.dtb
+ }
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTree/U540DeviceTree.inf b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTree/U540DeviceTree.inf
new file mode 100644
index 000000000000..ebf0881c68bd
--- /dev/null
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTree/U540DeviceTree.inf
@@ -0,0 +1,25 @@
+## @file
+#
+# Device tree description of the Hifive Unleashed platform
+#
+# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001A
+ BASE_NAME = U540DeviceTree
+ FILE_GUID = 25462CDA-221F-47DF-AC1D-259CFAA4E326 # gDtPlatformDefaultDtbFileGuid
+ MODULE_TYPE = USER_DEFINED
+ VERSION_STRING = 1.0
+
+[Sources]
+ gpio.h
+ hifive-unleashed-a00.dts
+ fu540-c000.dtsi
+ sifive-fu540-prci.h
+
+[Packages]
+ MdePkg/MdePkg.dec
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTree/gpio.h b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTree/gpio.h
new file mode 100644
index 000000000000..c029467e828b
--- /dev/null
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTree/gpio.h
@@ -0,0 +1,42 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * This header provides constants for most GPIO bindings.
+ *
+ * Most GPIO bindings include a flags cell as part of the GPIO specifier.
+ * In most cases, the format of the flags cell uses the standard values
+ * defined in this header.
+ */
+
+#ifndef _DT_BINDINGS_GPIO_GPIO_H
+#define _DT_BINDINGS_GPIO_GPIO_H
+
+/* Bit 0 express polarity */
+#define GPIO_ACTIVE_HIGH 0
+#define GPIO_ACTIVE_LOW 1
+
+/* Bit 1 express single-endedness */
+#define GPIO_PUSH_PULL 0
+#define GPIO_SINGLE_ENDED 2
+
+/* Bit 2 express Open drain or open source */
+#define GPIO_LINE_OPEN_SOURCE 0
+#define GPIO_LINE_OPEN_DRAIN 4
+
+/*
+ * Open Drain/Collector is the combination of single-ended open drain interface.
+ * Open Source/Emitter is the combination of single-ended open source interface.
+ */
+#define GPIO_OPEN_DRAIN (GPIO_SINGLE_ENDED | GPIO_LINE_OPEN_DRAIN)
+#define GPIO_OPEN_SOURCE (GPIO_SINGLE_ENDED | GPIO_LINE_OPEN_SOURCE)
+
+/* Bit 3 express GPIO suspend/resume and reset persistence */
+#define GPIO_PERSISTENT 0
+#define GPIO_TRANSITORY 8
+
+/* Bit 4 express pull up */
+#define GPIO_PULL_UP 16
+
+/* Bit 5 express pull down */
+#define GPIO_PULL_DOWN 32
+
+#endif
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTree/sifive-fu540-prci.h b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTree/sifive-fu540-prci.h
new file mode 100644
index 000000000000..6a0b70a37d78
--- /dev/null
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTree/sifive-fu540-prci.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018-2019 SiFive, Inc.
+ * Wesley Terpstra
+ * Paul Walmsley
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_SIFIVE_FU540_PRCI_H
+#define __DT_BINDINGS_CLOCK_SIFIVE_FU540_PRCI_H
+
+/* Clock indexes for use by Device Tree data and the PRCI driver */
+
+#define PRCI_CLK_COREPLL 0
+#define PRCI_CLK_DDRPLL 1
+#define PRCI_CLK_GEMGXLPLL 2
+#define PRCI_CLK_TLCLK 3
+
+#endif
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTree.fdf.inc b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTree.fdf.inc
new file mode 100644
index 000000000000..fb28be2767e7
--- /dev/null
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTree.fdf.inc
@@ -0,0 +1,35 @@
+## @file
+# FDF include file with Layout Regions that define an empty variable store.
+#
+# Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+# Copyright (C) 2014, Red Hat, Inc.
+# Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+$(DTB_OFFSET)|$(DTB_SIZE)
+gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDtbFvBase|gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDtbFvSize
+FV = DTBFV
+
+[FV.DTBFV]
+BlockSize = 0x1000
+FvAlignment = 16
+ERASE_POLARITY = 1
+MEMORY_MAPPED = TRUE
+STICKY_WRITE = TRUE
+LOCK_CAP = TRUE
+LOCK_STATUS = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP = TRUE
+WRITE_STATUS = TRUE
+WRITE_LOCK_CAP = TRUE
+WRITE_LOCK_STATUS = TRUE
+READ_DISABLED_CAP = TRUE
+READ_ENABLED_CAP = TRUE
+READ_STATUS = TRUE
+READ_LOCK_CAP = TRUE
+READ_LOCK_STATUS = TRUE
+
+INF RuleOverride = DTB Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTree/U540DeviceTree.inf
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTree/fu540-c000.dtsi b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTree/fu540-c000.dtsi
new file mode 100644
index 000000000000..e44b6f7c562e
--- /dev/null
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTree/fu540-c000.dtsi
@@ -0,0 +1,287 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/* Copyright (c) 2018-2019 SiFive, Inc */
+
+/dts-v1/;
+
+/*#include <dt-bindings/clock/sifive-fu540-prci.h>*/
+#include "sifive-fu540-prci.h"
+
+/ {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ compatible = "sifive,fu540-c000", "sifive,fu540";
+
+ aliases {
+ serial0 = &uart0;
+ serial1 = &uart1;
+ ethernet0 = ð0;
+ };
+
+ chosen {
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cpu0: cpu@0 {
+ compatible = "sifive,e51", "sifive,rocket0", "riscv";
+ device_type = "cpu";
+ i-cache-block-size = <64>;
+ i-cache-sets = <128>;
+ i-cache-size = <16384>;
+ reg = <0>;
+ riscv,isa = "rv64imac";
+ status = "disabled";
+ cpu0_intc: interrupt-controller {
+ #interrupt-cells = <1>;
+ compatible = "riscv,cpu-intc";
+ interrupt-controller;
+ };
+ };
+ cpu1: cpu@1 {
+ compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
+ d-cache-block-size = <64>;
+ d-cache-sets = <64>;
+ d-cache-size = <32768>;
+ d-tlb-sets = <1>;
+ d-tlb-size = <32>;
+ device_type = "cpu";
+ i-cache-block-size = <64>;
+ i-cache-sets = <64>;
+ i-cache-size = <32768>;
+ i-tlb-sets = <1>;
+ i-tlb-size = <32>;
+ mmu-type = "riscv,sv39";
+ reg = <1>;
+ riscv,isa = "rv64imafdc";
+ tlb-split;
+ next-level-cache = <&l2cache>;
+ cpu1_intc: interrupt-controller {
+ #interrupt-cells = <1>;
+ compatible = "riscv,cpu-intc";
+ interrupt-controller;
+ };
+ };
+ cpu2: cpu@2 {
+ compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
+ d-cache-block-size = <64>;
+ d-cache-sets = <64>;
+ d-cache-size = <32768>;
+ d-tlb-sets = <1>;
+ d-tlb-size = <32>;
+ device_type = "cpu";
+ i-cache-block-size = <64>;
+ i-cache-sets = <64>;
+ i-cache-size = <32768>;
+ i-tlb-sets = <1>;
+ i-tlb-size = <32>;
+ mmu-type = "riscv,sv39";
+ reg = <2>;
+ riscv,isa = "rv64imafdc";
+ tlb-split;
+ next-level-cache = <&l2cache>;
+ cpu2_intc: interrupt-controller {
+ #interrupt-cells = <1>;
+ compatible = "riscv,cpu-intc";
+ interrupt-controller;
+ };
+ };
+ cpu3: cpu@3 {
+ compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
+ d-cache-block-size = <64>;
+ d-cache-sets = <64>;
+ d-cache-size = <32768>;
+ d-tlb-sets = <1>;
+ d-tlb-size = <32>;
+ device_type = "cpu";
+ i-cache-block-size = <64>;
+ i-cache-sets = <64>;
+ i-cache-size = <32768>;
+ i-tlb-sets = <1>;
+ i-tlb-size = <32>;
+ mmu-type = "riscv,sv39";
+ reg = <3>;
+ riscv,isa = "rv64imafdc";
+ tlb-split;
+ next-level-cache = <&l2cache>;
+ cpu3_intc: interrupt-controller {
+ #interrupt-cells = <1>;
+ compatible = "riscv,cpu-intc";
+ interrupt-controller;
+ };
+ };
+ cpu4: cpu@4 {
+ compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
+ d-cache-block-size = <64>;
+ d-cache-sets = <64>;
+ d-cache-size = <32768>;
+ d-tlb-sets = <1>;
+ d-tlb-size = <32>;
+ device_type = "cpu";
+ i-cache-block-size = <64>;
+ i-cache-sets = <64>;
+ i-cache-size = <32768>;
+ i-tlb-sets = <1>;
+ i-tlb-size = <32>;
+ mmu-type = "riscv,sv39";
+ reg = <4>;
+ riscv,isa = "rv64imafdc";
+ tlb-split;
+ next-level-cache = <&l2cache>;
+ cpu4_intc: interrupt-controller {
+ #interrupt-cells = <1>;
+ compatible = "riscv,cpu-intc";
+ interrupt-controller;
+ };
+ };
+ };
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ compatible = "sifive,fu540-c000", "sifive,fu540", "simple-bus";
+ ranges;
+ plic0: interrupt-controller@c000000 {
+ #interrupt-cells = <1>;
+ compatible = "sifive,plic-1.0.0";
+ reg = <0x0 0xc000000 0x0 0x4000000>;
+ riscv,ndev = <53>;
+ interrupt-controller;
+ interrupts-extended = <
+ &cpu0_intc 0xffffffff
+ &cpu1_intc 0xffffffff &cpu1_intc 9
+ &cpu2_intc 0xffffffff &cpu2_intc 9
+ &cpu3_intc 0xffffffff &cpu3_intc 9
+ &cpu4_intc 0xffffffff &cpu4_intc 9>;
+ };
+ prci: clock-controller@10000000 {
+ compatible = "sifive,fu540-c000-prci";
+ reg = <0x0 0x10000000 0x0 0x1000>;
+ clocks = <&hfclk>, <&rtcclk>;
+ #clock-cells = <1>;
+ };
+ uart0: serial@10010000 {
+ compatible = "sifive,fu540-c000-uart", "sifive,uart0";
+ reg = <0x0 0x10010000 0x0 0x1000>;
+ interrupt-parent = <&plic0>;
+ interrupts = <4>;
+ clocks = <&prci PRCI_CLK_TLCLK>;
+ status = "disabled";
+ };
+ dma: dma@3000000 {
+ compatible = "sifive,fu540-c000-pdma";
+ reg = <0x0 0x3000000 0x0 0x8000>;
+ interrupt-parent = <&plic0>;
+ interrupts = <23 24 25 26 27 28 29 30>;
+ #dma-cells = <1>;
+ };
+ uart1: serial@10011000 {
+ compatible = "sifive,fu540-c000-uart", "sifive,uart0";
+ reg = <0x0 0x10011000 0x0 0x1000>;
+ interrupt-parent = <&plic0>;
+ interrupts = <5>;
+ clocks = <&prci PRCI_CLK_TLCLK>;
+ status = "disabled";
+ };
+ i2c0: i2c@10030000 {
+ compatible = "sifive,fu540-c000-i2c", "sifive,i2c0";
+ reg = <0x0 0x10030000 0x0 0x1000>;
+ interrupt-parent = <&plic0>;
+ interrupts = <50>;
+ clocks = <&prci PRCI_CLK_TLCLK>;
+ reg-shift = <2>;
+ reg-io-width = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+ qspi0: spi@10040000 {
+ compatible = "sifive,fu540-c000-spi", "sifive,spi0";
+ reg = <0x0 0x10040000 0x0 0x1000
+ 0x0 0x20000000 0x0 0x10000000>;
+ interrupt-parent = <&plic0>;
+ interrupts = <51>;
+ clocks = <&prci PRCI_CLK_TLCLK>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+ qspi1: spi@10041000 {
+ compatible = "sifive,fu540-c000-spi", "sifive,spi0";
+ reg = <0x0 0x10041000 0x0 0x1000
+ 0x0 0x30000000 0x0 0x10000000>;
+ interrupt-parent = <&plic0>;
+ interrupts = <52>;
+ clocks = <&prci PRCI_CLK_TLCLK>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+ qspi2: spi@10050000 {
+ compatible = "sifive,fu540-c000-spi", "sifive,spi0";
+ reg = <0x0 0x10050000 0x0 0x1000>;
+ interrupt-parent = <&plic0>;
+ interrupts = <6>;
+ clocks = <&prci PRCI_CLK_TLCLK>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+ eth0: ethernet@10090000 {
+ compatible = "sifive,fu540-c000-gem";
+ interrupt-parent = <&plic0>;
+ interrupts = <53>;
+ reg = <0x0 0x10090000 0x0 0x2000
+ 0x0 0x100a0000 0x0 0x1000>;
+ local-mac-address = [00 00 00 00 00 00];
+ clock-names = "pclk", "hclk";
+ clocks = <&prci PRCI_CLK_GEMGXLPLL>,
+ <&prci PRCI_CLK_GEMGXLPLL>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+ pwm0: pwm@10020000 {
+ compatible = "sifive,fu540-c000-pwm", "sifive,pwm0";
+ reg = <0x0 0x10020000 0x0 0x1000>;
+ interrupt-parent = <&plic0>;
+ interrupts = <42 43 44 45>;
+ clocks = <&prci PRCI_CLK_TLCLK>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+ pwm1: pwm@10021000 {
+ compatible = "sifive,fu540-c000-pwm", "sifive,pwm0";
+ reg = <0x0 0x10021000 0x0 0x1000>;
+ interrupt-parent = <&plic0>;
+ interrupts = <46 47 48 49>;
+ clocks = <&prci PRCI_CLK_TLCLK>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+ l2cache: cache-controller@2010000 {
+ compatible = "sifive,fu540-c000-ccache", "cache";
+ cache-block-size = <64>;
+ cache-level = <2>;
+ cache-sets = <1024>;
+ cache-size = <2097152>;
+ cache-unified;
+ interrupt-parent = <&plic0>;
+ interrupts = <1 2 3>;
+ reg = <0x0 0x2010000 0x0 0x1000>;
+ };
+ gpio: gpio@10060000 {
+ compatible = "sifive,fu540-c000-gpio", "sifive,gpio0";
+ interrupt-parent = <&plic0>;
+ interrupts = <7>, <8>, <9>, <10>, <11>, <12>, <13>,
+ <14>, <15>, <16>, <17>, <18>, <19>, <20>,
+ <21>, <22>;
+ reg = <0x0 0x10060000 0x0 0x1000>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clocks = <&prci PRCI_CLK_TLCLK>;
+ status = "disabled";
+ };
+ };
+};
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTree/hifive-unleashed-a00.dts b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTree/hifive-unleashed-a00.dts
new file mode 100644
index 000000000000..df06f1c8c435
--- /dev/null
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTree/hifive-unleashed-a00.dts
@@ -0,0 +1,106 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/* Copyright (c) 2018-2019 SiFive, Inc */
+
+#include "fu540-c000.dtsi"
+/*#include <dt-bindings/gpio/gpio.h>*/
+#include "gpio.h"
+
+/* Clock frequency (in Hz) of the PCB crystal for rtcclk */
+#define RTCCLK_FREQ 1000000
+
+/ {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ model = "SiFive HiFive Unleashed A00";
+ compatible = "sifive,hifive-unleashed-a00", "sifive,fu540-c000";
+
+ chosen {
+ stdout-path = "serial0";
+ };
+
+ cpus {
+ timebase-frequency = <RTCCLK_FREQ>;
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x0 0x80000000 0x2 0x00000000>;
+ };
+
+ soc {
+ };
+
+ hfclk: hfclk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <33333333>;
+ clock-output-names = "hfclk";
+ };
+
+ rtcclk: rtcclk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <RTCCLK_FREQ>;
+ clock-output-names = "rtcclk";
+ };
+ gpio-restart {
+ compatible = "gpio-restart";
+ gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+};
+
+&qspi0 {
+ status = "okay";
+ flash@0 {
+ compatible = "issi,is25wp256", "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <50000000>;
+ m25p,fast-read;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ };
+};
+
+&qspi2 {
+ status = "okay";
+ mmc@0 {
+ compatible = "mmc-spi-slot";
+ reg = <0>;
+ spi-max-frequency = <20000000>;
+ voltage-ranges = <3300 3300>;
+ disable-wp;
+ };
+};
+
+ð0 {
+ status = "okay";
+ phy-mode = "gmii";
+ phy-handle = <&phy0>;
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+};
+
+&pwm0 {
+ status = "okay";
+};
+
+&pwm1 {
+ status = "okay";
+};
+
+&gpio {
+ status = "okay";
+};
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf.inc b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf.inc
index f72947da61af..723632dc792d 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf.inc
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf.inc
@@ -10,8 +10,8 @@
DEFINE BLOCK_SIZE = 0x1000
DEFINE FW_BASE_ADDRESS = 0x80000000
-DEFINE FW_SIZE = 0x00800000
-DEFINE FW_BLOCKS = 0x800
+DEFINE FW_SIZE = 0x00820000
+DEFINE FW_BLOCKS = 0x820
#
# 0x000000-0x7DFFFF code
@@ -32,13 +32,15 @@ DEFINE FVMAIN_OFFSET = 0x00100000 # Must be power of 2 for PMP setting
DEFINE FVMAIN_SIZE = 0x0018C000
DEFINE VARS_OFFSET = 0x007E0000
DEFINE VARS_SIZE = 0x00020000
+DEFINE DTB_OFFSET = 0x00800000
+DEFINE DTB_SIZE = 0x00002000
SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdVariableFdBaseAddress = $(FW_BASE_ADDRESS) + $(VARS_OFFSET)
SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdVariableFdSize = $(VARS_SIZE)
SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdVariableFdBlockSize = $(BLOCK_SIZE)
SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdFwStartAddress = $(CODE_BASE_ADDRESS)
-SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdFwEndAddress = $(CODE_BASE_ADDRESS) + $(SECFV_SIZE) + $(PEIFV_SIZE) + $(SCRATCH_SIZE)
+SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdFwEndAddress = $(CODE_BASE_ADDRESS) + $(SECFV_SIZE) + $(PEIFV_SIZE) + $(SCRATCH_SIZE) + $(DTB_SIZE)
SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdOpenSbiStackSize = 8192
SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdScratchRamBase = $(CODE_BASE_ADDRESS) + $(SCRATCH_OFFSET)
SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdScratchRamSize = $(SCRATCH_SIZE)
--
2.31.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [edk2-platforms] [PATCH v3 08/14] RISC-V/PlatformPkg: Build DeviceTree and use that in SEC
2021-10-19 3:48 [edk2-platforms] [PATCH v3 00/14] Use generic OpenSBI platform Daniel Schaefer
` (6 preceding siblings ...)
2021-10-19 3:48 ` [edk2-platforms] [PATCH v3 07/14] U540: Add and build device tree Daniel Schaefer
@ 2021-10-19 3:48 ` Daniel Schaefer
2021-10-19 3:48 ` [edk2-platforms] [PATCH v3 09/14] RISC-V/PlatformPkg: Add FdtPeim to pass DTB from PEI to DXE via HOB Daniel Schaefer
` (6 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Daniel Schaefer @ 2021-10-19 3:48 UTC (permalink / raw)
To: devel; +Cc: Daniel Schaefer, Abner Chang, Sunil V L
OpenSBI uses the device tree for platform specific initialization, so we
need to have it already in SEC.
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
Cc: Abner Chang <abner.chang@hpe.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Abner Chang <abner.chang@hpe.com>
Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
---
Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec | 4 ++
Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf | 2 +
Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscVOpensbi.h | 1 +
Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c | 49 ++++++++++++++++++++
Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S | 22 ---------
5 files changed, 56 insertions(+), 22 deletions(-)
diff --git a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec b/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec
index 48aeb97431d7..ad15a155fe31 100644
--- a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec
+++ b/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec
@@ -31,6 +31,8 @@
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVPeiFvSize|0x0|UINT32|0x00001003
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDxeFvBase|0x0|UINT32|0x00001004
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDxeFvSize|0x0|UINT32|0x00001005
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDtbFvBase|0x0|UINT32|0x00001016
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDtbFvSize|0x0|UINT32|0x00001017
#
# Definition of EFI Variable region
@@ -66,6 +68,8 @@
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdTemporaryRamSize|0|UINT32|0x00001104
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdPeiCorePrivilegeMode|0|UINT32|0x00001105
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdDeviceTreeAddress|0|UINT32|0x00001106
+
[PcdsPatchableInModule]
[PcdsFeatureFlag]
diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf
index 89bcb039a6ab..78bd75e3ac11 100644
--- a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf
+++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf
@@ -57,6 +57,8 @@
[FixedPcd]
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVPeiFvBase
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVPeiFvSize
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDtbFvBase
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdDeviceTreeAddress
[Pcd]
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootHartId
diff --git a/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscVOpensbi.h b/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscVOpensbi.h
index 2dab696af84d..e7ac6d26ee85 100644
--- a/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscVOpensbi.h
+++ b/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscVOpensbi.h
@@ -47,6 +47,7 @@ typedef struct {
typedef struct {
VOID *PeiServiceTable; // PEI Service table
+ UINT64 FlattenedDeviceTree; // Pointer to Flattened Device tree
EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC *HartSpecific[RISC_V_MAX_HART_SUPPORTED];
} EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT;
diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c
index fa9ecd789a57..0af0b4bac831 100644
--- a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c
+++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c
@@ -557,6 +557,12 @@ VOID EFIAPI PeiCore (
&FirmwareContext
));
ThisSbiPlatform->firmware_context = (unsigned long)&FirmwareContext;
+
+ //
+ // Save Flattened Device tree in firmware context
+ //
+ FirmwareContext.FlattenedDeviceTree = FuncArg1;
+
//
// Set firmware context Hart-specific pointer
//
@@ -647,6 +653,42 @@ RiscVOpenSbiHartSwitchMode (
sbi_hart_switch_mode(FuncArg0, FuncArg1, NextAddr, NextMode, NextVirt);
}
+/**
+ Get device tree address
+
+ @retval The address of Device Tree binary.
+**/
+VOID *
+EFIAPI
+GetDeviceTreeAddress (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_COMMON_SECTION_HEADER *FoundSection;
+
+ if (FixedPcdGet32 (PcdDeviceTreeAddress)) {
+ return (VOID *)*((unsigned long *)FixedPcdGet32 (PcdDeviceTreeAddress));
+ } else if (FixedPcdGet32 (PcdRiscVDtbFvBase)) {
+ Status = FindFfsFileAndSection (
+ (EFI_FIRMWARE_VOLUME_HEADER *)FixedPcdGet32 (PcdRiscVDtbFvBase),
+ EFI_FV_FILETYPE_FREEFORM,
+ EFI_SECTION_RAW,
+ &FoundSection
+ );
+ if (EFI_ERROR(Status)) {
+ DEBUG ((DEBUG_ERROR, "Platform Device Tree is not found from FV.\n"));
+ return NULL;
+ }
+ FoundSection ++;
+ return (VOID *)FoundSection;
+ } else {
+ DEBUG ((DEBUG_ERROR, "Must use DTB either from memory or compiled in FW. PCDs configured incorrectly.\n"));
+ ASSERT (FALSE);
+ }
+ return NULL;
+}
+
/**
This function initilizes hart specific information and SBI.
For the boot hart, it boots system through PEI core and initial SBI in the DXE IPL.
@@ -686,6 +728,13 @@ VOID EFIAPI SecCoreStartUpWithStack(
UINT64 NonBootHartMessageLockValue;
EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC *HartFirmwareContext;
+ Scratch->next_arg1 = (unsigned long)GetDeviceTreeAddress ();
+ if (Scratch->next_arg1 == (unsigned long)NULL) {
+ DEBUG ((DEBUG_ERROR, "Platform Device Tree is not found\n"));
+ ASSERT (FALSE);
+ }
+ DEBUG ((DEBUG_INFO, "DTB address: 0x%08x\n", Scratch->next_arg1));
+
//
// Setup EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC for each hart.
//
diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S b/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S
index 8434d1a4e0e9..0e3940180d44 100644
--- a/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S
+++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S
@@ -75,11 +75,6 @@ _scratch_init:
sd a4, SBI_SCRATCH_FW_START_OFFSET(tp)
sd a5, SBI_SCRATCH_FW_SIZE_OFFSET(tp)
- /*
- * Note: fw_next_arg1() uses a0, a1, and ra
- */
- call fw_next_arg1
- sd a0, SBI_SCRATCH_NEXT_ARG1_OFFSET(tp) /* Save agr1 in scratch buffer*/
/*
Note: fw_next_addr()uses a0, a1, and ra
*/
@@ -500,23 +495,6 @@ _reset_regs:
csrw CSR_MSCRATCH, 0
ret
- .align 3
- .section .entry, "ax", %progbits
- .global fw_prev_arg1
-fw_prev_arg1:
-
- /* We return previous arg1 in 'a0' */
- add a0, zero, zero
- ret
-
- .align 3
- .section .entry, "ax", %progbits
- .global fw_next_arg1
-fw_next_arg1:
- /* We return next arg1 in 'a0' */
- li a0, FixedPcdGet32(PcdRiscVPeiFvBase)
- ret
-
.align 3
.section .entry, "ax", %progbits
.global fw_next_addr
--
2.31.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [edk2-platforms] [PATCH v3 09/14] RISC-V/PlatformPkg: Add FdtPeim to pass DTB from PEI to DXE via HOB
2021-10-19 3:48 [edk2-platforms] [PATCH v3 00/14] Use generic OpenSBI platform Daniel Schaefer
` (7 preceding siblings ...)
2021-10-19 3:48 ` [edk2-platforms] [PATCH v3 08/14] RISC-V/PlatformPkg: Build DeviceTree and use that in SEC Daniel Schaefer
@ 2021-10-19 3:48 ` Daniel Schaefer
2021-10-19 3:48 ` [edk2-platforms] [PATCH v3 10/14] RISC-V/PlatformPkg: Fixup FDT from HOB and install into config table Daniel Schaefer
` (5 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Daniel Schaefer @ 2021-10-19 3:48 UTC (permalink / raw)
To: devel; +Cc: Abner Chang, daniel.schaefer, Sunil V L
From: Abner Chang <abner.chang@hpe.com>
Cc: Daniel Schaefer <daniel.schaefer>
Cc: Abner Chang <abner.chang@hpe.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Abner Chang <abner.chang@hpe.com>
Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
---
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc | 5 ++
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf | 1 +
Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.inf | 49 ++++++++++++++
Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.c | 70 ++++++++++++++++++++
Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/opensbi | 2 +-
5 files changed, 126 insertions(+), 1 deletion(-)
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
index e971993b7b00..4fab3c4bdcbb 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
@@ -150,6 +150,10 @@
RiscVPlatformTimerLib|Platform/SiFive/U5SeriesPkg/Library/RiscVPlatformTimerLib/RiscVPlatformTimerLib.inf
CpuExceptionHandlerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVExceptionLib/CpuExceptionHandlerDxeLib.inf
+
+ # Flattened Device Tree (FDT) access library
+ FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf
+
[LibraryClasses.common.SEC]
!ifdef $(DEBUG_ON_SERIAL_PORT)
DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
@@ -400,6 +404,7 @@
<LibraryClasses>
PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
}
+ Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.inf
#
# DXE Phase modules
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf
index 820e19d11334..f0bd65fad648 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf
@@ -101,6 +101,7 @@ INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
# RISC-V Platform PEI Driver
INF Platform/RISC-V/PlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf
+INF Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.inf
################################################################################
diff --git a/Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.inf b/Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.inf
new file mode 100644
index 000000000000..8dc58f0a8bf4
--- /dev/null
+++ b/Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.inf
@@ -0,0 +1,49 @@
+## @file
+# The FDT Peim driver is used to pass the device tree to DXE phase.
+#
+# Copyright (c) 2021, Hewlett Packard Enterprise Developmente LP. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = FdtPei
+ MODULE_UNI_FILE = FdtPei.uni
+ FILE_GUID = 724FD5E9-F35E-4386-B1E1-2ADA6103C4F9
+ MODULE_TYPE = PEIM
+ VERSION_STRING = 1.0
+
+ ENTRY_POINT = PeimPassFdt
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = RISCV64
+#
+
+[Sources]
+ FdtPeim.c
+
+[Packages]
+ EmbeddedPkg/EmbeddedPkg.dec
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec
+
+[LibraryClasses]
+ DebugLib
+ DebugLib
+ HobLib
+ FdtLib
+ PcdLib
+ PeiServicesLib
+ PeimEntryPoint
+ RiscVFirmwareContextLib
+
+[Guids]
+ gFdtHobGuid ## PRODUCES
+
+[Depex]
+ TRUE
diff --git a/Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.c b/Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.c
new file mode 100644
index 000000000000..2cd94f291c7d
--- /dev/null
+++ b/Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.c
@@ -0,0 +1,70 @@
+/** @file
+The module to pass the device tree to DXE via HOB.
+
+Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Library/DebugLib.h>
+#include <Library/HobLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/RiscVFirmwareContextLib.h>
+
+#include <libfdt.h>
+
+#include <Guid/FdtHob.h>
+
+/**
+ The entrypoint of the module, it will pass the FDT via a HOB.
+
+ @param FileHandle Handle of the file being invoked.
+ @param PeiServices Describes the list of possible PEI Services.
+
+ @retval TODO
+**/
+EFI_STATUS
+EFIAPI
+PeimPassFdt (
+ IN EFI_PEI_FILE_HANDLE FileHandle,
+ IN CONST EFI_PEI_SERVICES **PeiServices
+ )
+{
+ VOID *FdtPointer;
+ VOID *Base;
+ VOID *NewBase;
+ UINTN FdtSize;
+ UINTN FdtPages;
+ UINT64 *FdtHobData;
+ EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT *FirmwareContext;
+
+ FirmwareContext = NULL;
+ GetFirmwareContextPointer (&FirmwareContext);
+
+ if (FirmwareContext == NULL) {
+ DEBUG((DEBUG_ERROR, "%a: OpenSBI Firmware Context is NULL\n", __FUNCTION__));
+ return EFI_UNSUPPORTED;
+ }
+ FdtPointer = (VOID *)FirmwareContext->FlattenedDeviceTree;
+ if (FdtPointer == NULL) {
+ DEBUG((DEBUG_ERROR, "%a: Invalid FDT pointer\n", __FUNCTION__));
+ return EFI_UNSUPPORTED;
+ }
+ DEBUG((DEBUG_ERROR, "%a: Build FDT HOB - FDT at address: 0x%x \n", __FUNCTION__, FdtPointer));
+ Base = FdtPointer;
+ ASSERT (Base != NULL);
+ ASSERT (fdt_check_header (Base) == 0);
+
+ FdtSize = fdt_totalsize (Base);
+ FdtPages = EFI_SIZE_TO_PAGES (FdtSize);
+ NewBase = AllocatePages (FdtPages);
+ ASSERT (NewBase != NULL);
+ fdt_open_into (Base, NewBase, EFI_PAGES_TO_SIZE (FdtPages));
+
+ FdtHobData = BuildGuidHob (&gFdtHobGuid, sizeof *FdtHobData);
+ ASSERT (FdtHobData != NULL);
+ *FdtHobData = (UINTN)NewBase;
+
+ return EFI_SUCCESS;
+}
diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/opensbi b/Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/opensbi
index 937caee08331..a731c7e36988 160000
--- a/Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/opensbi
+++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/opensbi
@@ -1 +1 @@
-Subproject commit 937caee0833115f69d697ca190001ba0aa5c7368
+Subproject commit a731c7e36988c3308e1978ecde491f2f6182d490
--
2.31.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [edk2-platforms] [PATCH v3 10/14] RISC-V/PlatformPkg: Fixup FDT from HOB and install into config table
2021-10-19 3:48 [edk2-platforms] [PATCH v3 00/14] Use generic OpenSBI platform Daniel Schaefer
` (8 preceding siblings ...)
2021-10-19 3:48 ` [edk2-platforms] [PATCH v3 09/14] RISC-V/PlatformPkg: Add FdtPeim to pass DTB from PEI to DXE via HOB Daniel Schaefer
@ 2021-10-19 3:48 ` Daniel Schaefer
2021-10-19 3:48 ` [edk2-platforms] [PATCH v3 11/14] U5SeriesPkg: Switch to generic OpenSBI platform Daniel Schaefer
` (4 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Daniel Schaefer @ 2021-10-19 3:48 UTC (permalink / raw)
To: devel; +Cc: Daniel Schaefer, Abner Chang, Sunil V L
The Linux EFISTUB reads the FDT from the EFI system configuration
table. Before installing the FDT needs to be patched with the booting
hartid, because the kernel in S-Mode cannot determine it.
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
Cc: Abner Chang <abner.chang@hpe.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Abner Chang <abner.chang@hpe.com>
Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
---
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc | 2 +
Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc | 3 +-
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf | 1 +
Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.inf | 53 +++++++++
Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.c | 116 ++++++++++++++++++++
5 files changed, 174 insertions(+), 1 deletion(-)
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
index 4fab3c4bdcbb..cc62ad05212a 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
@@ -516,6 +516,8 @@
MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
+ Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.inf
+
#
# FAT filesystem + GPT/MBR partitioning + UDF filesystem
#
diff --git a/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc b/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc
index 1292ba1beab7..531319322c62 100644
--- a/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc
+++ b/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc
@@ -1,7 +1,7 @@
#/** @file
# RISC-V processor package.
#
-# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -102,3 +102,4 @@
Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf
Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.inf
+ Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.inf
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf
index f0bd65fad648..c58fa6357451 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf
@@ -182,6 +182,7 @@ INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
INF FatPkg/EnhancedFatDxe/Fat.inf
INF MdeModulePkg/Universal/Disk/UdfDxe/UdfDxe.inf
+INF Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.inf
!ifndef $(SOURCE_DEBUG_ENABLE)
INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
diff --git a/Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.inf b/Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.inf
new file mode 100644
index 000000000000..ae6468f9f55f
--- /dev/null
+++ b/Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.inf
@@ -0,0 +1,53 @@
+## @file
+# RISC-V Flattened Device Tree DXE module.
+#
+# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001b
+ BASE_NAME = FdtDxe
+ FILE_GUID = a7d8f3f7-d8a7-47df-b3ec-9E5A693C380C
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ ENTRY_POINT = InstallFdt
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = RISCV64
+#
+
+
+[Packages]
+ EmbeddedPkg/EmbeddedPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+
+[LibraryClasses]
+ BaseLib
+ BaseMemoryLib
+ DebugLib
+ FdtLib
+ HobLib
+ MemoryAllocationLib
+ RiscVCpuLib
+ UefiBootServicesTableLib
+ UefiDriverEntryPoint
+
+[Sources]
+ FdtDxe.c
+
+[Guids]
+ gFdtHobGuid
+ gFdtTableGuid
+
+[Pcd]
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootHartId ## CONSUMES
+
+[Depex]
+ TRUE
diff --git a/Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.c b/Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.c
new file mode 100644
index 000000000000..22b12027d334
--- /dev/null
+++ b/Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.c
@@ -0,0 +1,116 @@
+/** @file
+ RISC-V Flattened Device Tree DXE module
+
+ The Linux booting protocol on RISC-V requires the id of the booting hart to
+ be passed as a0. Therefore the EFISTUB needs to get this information. Because
+ it runs in S-Mode, it cannot get this information from mhartid. Instead we
+ insert the id into the device tree, that the EFIFSTUB can read from the config table.
+
+ Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/DebugLib.h>
+#include <Library/HobLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/PcdLib.h>
+#include <libfdt.h>
+
+/**
+ Fix up the device tree with booting hartid for the kernel
+
+ @param DtbBlob The device tree. Is extended to fit the hart id.
+
+ @retval EFI_SUCCESS The device tree was success fixed up with the hart id.
+ @retval EFI_OUT_OF_RESOURCES There is not enough memory available to complete the operation.
+**/
+EFI_STATUS
+EFIAPI
+FixDtb (
+ IN OUT VOID *DtbBlob,
+ IN UINTN BootingHartId
+ )
+{
+ fdt32_t Size;
+ UINT32 ChosenOffset, Err;
+
+ DEBUG ((DEBUG_INFO, "Fixing up device tree with boot hart id: %d\n",
+ BootingHartId));
+
+ Size = fdt_totalsize(DtbBlob);
+ Err = fdt_open_into(DtbBlob, DtbBlob, Size + 32);
+ if (Err < 0) {
+ DEBUG ((DEBUG_ERROR,
+ "Device Tree can't be expanded to accommodate new node\n", __FUNCTION__));
+ return EFI_OUT_OF_RESOURCES;
+ }
+ ChosenOffset = fdt_path_offset(DtbBlob, "/chosen");
+ fdt_setprop_u32(DtbBlob, ChosenOffset, "boot-hartid", BootingHartId);
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Install the FDT passed in HOB into EFI system configuration table.
+
+ @retval EFI_SUCCESS Successfully installed fixed up FDT in config table.
+ @retval EFI_NOT_FOUND Did not find FDT HOB.
+ @retval EFI_OUT_OF_RESOURCES There is not enough memory available to complete the operation.
+**/
+EFI_STATUS
+EFIAPI
+InstallFdtFromHob (VOID)
+{
+ EFI_STATUS Status;
+ EFI_HOB_GUID_TYPE *GuidHob;
+ VOID *DataInHob;
+ UINTN DataSize;
+
+ GuidHob = GetFirstGuidHob (&gFdtHobGuid);
+ if (GuidHob == NULL) {
+ DEBUG ((DEBUG_ERROR, "Failed to find RISC-V DTB Hob\n",
+ __FUNCTION__));
+ return EFI_NOT_FOUND;
+ }
+ DataInHob = (VOID *) *((UINTN *) GET_GUID_HOB_DATA (GuidHob));
+ DataSize = GET_GUID_HOB_DATA_SIZE (GuidHob);
+
+ Status = FixDtb (DataInHob, PcdGet32(PcdBootHartId));
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ Status = gBS->InstallConfigurationTable (&gFdtTableGuid, DataInHob);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "%a: failed to install FDT configuration table\n",
+ __FUNCTION__));
+ }
+ return Status;
+}
+
+/**
+ Install the FDT from the HOB into the EFI system configuration table.
+
+ @param ImageHandle Image handle of this driver.
+ @param SystemTable Pointer to the System Table.
+
+ @retval EFI_SUCCESS FDT successfully installed into config table.
+ @retval EFI_NOT_FOUND Did not find FDT HOB.
+ @retval EFI_OUT_OF_RESOURCES There is not enough memory available to complete the operation.
+
+**/
+EFI_STATUS
+EFIAPI
+InstallFdt (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+
+ Status = InstallFdtFromHob ();
+
+ return Status;
+}
--
2.31.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [edk2-platforms] [PATCH v3 11/14] U5SeriesPkg: Switch to generic OpenSBI platform
2021-10-19 3:48 [edk2-platforms] [PATCH v3 00/14] Use generic OpenSBI platform Daniel Schaefer
` (9 preceding siblings ...)
2021-10-19 3:48 ` [edk2-platforms] [PATCH v3 10/14] RISC-V/PlatformPkg: Fixup FDT from HOB and install into config table Daniel Schaefer
@ 2021-10-19 3:48 ` Daniel Schaefer
2021-10-19 3:48 ` [edk2-platforms] [PATCH v3 12/14] RISC-V: Switch to latest OpenSBI Daniel Schaefer
` (3 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Daniel Schaefer @ 2021-10-19 3:48 UTC (permalink / raw)
To: devel; +Cc: Daniel Schaefer, Abner Chang, Sunil V L
New platform files require more space in SEC.
Behavior is determined not by source code but by device tree.
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
Cc: Abner Chang <abner.chang@hpe.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Abner Chang <abner.chang@hpe.com>
Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
---
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf | 2 +
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/PlatformOverride.h | 27 ++
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/Platform.c | 390 ++++++++++----------
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/SifiveFu540.c | 47 +++
Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf.inc | 6 +-
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf.inc | 6 +-
6 files changed, 281 insertions(+), 197 deletions(-)
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf
index 317aaceb2519..f9f2073a5ba4 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf
@@ -25,6 +25,8 @@
[Sources]
Platform.c
+ SifiveFu540.c
+ PlatformOverride.h
[Packages]
EmbeddedPkg/EmbeddedPkg.dec
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/PlatformOverride.h b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/PlatformOverride.h
new file mode 100644
index 000000000000..9b6fcdc15f45
--- /dev/null
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/PlatformOverride.h
@@ -0,0 +1,27 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ * Anup Patel <anup.patel@wdc.com>
+ */
+
+#ifndef __PLATFORM_OVERRIDE_H__
+#define __PLATFORM_OVERRIDE_H__
+
+#include <sbi/sbi_types.h>
+
+struct platform_override {
+ const struct fdt_match *match_table;
+ u64 (*features)(const struct fdt_match *match);
+ u64 (*tlbr_flush_limit)(const struct fdt_match *match);
+ int (*early_init)(bool cold_boot, const struct fdt_match *match);
+ int (*final_init)(bool cold_boot, const struct fdt_match *match);
+ void (*early_exit)(const struct fdt_match *match);
+ void (*final_exit)(const struct fdt_match *match);
+ int (*system_reset)(u32 reset_type, const struct fdt_match *match);
+ int (*fdt_fixup)(void *fdt, const struct fdt_match *match);
+};
+
+#endif
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/Platform.c b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/Platform.c
index aa6274be965b..fe6e2a8c943a 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/Platform.c
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/Platform.c
@@ -1,216 +1,224 @@
/*
- *
- * Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
- *
* SPDX-License-Identifier: BSD-2-Clause
*
- * Copyright (c) 2019 Western Digital Corporation or its affiliates.
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
*
* Authors:
- * Atish Patra <atish.patra@wdc.com>
+ * Anup Patel <anup.patel@wdc.com>
*/
#include <libfdt.h>
+#include <PlatformOverride.h>
#include <sbi/riscv_asm.h>
-#include <sbi/riscv_io.h>
-#include <sbi/riscv_encoding.h>
-#include <sbi/sbi_console.h>
-#include <sbi/sbi_const.h>
+#include <sbi/sbi_hartmask.h>
#include <sbi/sbi_platform.h>
+#include <sbi/sbi_string.h>
#include <sbi_utils/fdt/fdt_fixup.h>
-#include <sbi_utils/irqchip/plic.h>
-#include <sbi_utils/serial/sifive-uart.h>
-#include <sbi_utils/sys/clint.h>
-#include <U5Clint.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/irqchip/fdt_irqchip.h>
+#include <sbi_utils/serial/fdt_serial.h>
+#include <sbi_utils/timer/fdt_timer.h>
+#include <sbi_utils/ipi/fdt_ipi.h>
+#include <sbi_utils/reset/fdt_reset.h>
-#define U540_HART_COUNT FixedPcdGet32(PcdHartCount)
-#define U540_BOOTABLE_HART_COUNT FixedPcdGet32(PcdBootableHartNumber)
-#define U540_HART_STACK_SIZE FixedPcdGet32(PcdOpenSbiStackSize)
-#define U540_BOOT_HART_ID FixedPcdGet32(PcdBootHartId)
+extern const struct platform_override sifive_fu540;
-#define U540_SYS_CLK FixedPcdGet32(PcdU5PlatformSystemClock)
-
-#define U540_PLIC_ADDR 0xc000000
-#define U540_PLIC_NUM_SOURCES 0x35
-#define U540_PLIC_NUM_PRIORITIES 7
-
-#define U540_UART_ADDR FixedPcdGet32(PcdU5UartBase)
-
-#define U540_UART_BAUDRATE 115200
-
-/* PRCI clock related macros */
-//TODO: Do we need a separate driver for this ?
-#define U540_PRCI_BASE_ADDR 0x10000000
-#define U540_PRCI_CLKMUXSTATUSREG 0x002C
-#define U540_PRCI_CLKMUX_STATUS_TLCLKSEL (0x1 << 1)
-
-/* Full tlb flush always */
-#define U540_TLB_RANGE_FLUSH_LIMIT 0
-
-unsigned long log2roundup(unsigned long x);
-
-static struct plic_data plic = {
- .addr = U540_PLIC_ADDR,
- .num_src = U540_PLIC_NUM_SOURCES,
+static const struct platform_override *special_platforms[] = {
+ &sifive_fu540,
};
-static struct clint_data clint = {
- .addr = CLINT_REG_BASE_ADDR,
- .first_hartid = 0,
- .hart_count = U540_HART_COUNT,
- .has_64bit_mmio = TRUE,
-};
-
-static void U540_modify_dt(void *fdt)
-{
- fdt_cpu_fixup(fdt);
-
- fdt_fixups(fdt);
-
- /*
- * SiFive Freedom U540 has an erratum that prevents S-mode software
- * to access a PMP protected region using 1GB page table mapping, so
- * always add the no-map attribute on this platform.
- */
- fdt_reserved_memory_nomap_fixup(fdt);
-}
-
-static int U540_final_init(bool cold_boot)
-{
- void *fdt;
- struct sbi_scratch *ThisScratch;
-
- if (!cold_boot)
- return 0;
-
- fdt = sbi_scratch_thishart_arg1_ptr();
- U540_modify_dt(fdt);
- //
- // Set PMP of firmware regions to R and X. We will lock this in the end of PEI.
- // This region only protects SEC, PEI and Scratch buffer.
- //
- ThisScratch = sbi_scratch_thishart_ptr ();
- pmp_set(0, PMP_R | PMP_X | PMP_W, ThisScratch->fw_start, log2roundup (ThisScratch->fw_size));
- return 0;
-}
-
-static u32 U540_pmp_region_count(u32 hartid)
-{
- return 1;
-}
-
-static int U540_pmp_region_info(u32 hartid, u32 index,
- ulong *prot, ulong *addr, ulong *log2size)
-{
- int ret = 0;
-
- switch (index) {
- case 0:
- *prot = PMP_R | PMP_W | PMP_X;
- *addr = 0;
- *log2size = __riscv_xlen;
- break;
- default:
- ret = -1;
- break;
- };
-
- return ret;
-}
-
-static int U540_console_init(void)
-{
- unsigned long peri_in_freq;
-
- peri_in_freq = U540_SYS_CLK/2;
- return sifive_uart_init(U540_UART_ADDR, peri_in_freq, U540_UART_BAUDRATE);
-}
-
-static int U540_irqchip_init(bool cold_boot)
-{
- int rc;
- u32 hartid = current_hartid();
-
- if (cold_boot) {
- rc = plic_cold_irqchip_init(&plic);
- if (rc)
- return rc;
- }
-
- return plic_warm_irqchip_init(&plic,
- (hartid) ? (2 * hartid - 1) : 0,
- (hartid) ? (2 * hartid) : -1);
-}
-
-static int U540_ipi_init(bool cold_boot)
-{
- int rc;
-
- if (cold_boot) {
- rc = clint_cold_ipi_init(&clint);
- if (rc)
- return rc;
-
- }
-
- return clint_warm_ipi_init();
-}
-
-static u64 U540_get_tlbr_flush_limit(void)
-{
- return U540_TLB_RANGE_FLUSH_LIMIT;
-}
-
-static int U540_timer_init(bool cold_boot)
-{
- int rc;
-
- if (cold_boot) {
- rc = clint_cold_timer_init(&clint, NULL);
- if (rc)
- return rc;
- }
-
- return clint_warm_timer_init();
-}
-/**
- * The U540 SoC has 5 HARTs, Boot HART ID is determined by
- * PcdBootHartId.
+static const struct platform_override *generic_plat = NULL;
+static const struct fdt_match *generic_plat_match = NULL;
+
+static void fw_platform_lookup_special(void *fdt, int root_offset)
+{
+ int pos, noff;
+ const struct platform_override *plat;
+ const struct fdt_match *match;
+
+ for (pos = 0; pos < array_size(special_platforms); pos++) {
+ plat = special_platforms[pos];
+ if (!plat->match_table)
+ continue;
+
+ noff = fdt_find_match(fdt, -1, plat->match_table, &match);
+ if (noff < 0)
+ continue;
+
+ generic_plat = plat;
+ generic_plat_match = match;
+ break;
+ }
+}
+
+extern struct sbi_platform platform;
+static u32 generic_hart_index2id[SBI_HARTMASK_MAX_BITS] = { 0 };
+
+/*
+ * The fw_platform_init() function is called very early on the boot HART
+ * OpenSBI reference firmwares so that platform specific code get chance
+ * to update "platform" instance before it is used.
+ *
+ * The arguments passed to fw_platform_init() function are boot time state
+ * of A0 to A4 register. The "arg0" will be boot HART id and "arg1" will
+ * be address of FDT passed by previous booting stage.
+ *
+ * The return value of fw_platform_init() function is the FDT location. If
+ * FDT is unchanged (or FDT is modified in-place) then fw_platform_init()
+ * can always return the original FDT location (i.e. 'arg1') unmodified.
*/
-static u32 U540_hart_index2id[U540_BOOTABLE_HART_COUNT] = {1, 2, 3, 4};
+unsigned long fw_platform_init(unsigned long arg0, unsigned long arg1,
+ unsigned long arg2, unsigned long arg3,
+ unsigned long arg4)
+{
+ const char *model, *mmu_type;
+ void *fdt = (void *)arg1;
+ u32 hartid, hart_count = 0;
+ int rc, root_offset, cpus_offset, cpu_offset, len;
+
+ root_offset = fdt_path_offset(fdt, "/");
+ if (root_offset < 0)
+ goto fail;
+
+ fw_platform_lookup_special(fdt, root_offset);
+
+ model = fdt_getprop(fdt, root_offset, "model", &len);
+ if (model)
+ sbi_strncpy(platform.name, model, sizeof(platform.name));
+
+ if (generic_plat && generic_plat->features)
+ platform.features = generic_plat->features(generic_plat_match);
+
+ cpus_offset = fdt_path_offset(fdt, "/cpus");
+ if (cpus_offset < 0)
+ goto fail;
+
+ fdt_for_each_subnode(cpu_offset, fdt, cpus_offset) {
+ rc = fdt_parse_hart_id(fdt, cpu_offset, &hartid);
+ if (rc)
+ continue;
+
+ if (SBI_HARTMASK_MAX_BITS <= hartid)
+ continue;
+
+ mmu_type = fdt_getprop(fdt, cpu_offset, "mmu-type", &len);
+ if (!mmu_type || !len)
+ hartid = -1U;
-static int U540_system_reset(u32 type)
+ generic_hart_index2id[hart_count++] = hartid;
+ }
+
+ platform.hart_count = hart_count;
+
+ /* Return original FDT pointer */
+ return arg1;
+
+fail:
+ while (1)
+ wfi();
+}
+
+static int generic_early_init(bool cold_boot)
{
- /* For now nothing to do. */
+ int rc;
+
+ if (generic_plat && generic_plat->early_init) {
+ rc = generic_plat->early_init(cold_boot, generic_plat_match);
+ if (rc)
+ return rc;
+ }
+
+ if (!cold_boot)
return 0;
+
+ return fdt_reset_init();
+}
+
+static int generic_final_init(bool cold_boot)
+{
+ void *fdt;
+ int rc;
+
+ if (generic_plat && generic_plat->final_init) {
+ rc = generic_plat->final_init(cold_boot, generic_plat_match);
+ if (rc)
+ return rc;
+ }
+
+ if (!cold_boot)
+ return 0;
+
+ fdt = sbi_scratch_thishart_arg1_ptr();
+
+ fdt_cpu_fixup(fdt);
+ fdt_fixups(fdt);
+
+ if (generic_plat && generic_plat->fdt_fixup) {
+ rc = generic_plat->fdt_fixup(fdt, generic_plat_match);
+ if (rc)
+ return rc;
+ }
+
+ return 0;
+}
+
+static void generic_early_exit(void)
+{
+ if (generic_plat && generic_plat->early_exit)
+ generic_plat->early_exit(generic_plat_match);
+}
+
+static void generic_final_exit(void)
+{
+ if (generic_plat && generic_plat->final_exit)
+ generic_plat->final_exit(generic_plat_match);
+}
+
+static u64 generic_tlbr_flush_limit(void)
+{
+ if (generic_plat && generic_plat->tlbr_flush_limit)
+ return generic_plat->tlbr_flush_limit(generic_plat_match);
+ return SBI_PLATFORM_TLB_RANGE_FLUSH_LIMIT_DEFAULT;
+}
+
+static int generic_system_reset(u32 reset_type)
+{
+ if (generic_plat && generic_plat->system_reset)
+ return generic_plat->system_reset(reset_type,
+ generic_plat_match);
+ return fdt_system_reset(reset_type);
}
const struct sbi_platform_operations platform_ops = {
- .pmp_region_count = U540_pmp_region_count,
- .pmp_region_info = U540_pmp_region_info,
- .final_init = U540_final_init,
- .console_putc = sifive_uart_putc,
- .console_getc = sifive_uart_getc,
- .console_init = U540_console_init,
- .irqchip_init = U540_irqchip_init,
- .ipi_send = clint_ipi_send,
- .ipi_clear = clint_ipi_clear,
- .ipi_init = U540_ipi_init,
- .get_tlbr_flush_limit = U540_get_tlbr_flush_limit,
- .timer_value = clint_timer_value,
- .timer_event_stop = clint_timer_event_stop,
- .timer_event_start = clint_timer_event_start,
- .timer_init = U540_timer_init,
- .system_reset = U540_system_reset
+ .early_init = generic_early_init,
+ .final_init = generic_final_init,
+ .early_exit = generic_early_exit,
+ .final_exit = generic_final_exit,
+ .console_putc = fdt_serial_putc,
+ .console_getc = fdt_serial_getc,
+ .console_init = fdt_serial_init,
+ .irqchip_init = fdt_irqchip_init,
+ .irqchip_exit = fdt_irqchip_exit,
+ .ipi_send = fdt_ipi_send,
+ .ipi_clear = fdt_ipi_clear,
+ .ipi_init = fdt_ipi_init,
+ .ipi_exit = fdt_ipi_exit,
+ .get_tlbr_flush_limit = generic_tlbr_flush_limit,
+ .timer_value = fdt_timer_value,
+ .timer_event_stop = fdt_timer_event_stop,
+ .timer_event_start = fdt_timer_event_start,
+ .timer_init = fdt_timer_init,
+ .timer_exit = fdt_timer_exit,
+ .system_reset = generic_system_reset,
};
-const struct sbi_platform platform = {
- .opensbi_version = OPENSBI_VERSION, // The OpenSBI version this platform table is built bassed on.
- .platform_version = SBI_PLATFORM_VERSION(0x0001, 0x0000), // SBI Platform version 1.0
- .name = "SiFive Freedom U540",
- .features = SBI_PLATFORM_DEFAULT_FEATURES,
- .hart_count = U540_BOOTABLE_HART_COUNT,
- .hart_index2id = U540_hart_index2id,
- .hart_stack_size = U540_HART_STACK_SIZE,
- .platform_ops_addr = (unsigned long)&platform_ops
+struct sbi_platform platform = {
+ .opensbi_version = OPENSBI_VERSION,
+ .platform_version = SBI_PLATFORM_VERSION(0x0, 0x01),
+ .name = "Generic",
+ .features = SBI_PLATFORM_DEFAULT_FEATURES,
+ .hart_count = SBI_HARTMASK_MAX_BITS,
+ .hart_index2id = generic_hart_index2id,
+ .hart_stack_size = SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
+ .platform_ops_addr = (unsigned long)&platform_ops
};
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/SifiveFu540.c b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/SifiveFu540.c
new file mode 100644
index 000000000000..748b058840e0
--- /dev/null
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/SifiveFu540.c
@@ -0,0 +1,47 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ * Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <PlatformOverride.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/fdt/fdt_fixup.h>
+
+static u64 sifive_fu540_tlbr_flush_limit(const struct fdt_match *match)
+{
+ /*
+ * The sfence.vma by virtual address does not work on
+ * SiFive FU540 so we return remote TLB flush limit as zero.
+ */
+ return 0;
+}
+
+static int sifive_fu540_fdt_fixup(void *fdt, const struct fdt_match *match)
+{
+ /*
+ * SiFive Freedom U540 has an erratum that prevents S-mode software
+ * to access a PMP protected region using 1GB page table mapping, so
+ * always add the no-map attribute on this platform.
+ */
+ fdt_reserved_memory_nomap_fixup(fdt);
+
+ return 0;
+}
+
+static const struct fdt_match sifive_fu540_match[] = {
+ { .compatible = "sifive,fu540" },
+ { .compatible = "sifive,fu540g" },
+ { .compatible = "sifive,fu540-c000" },
+ { .compatible = "sifive,hifive-unleashed-a00" },
+ { },
+};
+
+const struct platform_override sifive_fu540 = {
+ .match_table = sifive_fu540_match,
+ .tlbr_flush_limit = sifive_fu540_tlbr_flush_limit,
+ .fdt_fixup = sifive_fu540_fdt_fixup,
+};
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf.inc b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf.inc
index 13c14a4a2c76..e88aee8c0212 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf.inc
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf.inc
@@ -23,10 +23,10 @@ DEFINE CODE_BLOCKS = 0x7E0
DEFINE VARS_BLOCKS = 0x20
DEFINE SECFV_OFFSET = 0x00000000
-DEFINE SECFV_SIZE = 0x00020000
-DEFINE PEIFV_OFFSET = 0x00020000
+DEFINE SECFV_SIZE = 0x00030000
+DEFINE PEIFV_OFFSET = 0x00030000
DEFINE PEIFV_SIZE = 0x00080000
-DEFINE SCRATCH_OFFSET = 0x000a0000
+DEFINE SCRATCH_OFFSET = 0x000b0000
DEFINE SCRATCH_SIZE = 0x00010000
DEFINE FVMAIN_OFFSET = 0x00100000 # Must be power of 2 for PMP setting
DEFINE FVMAIN_SIZE = 0x0018C000
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf.inc b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf.inc
index 723632dc792d..8e7afc2d82c4 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf.inc
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf.inc
@@ -23,10 +23,10 @@ DEFINE CODE_BLOCKS = 0x7E0
DEFINE VARS_BLOCKS = 0x20
DEFINE SECFV_OFFSET = 0x00000000
-DEFINE SECFV_SIZE = 0x00020000
-DEFINE PEIFV_OFFSET = 0x00020000
+DEFINE SECFV_SIZE = 0x00030000
+DEFINE PEIFV_OFFSET = 0x00030000
DEFINE PEIFV_SIZE = 0x00080000
-DEFINE SCRATCH_OFFSET = 0x000a0000
+DEFINE SCRATCH_OFFSET = 0x000b0000
DEFINE SCRATCH_SIZE = 0x00010000
DEFINE FVMAIN_OFFSET = 0x00100000 # Must be power of 2 for PMP setting
DEFINE FVMAIN_SIZE = 0x0018C000
--
2.31.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [edk2-platforms] [PATCH v3 12/14] RISC-V: Switch to latest OpenSBI
2021-10-19 3:48 [edk2-platforms] [PATCH v3 00/14] Use generic OpenSBI platform Daniel Schaefer
` (10 preceding siblings ...)
2021-10-19 3:48 ` [edk2-platforms] [PATCH v3 11/14] U5SeriesPkg: Switch to generic OpenSBI platform Daniel Schaefer
@ 2021-10-19 3:48 ` Daniel Schaefer
2021-10-19 3:48 ` [edk2-platforms] [PATCH v3 13/14] RISC-V: Implement ResetSystem RT call Daniel Schaefer
` (2 subsequent siblings)
14 siblings, 0 replies; 16+ messages in thread
From: Daniel Schaefer @ 2021-10-19 3:48 UTC (permalink / raw)
To: devel; +Cc: Daniel Schaefer, Abner Chang, Sunil V L
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
Cc: Abner Chang <abner.chang@hpe.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Abner Chang <abner.chang@hpe.com>
Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
---
Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/RiscVOpensbiLib.inf | 13 +++-
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/PlatformOverride.h | 57 +++++++-------
Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h | 1 +
Silicon/RISC-V/ProcessorPkg/Include/OpensbiTypes.h | 1 +
Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLibNull/Platform.c | 27 ++++---
Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c | 5 +-
Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Library/OpensbiPlatformLib/Platform.c | 29 +------
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/Platform.c | 31 +++-----
Platform/SiFive/U5SeriesPkg/Library/SerialIoLib/SerialPortLib.c | 81 +++++++++++++++++++-
Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S | 2 +
10 files changed, 154 insertions(+), 93 deletions(-)
diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/RiscVOpensbiLib.inf b/Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/RiscVOpensbiLib.inf
index 71cc76444eef..e40a797896be 100644
--- a/Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/RiscVOpensbiLib.inf
+++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/RiscVOpensbiLib.inf
@@ -23,6 +23,7 @@
opensbi/lib/sbi/sbi_bitmap.c
opensbi/lib/sbi/sbi_bitops.c
opensbi/lib/sbi/sbi_console.c
+ opensbi/lib/sbi/sbi_domain.c
opensbi/lib/sbi/sbi_ecall.c
opensbi/lib/sbi/sbi_ecall_base.c
opensbi/lib/sbi/sbi_ecall_hsm.c
@@ -51,27 +52,33 @@
opensbi/lib/utils/fdt/fdt_helper.c
opensbi/lib/utils/fdt/fdt_fixup.c
+ opensbi/lib/utils/fdt/fdt_domain.c
opensbi/lib/utils/ipi/fdt_ipi.c
- opensbi/lib/utils/ipi/fdt_ipi_clint.c
+ opensbi/lib/utils/ipi/aclint_mswi.c
+ opensbi/lib/utils/ipi/fdt_ipi_mswi.c
opensbi/lib/utils/irqchip/fdt_irqchip.c
opensbi/lib/utils/irqchip/fdt_irqchip_plic.c
opensbi/lib/utils/irqchip/plic.c
opensbi/lib/utils/reset/fdt_reset.c
opensbi/lib/utils/reset/fdt_reset_htif.c
opensbi/lib/utils/reset/fdt_reset_sifive.c
+ opensbi/lib/utils/reset/fdt_reset_thead.c
+ opensbi/lib/utils/reset/fdt_reset_thead_asm.S
opensbi/lib/utils/serial/fdt_serial.c
opensbi/lib/utils/serial/fdt_serial_htif.c
opensbi/lib/utils/serial/fdt_serial_shakti.c
opensbi/lib/utils/serial/fdt_serial_sifive.c
opensbi/lib/utils/serial/fdt_serial_uart8250.c
+ opensbi/lib/utils/serial/fdt_serial_gaisler.c
+ opensbi/lib/utils/serial/gaisler-uart.c
opensbi/lib/utils/serial/shakti-uart.c
opensbi/lib/utils/serial/sifive-uart.c
opensbi/lib/utils/serial/uart8250.c
- opensbi/lib/utils/sys/clint.c
opensbi/lib/utils/sys/htif.c
opensbi/lib/utils/sys/sifive_test.c
opensbi/lib/utils/timer/fdt_timer.c
- opensbi/lib/utils/timer/fdt_timer_clint.c
+ opensbi/lib/utils/timer/aclint_mtimer.c
+ opensbi/lib/utils/timer/fdt_timer_mtimer.c
[Packages]
EmbeddedPkg/EmbeddedPkg.dec # For libfdt.
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/PlatformOverride.h b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/PlatformOverride.h
index 9b6fcdc15f45..467ebbd4b889 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/PlatformOverride.h
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/PlatformOverride.h
@@ -1,27 +1,30 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2020 Western Digital Corporation or its affiliates.
- *
- * Authors:
- * Anup Patel <anup.patel@wdc.com>
- */
-
-#ifndef __PLATFORM_OVERRIDE_H__
-#define __PLATFORM_OVERRIDE_H__
-
-#include <sbi/sbi_types.h>
-
-struct platform_override {
- const struct fdt_match *match_table;
- u64 (*features)(const struct fdt_match *match);
- u64 (*tlbr_flush_limit)(const struct fdt_match *match);
- int (*early_init)(bool cold_boot, const struct fdt_match *match);
- int (*final_init)(bool cold_boot, const struct fdt_match *match);
- void (*early_exit)(const struct fdt_match *match);
- void (*final_exit)(const struct fdt_match *match);
- int (*system_reset)(u32 reset_type, const struct fdt_match *match);
- int (*fdt_fixup)(void *fdt, const struct fdt_match *match);
-};
-
-#endif
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ * Anup Patel <anup.patel@wdc.com>
+ */
+
+#ifndef __PLATFORM_OVERRIDE_H__
+#define __PLATFORM_OVERRIDE_H__
+
+#include <sbi/sbi_types.h>
+
+struct platform_override {
+ const struct fdt_match *match_table;
+ u64 (*features)(const struct fdt_match *match);
+ u64 (*tlbr_flush_limit)(const struct fdt_match *match);
+ int (*early_init)(bool cold_boot, const struct fdt_match *match);
+ int (*final_init)(bool cold_boot, const struct fdt_match *match);
+ void (*early_exit)(const struct fdt_match *match);
+ void (*final_exit)(const struct fdt_match *match);
+ int (*system_reset_check)(u32 reset_type, u32 reset_reason,
+ const struct fdt_match *match);
+ void (*system_reset)(u32 reset_type, u32 reset_reason,
+ const struct fdt_match *match);
+ int (*fdt_fixup)(void *fdt, const struct fdt_match *match);
+};
+
+#endif
diff --git a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h
index f81ea06b05b0..66a87cb8c38f 100644
--- a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h
+++ b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h
@@ -16,6 +16,7 @@
#include <IndustryStandard/RiscVOpensbi.h>
#include <sbi/sbi_scratch.h>
#include <sbi/sbi_platform.h>
+#include <sbi/sbi_ecall.h>
//
// EDK2 OpenSBI Firmware extension.
diff --git a/Silicon/RISC-V/ProcessorPkg/Include/OpensbiTypes.h b/Silicon/RISC-V/ProcessorPkg/Include/OpensbiTypes.h
index 00c374f24a85..bbf74e2a82fe 100644
--- a/Silicon/RISC-V/ProcessorPkg/Include/OpensbiTypes.h
+++ b/Silicon/RISC-V/ProcessorPkg/Include/OpensbiTypes.h
@@ -49,6 +49,7 @@ typedef UINT64 physical_size_t;
#define __packed __attribute__((packed))
#define __noreturn __attribute__((noreturn))
+#define __aligned(x) __attribute__((aligned(x)))
#if defined(__GNUC__) || defined(__clang__)
#define likely(x) __builtin_expect((x), 1)
diff --git a/Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLibNull/Platform.c b/Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLibNull/Platform.c
index e78d811f4c3d..b7e39d19c16f 100644
--- a/Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLibNull/Platform.c
+++ b/Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLibNull/Platform.c
@@ -14,31 +14,38 @@
#include <sbi/sbi_platform.h>
const struct sbi_platform_operations platform_ops = {
- .pmp_region_count = NULL,
- .pmp_region_info = NULL,
+ .early_init = NULL,
.final_init = NULL,
+ .early_exit = NULL,
+ .final_exit = NULL,
+ .domains_root_regions = NULL,
+ .domains_init = NULL,
.console_putc = NULL,
.console_getc = NULL,
.console_init = NULL,
.irqchip_init = NULL,
+ .irqchip_exit = NULL,
.ipi_send = NULL,
.ipi_clear = NULL,
.ipi_init = NULL,
+ .ipi_exit = NULL,
+ .get_tlbr_flush_limit = NULL,
.timer_value = NULL,
.timer_event_stop = NULL,
.timer_event_start = NULL,
.timer_init = NULL,
- .system_reboot = NULL,
- .system_shutdown = NULL
+ .timer_exit = NULL,
+ .system_reset_check = NULL,
+ .system_reset = NULL,
};
-const struct sbi_platform platform = {
- .opensbi_version = OPENSBI_VERSION, // The OpenSBI version this platform table is built bassed on.
- .platform_version = SBI_PLATFORM_VERSION(0x0000, 0x0000), // SBI Platform version 1.0
- .name = "NULL platform",
+struct sbi_platform platform = {
+ .opensbi_version = OPENSBI_VERSION,
+ .platform_version = SBI_PLATFORM_VERSION(0x0, 0x01),
+ .name = "NULL Platform",
.features = 0,
.hart_count = 0,
+ .hart_index2id = 0,
.hart_stack_size = 0,
- .disabled_hart_mask = 0,
- .platform_ops_addr = 0
+ .platform_ops_addr = 0,
};
diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c
index 0af0b4bac831..e9f030f35280 100644
--- a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c
+++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c
@@ -21,6 +21,7 @@
#include <sbi/sbi_platform.h> // Reference to header file in opensbi
#include <sbi/sbi_init.h> // Reference to header file in opensbi
#include <sbi/sbi_ecall.h> // Reference to header file in opensbi
+#include <sbi/sbi_trap.h> // Reference to header file in opensbi
//
// Indicates the boot hart (PcdBootHartId) OpenSBI initialization is done.
@@ -434,7 +435,7 @@ EFI_STATUS EFIAPI TemporaryRamDone (
STATIC int SbiEcallFirmwareHandler (
IN unsigned long ExtId,
IN unsigned long FuncId,
- IN unsigned long *Args,
+ IN CONST struct sbi_trap_regs *TrapRegs,
OUT unsigned long *OutVal,
OUT struct sbi_trap_info *OutTrap
)
@@ -446,7 +447,7 @@ STATIC int SbiEcallFirmwareHandler (
*OutVal = (unsigned long) sbi_scratch_thishart_ptr();
break;
case SBI_EXT_FW_MSCRATCH_HARTID_FUNC:
- *OutVal = (unsigned long) sbi_hartid_to_scratch (Args[0]);
+ *OutVal = (unsigned long) sbi_hartid_to_scratch (TrapRegs->a0);
break;
default:
Ret = SBI_ENOTSUPP;
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Library/OpensbiPlatformLib/Platform.c b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Library/OpensbiPlatformLib/Platform.c
index ed4b1550bca9..b346eccaf0c8 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Library/OpensbiPlatformLib/Platform.c
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Library/OpensbiPlatformLib/Platform.c
@@ -111,30 +111,6 @@ static int U500_final_init(bool cold_boot)
return 0;
}
-static u32 U500_pmp_region_count(u32 hartid)
-{
- return 1;
-}
-
-static int U500_pmp_region_info(u32 hartid, u32 index,
- ulong *prot, ulong *addr, ulong *log2size)
-{
- int ret = 0;
-
- switch (index) {
- case 0:
- *prot = PMP_R | PMP_W | PMP_X;
- *addr = 0;
- *log2size = __riscv_xlen;
- break;
- default:
- ret = -1;
- break;
- };
-
- return ret;
-}
-
static int U500_console_init(void)
{
unsigned long peri_in_freq;
@@ -196,15 +172,12 @@ static int U500_timer_init(bool cold_boot)
*/
static u32 u500_hart_index2id[U500_BOOTABLE_HART_COUNT] = {0, 1, 2, 3};
-static int U500_system_reset(u32 type)
+static void U500_system_reset(u32 type, u32 second_param)
{
/* For now nothing to do. */
- return 0;
}
const struct sbi_platform_operations platform_ops = {
- .pmp_region_count = U500_pmp_region_count,
- .pmp_region_info = U500_pmp_region_info,
.final_init = U500_final_init,
.console_putc = sifive_uart_putc,
.console_getc = sifive_uart_getc,
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/Platform.c b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/Platform.c
index fe6e2a8c943a..ac76f073ab53 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/Platform.c
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/Platform.c
@@ -13,6 +13,8 @@
#include <sbi/sbi_hartmask.h>
#include <sbi/sbi_platform.h>
#include <sbi/sbi_string.h>
+#include <sbi/sbi_math.h>
+#include <sbi_utils/fdt/fdt_domain.h>
#include <sbi_utils/fdt/fdt_fixup.h>
#include <sbi_utils/fdt/fdt_helper.h>
#include <sbi_utils/irqchip/fdt_irqchip.h>
@@ -71,7 +73,7 @@ unsigned long fw_platform_init(unsigned long arg0, unsigned long arg1,
unsigned long arg2, unsigned long arg3,
unsigned long arg4)
{
- const char *model, *mmu_type;
+ const char *model;
void *fdt = (void *)arg1;
u32 hartid, hart_count = 0;
int rc, root_offset, cpus_offset, cpu_offset, len;
@@ -101,10 +103,6 @@ unsigned long fw_platform_init(unsigned long arg0, unsigned long arg1,
if (SBI_HARTMASK_MAX_BITS <= hartid)
continue;
- mmu_type = fdt_getprop(fdt, cpu_offset, "mmu-type", &len);
- if (!mmu_type || !len)
- hartid = -1U;
-
generic_hart_index2id[hart_count++] = hartid;
}
@@ -152,6 +150,7 @@ static int generic_final_init(bool cold_boot)
fdt_cpu_fixup(fdt);
fdt_fixups(fdt);
+ fdt_domain_fixup(fdt);
if (generic_plat && generic_plat->fdt_fixup) {
rc = generic_plat->fdt_fixup(fdt, generic_plat_match);
@@ -174,6 +173,11 @@ static void generic_final_exit(void)
generic_plat->final_exit(generic_plat_match);
}
+static int generic_domains_init(void)
+{
+ return fdt_domains_populate(sbi_scratch_thishart_arg1_ptr());
+}
+
static u64 generic_tlbr_flush_limit(void)
{
if (generic_plat && generic_plat->tlbr_flush_limit)
@@ -181,35 +185,20 @@ static u64 generic_tlbr_flush_limit(void)
return SBI_PLATFORM_TLB_RANGE_FLUSH_LIMIT_DEFAULT;
}
-static int generic_system_reset(u32 reset_type)
-{
- if (generic_plat && generic_plat->system_reset)
- return generic_plat->system_reset(reset_type,
- generic_plat_match);
- return fdt_system_reset(reset_type);
-}
-
const struct sbi_platform_operations platform_ops = {
.early_init = generic_early_init,
.final_init = generic_final_init,
.early_exit = generic_early_exit,
.final_exit = generic_final_exit,
- .console_putc = fdt_serial_putc,
- .console_getc = fdt_serial_getc,
+ .domains_init = generic_domains_init,
.console_init = fdt_serial_init,
.irqchip_init = fdt_irqchip_init,
.irqchip_exit = fdt_irqchip_exit,
- .ipi_send = fdt_ipi_send,
- .ipi_clear = fdt_ipi_clear,
.ipi_init = fdt_ipi_init,
.ipi_exit = fdt_ipi_exit,
.get_tlbr_flush_limit = generic_tlbr_flush_limit,
- .timer_value = fdt_timer_value,
- .timer_event_stop = fdt_timer_event_stop,
- .timer_event_start = fdt_timer_event_start,
.timer_init = fdt_timer_init,
.timer_exit = fdt_timer_exit,
- .system_reset = generic_system_reset,
};
struct sbi_platform platform = {
diff --git a/Platform/SiFive/U5SeriesPkg/Library/SerialIoLib/SerialPortLib.c b/Platform/SiFive/U5SeriesPkg/Library/SerialIoLib/SerialPortLib.c
index e98c8523a3f3..7bc73a0b82de 100644
--- a/Platform/SiFive/U5SeriesPkg/Library/SerialIoLib/SerialPortLib.c
+++ b/Platform/SiFive/U5SeriesPkg/Library/SerialIoLib/SerialPortLib.c
@@ -19,6 +19,21 @@
#define UART_REG_IP 5
#define UART_IP_RXWM 0x02
+
+#define UART_REG_TXFIFO 0
+#define UART_REG_RXFIFO 1
+#define UART_REG_TXCTRL 2
+#define UART_REG_RXCTRL 3
+#define UART_REG_IE 4
+#define UART_REG_IP 5
+#define UART_REG_DIV 6
+
+#define UART_TXFIFO_FULL 0x80000000
+#define UART_RXFIFO_EMPTY 0x80000000
+#define UART_RXFIFO_DATA 0x000000ff
+#define UART_TXCTRL_TXEN 0x1
+#define UART_RXCTRL_RXEN 0x1
+
//---------------------------------------------
// UART Settings
//---------------------------------------------
@@ -28,6 +43,68 @@
BOOLEAN Initiated = FALSE;
+/**
+ Get value from serial port register.
+
+ @param RegIndex Register index
+
+ @retval Vale returned from from serial port.
+
+**/
+UINT32 GetReg (
+ IN UINT32 RegIndex
+ )
+{
+ return MmioRead32 (FixedPcdGet32(PcdU5UartBase) + (RegIndex * 0x4));
+}
+
+/**
+ Set serial port register.
+
+ @param RegIndex Register index
+ @param Value Value write to Register
+
+**/
+VOID SetReg (
+ IN UINT32 RegIndex,
+ IN UINT32 Value
+ )
+{
+ MmioWrite32 (Value, FixedPcdGet32(PcdU5UartBase) + (RegIndex * 0x4));
+}
+
+/**
+ Character output to serial port.
+
+ @param Ch The character to serial port.
+
+**/
+VOID SifiveUartPutChar (
+ IN UINT8 Ch
+ )
+{
+ while (GetReg (UART_REG_TXFIFO) & UART_TXFIFO_FULL);
+
+ SetReg (UART_REG_TXFIFO, Ch);
+}
+
+/**
+ Get character from serial port.
+
+ @retval character The character from serial port.
+
+**/
+UINT32 SifiveUartGetChar (VOID)
+{
+ UINT32 Ret;
+
+ Ret = GetReg (UART_REG_RXFIFO);
+ if (!(Ret & UART_RXFIFO_EMPTY)) {
+ return Ret & UART_RXFIFO_DATA;
+ }
+ return -1;
+}
+
/**
Initialize the serial device hardware.
@@ -88,7 +165,7 @@ SerialPortWrite (
}
for(Index = 0; Index < NumberOfBytes; Index ++) {
- sifive_uart_putc (Buffer [Index]);
+ SifiveUartPutChar (Buffer [Index]);
}
return Index;
@@ -119,7 +196,7 @@ SerialPortRead (
}
for (Index = 0; Index < NumberOfBytes; Index ++) {
- Buffer [Index] = (UINT8)sifive_uart_getc ();
+ Buffer [Index] = (UINT8)SifiveUartGetChar ();
}
return Index;
diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S b/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S
index 0e3940180d44..a8157c896e6f 100644
--- a/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S
+++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S
@@ -21,6 +21,8 @@
.text
.align 3
+ .globl _start_warm
+
ASM_FUNC (_ModuleEntryPoint)
/*
* Jump to warm-boot if this is not the selected core booting,
--
2.31.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [edk2-platforms] [PATCH v3 13/14] RISC-V: Implement ResetSystem RT call
2021-10-19 3:48 [edk2-platforms] [PATCH v3 00/14] Use generic OpenSBI platform Daniel Schaefer
` (11 preceding siblings ...)
2021-10-19 3:48 ` [edk2-platforms] [PATCH v3 12/14] RISC-V: Switch to latest OpenSBI Daniel Schaefer
@ 2021-10-19 3:48 ` Daniel Schaefer
2021-10-19 3:48 ` [edk2-platforms] [PATCH v3 14/14] Move OpenSbiPlatformLib to RISC-V/PlatformPkg Daniel Schaefer
2021-10-19 5:58 ` [edk2-platforms] [PATCH v3 00/14] Use generic OpenSBI platform Abner Chang
14 siblings, 0 replies; 16+ messages in thread
From: Daniel Schaefer @ 2021-10-19 3:48 UTC (permalink / raw)
To: devel; +Cc: Daniel Schaefer, Abner Chang, Sunil V L
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
Cc: Abner Chang <abner.chang@hpe.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Abner Chang <abner.chang@hpe.com>
Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
---
Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc | 12 +-
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc | 12 +-
Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf | 33 +++++
Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h | 38 +++++-
Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c | 128 ++++++++++++++++++++
Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.c | 44 ++++++-
Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/opensbi | 2 +-
7 files changed, 256 insertions(+), 13 deletions(-)
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc
index 1dc6405a20f0..f14511120e89 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc
@@ -237,12 +237,13 @@
DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
ReportStatusCodeLib|MdeModulePkg/Library/RuntimeDxeReportStatusCodeLib/RuntimeDxeReportStatusCodeLib.inf
-!ifdef $(DEBUG_ON_SERIAL_PORT)
- DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
-!else
- DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
-!endif
+ ResetSystemLib|Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf
UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf
+!ifdef $(DEBUG_ON_SERIAL_PORT)
+ DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+!else
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+!endif
!if $(SECURE_BOOT_ENABLE) == TRUE
BaseCryptLib|CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
!endif
@@ -452,6 +453,7 @@
#
Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf
Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.inf
+ MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
index cc62ad05212a..18a482aba611 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
@@ -244,12 +244,13 @@
DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
ReportStatusCodeLib|MdeModulePkg/Library/RuntimeDxeReportStatusCodeLib/RuntimeDxeReportStatusCodeLib.inf
-!ifdef $(DEBUG_ON_SERIAL_PORT)
- DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
-!else
- DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
-!endif
+ ResetSystemLib|Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf
UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf
+!ifdef $(DEBUG_ON_SERIAL_PORT)
+ DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+!else
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+!endif
!if $(SECURE_BOOT_ENABLE) == TRUE
BaseCryptLib|CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
!endif
@@ -458,6 +459,7 @@
#
Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf
Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.inf
+ MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {
diff --git a/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf b/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf
new file mode 100644
index 000000000000..f876ae20560b
--- /dev/null
+++ b/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf
@@ -0,0 +1,33 @@
+## @file
+# Library instance for ResetSystem library class for RISC-V using SBI ecalls
+#
+# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = ResetSystemLib
+ FILE_GUID = 3eff6057-1116-4dcb-837e-c0ef1a120ab1
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ResetSystemLib
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = RISCV64
+#
+
+[Sources]
+ ResetSystemLib.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec
+
+[LibraryClasses]
+ DebugLib
+ RiscVEdk2SbiLib
diff --git a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h
index 66a87cb8c38f..88d957f002eb 100644
--- a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h
+++ b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h
@@ -1,7 +1,7 @@
/** @file
Library to call the RISC-V SBI ecalls
- Copyright (c) 2020, Hewlett Packard Development LP. All rights reserved.<BR>
+ Copyright (c) 2021, Hewlett Packard Development LP. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -474,6 +474,42 @@ SbiRemoteHfenceVvma (
IN UINTN Size
);
+///
+/// Firmware System Reset (SRST) Extension
+///
+
+/**
+ Reset the system
+
+ The System Reset Extension provides a function that allow the supervisor
+ software to request system-level reboot or shutdown. The term "system" refers
+ to the world-view of supervisor software and the underlying SBI
+ implementation could be machine mode firmware or hypervisor.
+
+ Valid parameters for ResetType and ResetReason are defined in sbi_ecall_interface.h
+
+ #define SBI_SRST_RESET_TYPE_SHUTDOWN 0x0
+ #define SBI_SRST_RESET_TYPE_COLD_REBOOT 0x1
+ #define SBI_SRST_RESET_TYPE_WARM_REBOOT 0x2
+
+ #define SBI_SRST_RESET_REASON_NONE 0x0
+ #define SBI_SRST_RESET_REASON_SYSFAIL 0x1
+
+ When the call is successful, it will not return.
+
+ @param[in] ResetType Typ of reset: Shutdown, cold-, or warm-reset.
+ @param[in] ResetReason Why the system resets. No reason or system failure.
+ @retval EFI_INVALID_PARAMETER Either ResetType or ResetReason is invalid.
+ @retval EFI_UNSUPPORTED ResetType is valid but not implemented on the platform.
+ @retval EFI_DEVICE_ERROR Unknown error.
+**/
+EFI_STATUS
+EFIAPI
+SbiSystemReset (
+ IN UINTN ResetType,
+ IN UINTN ResetReason
+ );
+
///
/// Vendor Specific extension space: Extension Ids 0x09000000 through 0x09FFFFFF
///
diff --git a/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c b/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c
new file mode 100644
index 000000000000..67e40151d171
--- /dev/null
+++ b/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c
@@ -0,0 +1,128 @@
+/** @file
+ Reset System Library functions for RISC-V
+
+ Copyright (c) 2021, Hewlett Packard Development LP. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Library/DebugLib.h>
+#include <Library/ResetSystemLib.h>
+#include <Library/RiscVEdk2SbiLib.h>
+
+/**
+ This function causes a system-wide reset (cold reset), in which
+ all circuitry within the system returns to its initial state. This type of reset
+ is asynchronous to system operation and operates without regard to
+ cycle boundaries.
+
+ If this function returns, it means that the system does not support cold reset.
+**/
+VOID
+EFIAPI
+ResetCold (
+ VOID
+ )
+{
+ // Warm Reset via SBI ecall
+ SbiSystemReset (SBI_SRST_RESET_TYPE_COLD_REBOOT, SBI_SRST_RESET_REASON_NONE);
+}
+
+/**
+ This function causes a system-wide initialization (warm reset), in which all processors
+ are set to their initial state. Pending cycles are not corrupted.
+
+ If this function returns, it means that the system does not support warm reset.
+**/
+VOID
+EFIAPI
+ResetWarm (
+ VOID
+ )
+{
+ // Warm Reset via SBI ecall
+ SbiSystemReset (SBI_SRST_RESET_TYPE_WARM_REBOOT, SBI_SRST_RESET_REASON_NONE);
+}
+
+/**
+ This function causes the system to enter a power state equivalent
+ to the ACPI G2/S5 or G3 states.
+
+ If this function returns, it means that the system does not support shutdown reset.
+**/
+VOID
+EFIAPI
+ResetShutdown (
+ VOID
+ )
+{
+ // Shut down via SBI ecall
+ SbiSystemReset (SBI_SRST_RESET_TYPE_SHUTDOWN, SBI_SRST_RESET_REASON_NONE);
+}
+
+/**
+ This function causes a systemwide reset. The exact type of the reset is
+ defined by the EFI_GUID that follows the Null-terminated Unicode string passed
+ into ResetData. If the platform does not recognize the EFI_GUID in ResetData
+ the platform must pick a supported reset type to perform. The platform may
+ optionally log the parameters from any non-normal reset that occurs.
+
+ @param[in] DataSize The size, in bytes, of ResetData.
+ @param[in] ResetData The data buffer starts with a Null-terminated string,
+ followed by the EFI_GUID.
+**/
+VOID
+EFIAPI
+ResetPlatformSpecific (
+ IN UINTN DataSize,
+ IN VOID *ResetData
+ )
+{
+ //
+ // Can map to OpenSBI vendor or platform specific reset type.
+ //
+ return;
+}
+
+/**
+ The ResetSystem function resets the entire platform.
+
+ @param[in] ResetType The type of reset to perform.
+ @param[in] ResetStatus The status code for the reset.
+ @param[in] DataSize The size, in bytes, of ResetData.
+ @param[in] ResetData For a ResetType of EfiResetCold, EfiResetWarm, or EfiResetShutdown
+ the data buffer starts with a Null-terminated string, optionally
+ followed by additional binary data. The string is a description
+ that the caller may use to further indicate the reason for the
+ system reset.
+**/
+VOID
+EFIAPI
+ResetSystem (
+ IN EFI_RESET_TYPE ResetType,
+ IN EFI_STATUS ResetStatus,
+ IN UINTN DataSize,
+ IN VOID *ResetData OPTIONAL
+ )
+{
+ switch (ResetType) {
+ case EfiResetWarm:
+ ResetWarm ();
+ break;
+
+ case EfiResetCold:
+ ResetCold ();
+ break;
+
+ case EfiResetShutdown:
+ ResetShutdown ();
+ return;
+
+ case EfiResetPlatformSpecific:
+ ResetPlatformSpecific (DataSize, ResetData);
+ return;
+
+ default:
+ return;
+ }
+}
diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.c b/Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.c
index 9bbeaaec3f7a..319526ed8f9f 100644
--- a/Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.c
+++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.c
@@ -15,7 +15,7 @@
- SbiLegacyRemoteSfenceVmaAsid -> Use SbiRemoteSfenceVmaAsid
- SbiLegacyShutdown -> Wait for new System Reset extension
- Copyright (c) 2020, Hewlett Packard Development LP. All rights reserved.<BR>
+ Copyright (c) 2021, Hewlett Packard Development LP. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
@@ -715,6 +715,48 @@ SbiRemoteHFenceVvma (
return TranslateError (Ret.Error);
}
+/**
+ Reset the system
+
+ The System Reset Extension provides a function that allow the supervisor
+ software to request system-level reboot or shutdown. The term "system" refers
+ to the world-view of supervisor software and the underlying SBI
+ implementation could be machine mode firmware or hypervisor.
+
+ Valid parameters for ResetType and ResetReason are defined in sbi_ecall_interface.h
+
+ #define SBI_SRST_RESET_TYPE_SHUTDOWN 0x0
+ #define SBI_SRST_RESET_TYPE_COLD_REBOOT 0x1
+ #define SBI_SRST_RESET_TYPE_WARM_REBOOT 0x2
+
+ #define SBI_SRST_RESET_REASON_NONE 0x0
+ #define SBI_SRST_RESET_REASON_SYSFAIL 0x1
+
+ When the call is successful, it will not return.
+
+ @param[in] ResetType Typ of reset: Shutdown, cold-, or warm-reset.
+ @param[in] ResetReason Why the system resets. No reason or system failure.
+ @retval EFI_INVALID_PARAMETER Either ResetType or ResetReason is invalid.
+ @retval EFI_UNSUPPORTED ResetType is valid but not implemented on the platform.
+ @retval EFI_DEVICE_ERROR Unknown error.
+**/
+EFI_STATUS
+EFIAPI
+SbiSystemReset (
+ IN UINTN ResetType,
+ IN UINTN ResetReason
+ )
+{
+ SbiRet Ret = SbiCall (
+ SBI_EXT_SRST,
+ SBI_EXT_SRST_RESET,
+ 2,
+ ResetType,
+ ResetReason
+ );
+ return TranslateError (Ret.Error);
+}
+
//
// SBI interface function for the vendor extension
//
diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/opensbi b/Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/opensbi
index a731c7e36988..937caee08331 160000
--- a/Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/opensbi
+++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/opensbi
@@ -1 +1 @@
-Subproject commit a731c7e36988c3308e1978ecde491f2f6182d490
+Subproject commit 937caee0833115f69d697ca190001ba0aa5c7368
--
2.31.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [edk2-platforms] [PATCH v3 14/14] Move OpenSbiPlatformLib to RISC-V/PlatformPkg
2021-10-19 3:48 [edk2-platforms] [PATCH v3 00/14] Use generic OpenSBI platform Daniel Schaefer
` (12 preceding siblings ...)
2021-10-19 3:48 ` [edk2-platforms] [PATCH v3 13/14] RISC-V: Implement ResetSystem RT call Daniel Schaefer
@ 2021-10-19 3:48 ` Daniel Schaefer
2021-10-19 5:58 ` [edk2-platforms] [PATCH v3 00/14] Use generic OpenSBI platform Abner Chang
14 siblings, 0 replies; 16+ messages in thread
From: Daniel Schaefer @ 2021-10-19 3:48 UTC (permalink / raw)
To: devel; +Cc: Daniel Schaefer, Abner Chang, Sunil V L
It's a generic platform file. Only the device tree decides what happens.
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
Cc: Abner Chang <abner.chang@hpe.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Abner Chang <abner.chang@hpe.com>
Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
---
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc | 2 +-
Platform/{SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard => RISC-V/PlatformPkg}/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf | 0
Platform/{SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard => RISC-V/PlatformPkg}/Library/OpensbiPlatformLib/PlatformOverride.h | 0
Platform/{SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard => RISC-V/PlatformPkg}/Library/OpensbiPlatformLib/Platform.c | 13 ++++++++++++-
Platform/{SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard => RISC-V/PlatformPkg}/Library/OpensbiPlatformLib/SifiveFu540.c | 0
5 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
index 18a482aba611..5d2ccafacaf3 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
@@ -173,7 +173,7 @@
#
# OpenSBi Platform Library
#
- RiscVOpensbiPlatformLib|Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf
+ RiscVOpensbiPlatformLib|Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf
[LibraryClasses.common.PEI_CORE]
HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf b/Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf
similarity index 100%
rename from Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf
rename to Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/PlatformOverride.h b/Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/PlatformOverride.h
similarity index 100%
rename from Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/PlatformOverride.h
rename to Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/PlatformOverride.h
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/Platform.c b/Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/Platform.c
similarity index 88%
rename from Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/Platform.c
rename to Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/Platform.c
index ac76f073ab53..c4cf6782bd1f 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/Platform.c
+++ b/Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/Platform.c
@@ -201,13 +201,24 @@ const struct sbi_platform_operations platform_ops = {
.timer_exit = fdt_timer_exit,
};
+#if FixedPcdGet32(PcdBootableHartNumber) == 4
+#define U540_BOOTABLE_HART_COUNT FixedPcdGet32(PcdBootableHartNumber)
+static u32 U540_hart_index2id[U540_BOOTABLE_HART_COUNT] = {1, 2, 3, 4};
+#endif
+
struct sbi_platform platform = {
.opensbi_version = OPENSBI_VERSION,
.platform_version = SBI_PLATFORM_VERSION(0x0, 0x01),
.name = "Generic",
.features = SBI_PLATFORM_DEFAULT_FEATURES,
.hart_count = SBI_HARTMASK_MAX_BITS,
+// TODO: Workaround for U540. Not sure why we need this. OpenSBI doesn't need it.
+#if FixedPcdGet32(PcdBootableHartNumber) == 4
+ .hart_index2id = U540_hart_index2id,
+#else
.hart_index2id = generic_hart_index2id,
- .hart_stack_size = SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
+#endif
+ // TODO: Any reason why it shouldn't just be SBI_PLATFORM_DEFAULT_HART_STACK_SIZE?
+ .hart_stack_size = FixedPcdGet32(PcdOpenSbiStackSize),
.platform_ops_addr = (unsigned long)&platform_ops
};
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/SifiveFu540.c b/Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/SifiveFu540.c
similarity index 100%
rename from Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/OpensbiPlatformLib/SifiveFu540.c
rename to Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/SifiveFu540.c
--
2.31.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [edk2-platforms] [PATCH v3 00/14] Use generic OpenSBI platform
2021-10-19 3:48 [edk2-platforms] [PATCH v3 00/14] Use generic OpenSBI platform Daniel Schaefer
` (13 preceding siblings ...)
2021-10-19 3:48 ` [edk2-platforms] [PATCH v3 14/14] Move OpenSbiPlatformLib to RISC-V/PlatformPkg Daniel Schaefer
@ 2021-10-19 5:58 ` Abner Chang
14 siblings, 0 replies; 16+ messages in thread
From: Abner Chang @ 2021-10-19 5:58 UTC (permalink / raw)
To: Schaefer, Daniel, devel@edk2.groups.io; +Cc: Sunil V L
Merged.
Thanks
> -----Original Message-----
> From: Schaefer, Daniel
> Sent: Tuesday, October 19, 2021 11:49 AM
> To: devel@edk2.groups.io
> Cc: Schaefer, Daniel <daniel.schaefer@hpe.com>; Chang, Abner (HPS
> SW/FW Technologist) <abner.chang@hpe.com>; Sunil V L
> <sunilvl@ventanamicro.com>
> Subject: [edk2-platforms] [PATCH v3 00/14] Use generic OpenSBI platform
>
> Just fixed up the patches to conform with PatchCheck.py from edk2.
> Reviewed by Abner, good to merge.
>
> Cc: Abner Chang <abner.chang@hpe.com>
> Cc: Sunil V L <sunilvl@ventanamicro.com>
>
> Abner Chang (4):
> Silicon/RISC-V: Introduce FirmwareContext library
> Silicon/RISC-V: PeiServiceTableLib uses RiscVFirmwareContextLib
> SiFive/U5SeriesPkg: Use FirmwareContext library
> RISC-V/PlatformPkg: Add FdtPeim to pass DTB from PEI to DXE via HOB
>
> Daniel Schaefer (10):
> U5SeriesPkg: Deduplicate PlatformPei
> RISC-V: Split SMBIOS out of PlatformPei
> RISC-V: Use U5 SMBIOS library only for those platforms
> U540: Add and build device tree
> RISC-V/PlatformPkg: Build DeviceTree and use that in SEC
> RISC-V/PlatformPkg: Fixup FDT from HOB and install into config table
> U5SeriesPkg: Switch to generic OpenSBI platform
> RISC-V: Switch to latest OpenSBI
> RISC-V: Implement ResetSystem RT call
> Move OpenSbiPlatformLib to RISC-V/PlatformPkg
>
> Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec
> | 4 +
> Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec
> | 1 +
> Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc
> | 16 +-
>
> Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
> | 29 +-
> Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc
> | 7 +-
> Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf
> | 2 +-
> Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf
> | 10 +-
> Platform/{SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard => RISC-
> V/PlatformPkg}/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf | 2 +
> Platform/RISC-
> V/PlatformPkg/Library/PeiCoreInfoHobLibNull/PeiCoreInfoHobLib.inf
> | 43 +++
> Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf
> | 33 +++
> Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.inf
> | 49 ++++
> Platform/{SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard => RISC-
> V/PlatformPkg}/Universal/Pei/PlatformPei/PlatformPei.inf | 6 +-
> Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf
> | 2 +
>
> Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Universal/Pei/Platf
> ormPei/PlatformPei.inf | 73 -----
>
> Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTr
> ee/U540DeviceTree.inf | 25 ++
>
> Platform/SiFive/U5SeriesPkg/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.
> inf | 4 +-
> Silicon/RISC-
> V/ProcessorPkg/Library/PeiServicesTablePointerLibOpenSbi/PeiServicesTabl
> ePointerLibOpenSbi.inf | 4 +-
> Silicon/RISC-
> V/ProcessorPkg/Library/RiscVFirmwareContextSbiLib/RiscVFirmwareContext
> SbiLib.inf | 34 +++
> Silicon/RISC-
> V/ProcessorPkg/Library/RiscVFirmwareContextSscratchLib/RiscVFirmwareCo
> ntextSscratchLib.inf | 33 +++
> Silicon/RISC-
> V/ProcessorPkg/Library/RiscVFirmwareContextStvecLib/RiscVFirmwareCont
> extStvecLib.inf | 34 +++
> Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/RiscVOpensbiLib.inf
> | 13 +-
> Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.inf
> | 53 ++++
> Platform/RISC-
> V/PlatformPkg/Library/OpensbiPlatformLib/PlatformOverride.h
> | 30 ++
> Platform/{SiFive/U5SeriesPkg/FreedomU500VC707Board => RISC-
> V/PlatformPkg}/Universal/Pei/PlatformPei/Platform.h | 0
>
> Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTr
> ee/gpio.h | 42 +++
>
> Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTr
> ee/sifive-fu540-prci.h | 18 ++
>
> Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universa
> l/Pei/PlatformPei/Platform.h | 86 ------
> Platform/SiFive/U5SeriesPkg/Include/SiFiveU5MCCoreplex.h
> | 33 +--
> Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscV.h
> | 3 +-
> Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscVOpensbi.h
> | 1 +
> Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h
> | 14 +-
> Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVEdk2SbiLib.h
> | 39 ++-
> Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVFirmwareContextLib.h
> | 43 +++
> Silicon/RISC-V/ProcessorPkg/Include/OpensbiTypes.h
> | 1 +
> Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/Platform.c
> | 224 ++++++++++++++
> Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/SifiveFu540.c
> | 47 +++
> Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLibNull/Platform.c
> | 27 +-
> Platform/RISC-
> V/PlatformPkg/Library/PeiCoreInfoHobLibNull/CoreInfoHob.c
> | 37 +++
> Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c
> | 128 ++++++++
> Platform/RISC-V/PlatformPkg/Universal/FdtPeim/FdtPeim.c
> | 70 +++++
> Platform/{SiFive/U5SeriesPkg/FreedomU500VC707Board => RISC-
> V/PlatformPkg}/Universal/Pei/PlatformPei/Fv.c | 0
> Platform/{SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard => RISC-
> V/PlatformPkg}/Universal/Pei/PlatformPei/MemDetect.c | 11 +-
> Platform/{SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard => RISC-
> V/PlatformPkg}/Universal/Pei/PlatformPei/Platform.c | 21 +-
> Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c
> | 54 +++-
>
> Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Library/OpensbiPlat
> formLib/Platform.c | 29 +-
>
> Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Universal/Pei/Platf
> ormPei/MemDetect.c | 74 -----
>
> Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Universal/Pei/Platf
> ormPei/Platform.c | 310 --------------------
>
> Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/
> OpensbiPlatformLib/Platform.c | 216 --------------
>
> Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universa
> l/Pei/PlatformPei/Fv.c | 51 ----
> Platform/SiFive/U5SeriesPkg/Library/PeiCoreInfoHobLib/CoreInfoHob.c
> | 32 +-
> Platform/SiFive/U5SeriesPkg/Library/SerialIoLib/SerialPortLib.c
> | 81 ++++-
> Silicon/RISC-
> V/ProcessorPkg/Library/PeiServicesTablePointerLibOpenSbi/PeiServicesTabl
> ePointerOpenSbi.c | 8 +-
> Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.c
> | 44 ++-
> Silicon/RISC-
> V/ProcessorPkg/Library/RiscVFirmwareContextSbiLib/RiscVFirmwareContext
> SbiLib.c | 52 ++++
> Silicon/RISC-
> V/ProcessorPkg/Library/RiscVFirmwareContextSscratchLib/RiscVFirmwareCo
> ntextSscratchLib.c | 48 +++
> Silicon/RISC-
> V/ProcessorPkg/Library/RiscVFirmwareContextStvecLib/RiscVFirmwareCont
> extStvecLib.c | 48 +++
> Silicon/RISC-V/ProcessorPkg/Universal/FdtDxe/FdtDxe.c
> | 116 ++++++++
> Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S
> | 24 +-
> Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf.inc
> | 6 +-
>
> Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTr
> ee.fdf.inc | 35 +++
>
> Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTr
> ee/fu540-c000.dtsi | 287 ++++++++++++++++++
>
> Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTr
> ee/hifive-unleashed-a00.dts | 106 +++++++
>
> Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf
> .inc | 14 +-
> Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/Cpu.S
> | 34 ++-
> 64 files changed, 2055 insertions(+), 966 deletions(-)
> rename Platform/{SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard
> => RISC-V/PlatformPkg}/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf
> (94%)
> create mode 100644 Platform/RISC-
> V/PlatformPkg/Library/PeiCoreInfoHobLibNull/PeiCoreInfoHobLib.inf
> create mode 100644 Platform/RISC-
> V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf
> create mode 100644 Platform/RISC-
> V/PlatformPkg/Universal/FdtPeim/FdtPeim.inf
> rename Platform/{SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard
> => RISC-V/PlatformPkg}/Universal/Pei/PlatformPei/PlatformPei.inf (87%)
> delete mode 100644
> Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Universal/Pei/Platf
> ormPei/PlatformPei.inf
> create mode 100644
> Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTr
> ee/U540DeviceTree.inf
> create mode 100644 Silicon/RISC-
> V/ProcessorPkg/Library/RiscVFirmwareContextSbiLib/RiscVFirmwareContext
> SbiLib.inf
> create mode 100644 Silicon/RISC-
> V/ProcessorPkg/Library/RiscVFirmwareContextSscratchLib/RiscVFirmwareCo
> ntextSscratchLib.inf
> create mode 100644 Silicon/RISC-
> V/ProcessorPkg/Library/RiscVFirmwareContextStvecLib/RiscVFirmwareCont
> extStvecLib.inf
> create mode 100644 Silicon/RISC-
> V/ProcessorPkg/Universal/FdtDxe/FdtDxe.inf
> create mode 100644 Platform/RISC-
> V/PlatformPkg/Library/OpensbiPlatformLib/PlatformOverride.h
> rename Platform/{SiFive/U5SeriesPkg/FreedomU500VC707Board => RISC-
> V/PlatformPkg}/Universal/Pei/PlatformPei/Platform.h (100%)
> create mode 100644
> Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTr
> ee/gpio.h
> create mode 100644
> Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTr
> ee/sifive-fu540-prci.h
> delete mode 100644
> Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universa
> l/Pei/PlatformPei/Platform.h
> create mode 100644 Silicon/RISC-
> V/ProcessorPkg/Include/Library/RiscVFirmwareContextLib.h
> create mode 100644 Platform/RISC-
> V/PlatformPkg/Library/OpensbiPlatformLib/Platform.c
> create mode 100644 Platform/RISC-
> V/PlatformPkg/Library/OpensbiPlatformLib/SifiveFu540.c
> create mode 100644 Platform/RISC-
> V/PlatformPkg/Library/PeiCoreInfoHobLibNull/CoreInfoHob.c
> create mode 100644 Platform/RISC-
> V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c
> create mode 100644 Platform/RISC-
> V/PlatformPkg/Universal/FdtPeim/FdtPeim.c
> rename Platform/{SiFive/U5SeriesPkg/FreedomU500VC707Board => RISC-
> V/PlatformPkg}/Universal/Pei/PlatformPei/Fv.c (100%)
> rename Platform/{SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard
> => RISC-V/PlatformPkg}/Universal/Pei/PlatformPei/MemDetect.c (79%)
> rename Platform/{SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard
> => RISC-V/PlatformPkg}/Universal/Pei/PlatformPei/Platform.c (89%)
> delete mode 100644
> Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Universal/Pei/Platf
> ormPei/MemDetect.c
> delete mode 100644
> Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/Universal/Pei/Platf
> ormPei/Platform.c
> delete mode 100644
> Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/
> OpensbiPlatformLib/Platform.c
> delete mode 100644
> Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Universa
> l/Pei/PlatformPei/Fv.c
> create mode 100644 Silicon/RISC-
> V/ProcessorPkg/Library/RiscVFirmwareContextSbiLib/RiscVFirmwareContext
> SbiLib.c
> create mode 100644 Silicon/RISC-
> V/ProcessorPkg/Library/RiscVFirmwareContextSscratchLib/RiscVFirmwareCo
> ntextSscratchLib.c
> create mode 100644 Silicon/RISC-
> V/ProcessorPkg/Library/RiscVFirmwareContextStvecLib/RiscVFirmwareCont
> extStvecLib.c
> create mode 100644 Silicon/RISC-
> V/ProcessorPkg/Universal/FdtDxe/FdtDxe.c
> create mode 100644
> Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTr
> ee.fdf.inc
> create mode 100644
> Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTr
> ee/fu540-c000.dtsi
> create mode 100644
> Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/DeviceTr
> ee/hifive-unleashed-a00.dts
>
> --
> 2.31.1
^ permalink raw reply [flat|nested] 16+ messages in thread