From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0a-002e3701.pphosted.com (mx0a-002e3701.pphosted.com [148.163.147.86]) by mx.groups.io with SMTP id smtpd.web09.7328.1634634496365987367 for ; Tue, 19 Oct 2021 02:08:24 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@hpe.com header.s=pps0720 header.b=VWlOqQzr; spf=temperror, err=temporary DNS error (domain: hpe.com, ip: 148.163.147.86, mailfrom: prvs=0926d272d9=abner.chang@hpe.com) Received: from pps.filterd (m0134421.ppops.net [127.0.0.1]) by mx0b-002e3701.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 19J61ulu018328; Tue, 19 Oct 2021 09:08:16 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=hpe.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : content-transfer-encoding : mime-version; s=pps0720; bh=LHefBIDm6ndKtDs0yMWKT0s32wVh+sVbHpT7mtzYpZA=; b=VWlOqQzr/ivd/frhBYZe2GSy5XHTGmIvNBkTVy9e1d/2ocd0slvqJsugWyU3eQ8OwRBq rk0/nSvkZXY6RPbLn9OR+dzCx2AnaISm7my+qZrMUbLl0qzRjwA2nwK9V8ksvtKGp+ho /yCk6WCwIhmedZurWLEErRchB23l6u28yiJMQISyxiS/AtdTSNIaWOzytqSbgR4m6tdx lRS4XX2Div46ntvTpjL7nZLn20Vkib3TRb/t1pcTP+tBYi2hrQe1wXegIr8CDlMpGuRC e7hyzsK2CWqqXYtzv4S7IiwDGoAbMNoYy2SAl4vYwp8XFOxNSYYFJLURnIOz0EG+DRIP 7A== Received: from g4t3426.houston.hpe.com (g4t3426.houston.hpe.com [15.241.140.75]) by mx0b-002e3701.pphosted.com with ESMTP id 3bsd6x5gpt-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 Oct 2021 09:08:14 +0000 Received: from g9t2301.houston.hpecorp.net (g9t2301.houston.hpecorp.net [16.220.97.129]) by g4t3426.houston.hpe.com (Postfix) with ESMTP id B3BFE5F; Tue, 19 Oct 2021 09:08:13 +0000 (UTC) Received: from UB16Abner.asiapacific.hpqcorp.net (ub16abner.asiapacific.hpqcorp.net [15.119.209.229]) by g9t2301.houston.hpecorp.net (Postfix) with ESMTP id 077D748; Tue, 19 Oct 2021 09:08:11 +0000 (UTC) From: "Abner Chang" To: devel@edk2.groups.io Cc: abner.chang@hpe.com, Daniel Schaefer , Sunil V L Subject: [edk2-platforms][PATCH 01/30] RISC-V/PlatformPkg: Update document Date: Tue, 19 Oct 2021 16:09:38 +0800 Message-Id: <20211019081007.31165-2-abner.chang@hpe.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20211019081007.31165-1-abner.chang@hpe.com> References: <20211019081007.31165-1-abner.chang@hpe.com> X-Proofpoint-GUID: 9ycZggOtCcYD3AEfLU0Cb2W8-6DSagbA X-Proofpoint-ORIG-GUID: 9ycZggOtCcYD3AEfLU0Cb2W8-6DSagbA X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-HPE-SCL: -1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475 definitions=2021-10-18_07,2021-10-18_01,2020-04-07_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 adultscore=0 spamscore=0 suspectscore=0 bulkscore=0 phishscore=0 clxscore=1015 mlxlogscore=999 malwarescore=0 priorityscore=1501 lowpriorityscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2109230001 definitions=main-2110190056 Content-Transfer-Encoding: quoted-printable Update EDK2 RISC-V port architectural diagrams. Cc: Daniel Schaefer Cc: Sunil V L Signed-off-by: Abner Chang --- Platform/RISC-V/PlatformPkg/Readme.md | 132 +- .../Documents/Media/RiscVEdk2BootProcess.svg | 1928 +++++++++++++++++ .../Documents/Media/RiscVEdk2FwDomain.svg | 1290 +++++++++++ 3 files changed, 3336 insertions(+), 14 deletions(-) create mode 100644 Platform/RISC-V/PlatformPkg/Documents/Media/RiscVEdk2Bo= otProcess.svg create mode 100644 Platform/RISC-V/PlatformPkg/Documents/Media/RiscVEdk2Fw= Domain.svg diff --git a/Platform/RISC-V/PlatformPkg/Readme.md b/Platform/RISC-V/Platfo= rmPkg/Readme.md index 4b933a2e0f..66fba15544 100644 --- a/Platform/RISC-V/PlatformPkg/Readme.md +++ b/Platform/RISC-V/PlatformPkg/Readme.md @@ -2,6 +2,113 @@ =0D ## EDK2 RISC-V Platform Project=0D =0D +### EDK2 RISC-V Design and the Boot Processes=0D +RISC-V edk2 port is designed base on edk2 boot phases and leverage [RISC-V= OpenSBI](https://github.com/riscv/opensbi) (which is the implementation of= [RISC-V SBI](https://github.com/riscv/riscv-sbi-doc)) as an edk2 library. = The design concept is to leverage RISC-V SBI implementation, the basic RISC= -V HARTs and the platform initialization. However, it still keeps the edk2 = build mechanism and the boot processes. RISC-V OpenSBI is built as=0D +an library and linked with edk2 SEC module. The design diagram and the boo= t flow is shown in below figure,=0D +=0D +#### RISC-V EDK2 Port Design Diagrams=0D +![RISC-V EDK2 Port](https://github.com/tianocore/edk2-platforms/blob/maste= r/Platform/RISC-V/PlatformPkg/Documents/Media/RiscVEdk2BootProcess.svg?raw= =3Dtrue)=0D +=0D +#### SEC Phase=0D +As the most of edk2 platforms SEC implementations, RISC-V edk2 port SEC mo= dule initiates the fundamental platform=0D +boot environment. RISC-V edk2 SEC module linked with [RiscVOpensbiLib](#ri= scvopensbilib-library) that pulls in the OpenSBI core source files into the= build as a library. SEC module invokes sbi_init() to execute through the O= penSBI=0D +initialization flow. Afterwards, SEC phase hands off to PEI phase via Open= SBI with the ***NextAddress*** and ***NextMode*** are configured.=0D +The entire SEC phase with ***RiscVOpensbiLib*** is executed in the Machine= -mode (M-mode) which is the highest=0D +and the mandatory privilege mode of RISC-V HART. The SBI implementation is= also executed in the M-mode that=0D +provides the Supervisor Binary Interface for the entities run in the Super= visor-mode (S-mode). The default=0D +privilege mode is configured to S-mode for the next phase after SEC, that = says the PEI, DXE and BDS phases are=0D +default executed in S-mode unless the corresponding [PCDs](#risc-v-platfor= m-pcd-settings) are configured=0D +differently from the default settings according to the OEM platform design= .=0D +=0D +##### RiscVOpensbiLib Library=0D +[Indicated as #1 in the figure](#risc-v-edk2-port-design-diagrams)=0D +> ***RiscVOpensbiLib*** is a edk2 wrapper library of OpenSBI. SEC module i= s the only consumer of ***RiscVOpensbiLib*** across the entire edk2 boot pr= ocesses. The sub-module under ***RiscVOpensbiLib*** is updated=0D +to align with OpenSBI project. As mentioned earlier, ***RiscVOpensbiLib***= provides the RISC-V SBI=0D +implementation and initialize the OpenSBI boot flow. SEC module is also li= nked with below libraries,=0D +- edk2 [OpenSbiPlatformLib](#OpenSbiPlatformLib-library) library that prov= ides the generic RISC-V platform initialization code.=0D +- edk2 [RiscVSpecifialPlatformLib](#RiscVSpecifialPlatformLib-library) lib= rary which is provided by the RISC-V=0D +platform vendor for the platform-specific initialization. The underlying i= mplementation of above two edk2 libraries=0D +are from OpenSBI project. edk2 libraries are introduced as the wrapper lib= raries that separates and organizes OpenSBI core and platform code based on= edk2 framework and the the build mechanism for edk2 RISC-V platforms. ***R= iscVOpensbiLib*** library is located under [RISC-V ProcessorPkg](https://gi= thub.com/tianocore/edk2-platforms/tree/master/Silicon/RISC-V/ProcessorPkg) = while the platform code (e.g. OpenSbiPlatformLib) is located under [RISC-V = PlatformPkg](https://github.com/tianocore/edk2-platforms/tree/master/Platfo= rm/RISC-V/PlatformPkg).=0D +- edk2 [RiscVSpecifialPlatformLib](#riscvspecifialplatformlib) library is = provided by the platform vendor and located under edk2 RISC-V platform-spec= ific folder.=0D +=0D +##### OpenSbiPlatformLib Library=0D +[Indicated as #2 in the figure](#risc-v-edk2-port-design-diagrams)=0D +> ***OpenSbiPlatformLib*** provides the generic RISC-V platform initializa= tion code. Platform vendor can just utilize this library if they don't have= additional requirements on the platform initialization.=0D +=0D +##### RiscVSpecifialPlatformLib Library=0D +[Indicated as #3 in the figure](#risc-v-edk2-port-design-diagrams)=0D +> The major use case of this library is to facilitate the interfaces for p= latform vendors to provide the special=0D +platform initialization based on the generic platform initialization libra= ry.=0D +=0D +##### Edk2OpensbiPlatformWrapperLib Library=0D +[Indicated as #4 in the figure](#risc-v-edk2-port-design-diagrams)=0D +> In order to providing the flexibility to edk2 RISC-V firmware solution, = ***Edk2OpensbiPlatformWrapperLib*** is the wrapper library of [OpenSbiPlatf= ormLib](#OpenSbiPlatformLib-library) to provide the interfaces for OEM. The= ***platform_ops_address***in the generic platform structure is replaced wi= th ***Edk2OpensbiplatformOps*** in SEC=0D +module. The platform function invoked by OpenSBI core is hooked to ***Edk2= OpensbiPlatformWrapperLib***. This gives=0D +a change to OEM for implementing platform-specific initialization before a= nd after the generic platform code. OEM=0D +can override this library under their platform folder on demand without to= uching ***RiscVOpensbiLib*** library=0D +source files and other common source files.=0D +=0D +##### Next Phase Address and Privilege Mode=0D +[Indicated as #5 in the figure](#risc-v-edk2-port-design-diagrams)=0D +> Once OpenSBI finishes the boot initialization, it will jump to the next = phase with the default privilege set to=0D +S-mode. In order to facilitate the flexibility for a variant of platform d= emands. EDK2 RISC-V provides the [PCDs](#risc-v-platform-pcd-settings) as t= he configurable privilege for the next phase. Whether to have PEI or later= =0D +phases executed in the default S-mode or to keep the RISC-V edk2 boot phas= e privilege in M-mode is at platform design discretion. The SEC module sets= the next phase address to the PEI Core entry point with a configurable=0D +privilege according to the PCD.=0D +=0D +#### PEI Phase=0D +SEC module hands off the boot process to PEI core in the privilege configu= red by ***PcdPeiCorePrivilegeMode*** PCD *(TODO, currently the privilege is= forced to S-mode)*. PEI and later phases are allowed to executed in M-mode= =0D +if the platform doesn't require Hypervisor-extended Supervisor mode (HS-mo= de) for the virtualization. RISC-V edk2 port provides its own instance ***P= eiCoreEntryPoint*** library [(indicated as #7 in the figure)](#risc-v-edk2-= port-design-diagrams) and linked with [PlatformSecPpiLib](#platformsecppili= b-library) in order to support the S-mode PEI phase. PEI core requires [Ris= cVFirmwareContextLib](#riscVfirmwarecontextlib-library) library to retrieve= the information of RISC-V HARTs and platform (e.g. FDT) configurations tha= t built up in SEC phase. ***PeiServicePointer*** is also maintained in the = ***RISC-V OpenSBI FirmwareContext*** structure and the pointer is retrieved= by [PeiServiceTablePointerOpensbi](#peiservicetablepointeropensbi-library)= library.=0D +=0D +##### PlatformSecPpiLib Library=0D +[Indicated as #8 in the figure](#risc-v-edk2-port-design-diagrams)=0D +=0D +> Some platform has the PEI protocol interface (PPI) prepared in SEC phase= and pass the PPI description to PEI phase for the installation. That means= the PPI code resides in SEC module and executed in PEI phase. Due to the S= EC=0D +(with OpenSBI) is protected by the RISC-V Physical Memory Protection (PMP)= through [OpenSBI firmware domain](#edk2-opensbi-firmware-domain), the SEC = can be only accessed and executed when RISC-V HART is operated in M-mode. T= he SEC PPI passed to PEI is not able to be executed by any PEI modules. Thu= s we have ***PlatformSecPpiLib*** library for the platforms that requires t= o install the PPI at the early stage of PEI core instead of installing PPI= =0D +during PEI dispatcher that maybe too late for some platform use cases. ***= PlatformSecPpiLib*** is currently=0D +executed in S-mode because we force to switch RISC-V boot HART to S-mode w= hen SEC hands of boot process to PEI=0D +phase. ***PlatformSecPpiLib*** can also executed in M-mode once we have th= e full implementation of [***PcdPeiCorePrivilegeMode***.](#risc-v-platform-= pcd-settings)=0D +=0D +##### RiscVFirmwareContextLib Library=0D +[Indicated as #9 in the figure](#risc-v-edk2-port-design-diagrams)=0D +=0D +> The ***OpenSBI FirmwareContext*** is a structure member in sbi_platform,= that can carry the firmware=0D +solution-defined information to edk2 boot phases after SEC. edk2 defines i= ts own ***FirmwareContext*** as below in=0D +the current implementation.=0D +=0D + typedef struct {=0D + UINT64 BootHartId;=0D + VOID *PeiServiceTable; // PEI Service table=0D + UINT64 FlattenedDeviceTree; // Pointer to Flattened= Device tree=0D + UINT64 SecPeiHandOffData; // This is EFI_SEC_PEI_= HAND_OFF passed to PEI Core.=0D + EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC *HartSpecific[RISC_V_MAX= _HART_SUPPORTED];=0D + } EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT;=0D +=0D +> ***RiscVFirmwareContextLib*** library is used by PEI module for obtainin= g the ***FirmwareContext*** pointer.=0D +=0D +##### PeiServiceTablePointerOpensbi Library=0D +[Indicated as #10 in the figure](#risc-v-edk2-port-design-diagrams)=0D +=0D +> ***PeiServiceTablePointerOpensbi*** is the library that provides Get/Set= PeiServiceTablePointer. ***RiscVFirmwareContextLib*** is the underlying li= brary for the operations on PEI service table pointer.=0D +=0D +##### PEI OpenSBI PPI=0D +[Indicated as #11 in the figure](#risc-v-edk2-port-design-diagrams)=0D +=0D +> edk2 PEI OpenSBI PPI *(TODO)* provides the unified interface for all PEI= drivers to invoke SBI services.=0D +=0D +#### DXE Phase=0D +DXE IPL PEI module hands off the boot process to DXE Core in the privilege= configured by PcdDxeCorePrivilegeMode PCD *(TODO, currently is not impleme= nted yet)*. edk2 DXE OpenSBI protocol *(TODO, indicated as #12 in the figur= e)* provides the unified interface for all DXE drivers to invoke SBI servic= es.=0D +=0D +#### BDS Phase=0D +The implementation of RISC-V edk2 port in BDS phase is the same as it is i= n DXE phase which is executed in the=0D +privilege configured by PcdDxeCorePrivilegeMode PCD *(TODO, currently the = privilege is forced to S-mode)*. The=0D +OpenSBI is also provided through edk2 DXE OpenSBI Protocol*(TODO, indicate= d as #12 in the figure)*. However, BDS must transits the privilege mode to = S-mode before it handing off the boot process to S-mode OS, OS boot loader = or EFI application.=0D +=0D +#### EDK2 OpenSBI Firmware Domain=0D +=0D +![RISC-V EDK2 FW Domain](https://github.com/tianocore/edk2-platforms/blob/= master/Platform/RISC-V/PlatformPkg/Documents/Media/RiscVEdk2FwDomain.svg?ra= w=3Dtrue)=0D +=0D +OpenSBI implements the firmware domain mechanism to protect the root firmw= are (which is the OpenSBI itself) as the M-mode only access and execute reg= ion. RISC-V edk2 port configures the root firmware domain via [PCDs](#risc-= v-platform-pcd-settings) to protect SEC firmware volume, memory and OpenSBI= stuff. The firmware region (non-root firmware) that accommodates PEI and D= XE phase FV regions, while EFI variable region is reported as a separate fi= rmware region as it shows in above figure.=0D +=0D ### EDK2 Build Architecture for RISC-V=0D The edk2 build architecture which is supported and verified on edk2 code b= ase for=0D RISC-V platforms is `RISCV64`.=0D @@ -49,18 +156,9 @@ Then you can build the edk2 firmware image for RISC-V p= latforms. build -a RISCV64 -t GCC5 -p Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveU= nleashedBoard/U540.dsc=0D ```=0D =0D -## RISC-V OpenSBI Library=0D -RISC-V [OpenSBI](https://github.com/riscv/opensbi) is the implementation o= f=0D -[RISC-V SBI (Supervisor Binary Interface) specification](https://github.co= m/riscv/riscv-sbi-doc).=0D -For EDK2 UEFI firmware solution, RISC-V OpenSBI is integrated as a library= =0D -[(submoudule)](Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/opensbi= ) in EDK2=0D -RISC-V Processor Package. The RISC-V OpenSBI library is built in SEC drive= r without=0D -any modifications and provides the interfaces for supervisor mode executio= n environment=0D -to execute privileged operations.=0D -=0D ## RISC-V Platform PCD settings=0D ### EDK2 Firmware Volume Settings=0D -EDK2 Firmware volume related PCDs which declared in platform FDF file.=0D +EDK2 Firmware volume related PCDs which is declared in platform FDF file.= =0D =0D | **PCD name** |**Usage**|=0D |--------------|---------|=0D @@ -86,10 +184,14 @@ The PCD settings regard to EFI Variable ### RISC-V Physical Memory Protection (PMP) Region Settings=0D Below PCDs could be set in platform FDF file.=0D =0D -| **PCD name** |**Usage**|=0D -|--------------|---------|=0D -|PcdFwStartAddress| The starting address of firmware region to protected b= y PMP|=0D -|PcdFwEndAddress| The ending address of firmware region to protected by PM= P|=0D +| **PCD name** |**Usage**|**Access Permission in M-mode**|**Access Permiss= ion in S-mode**|=0D +|--------------|---------|---------|---------|=0D +|PcdRootFirmwareDomainBaseAddress| The starting address of root firmware d= omain protected by PMP|Full access|No Access|=0D +|PcdRootFirmwareDomainSize| The size of root firmware domain|-|-|=0D +|PcdFirmwareDomainBaseAddress| The starting address of firmware domain tha= t can be accessed and executed in S-mode|Full access|Readable and Executabl= e|=0D +|PcdFirmwareDomainSize| The size of firmware domain|-|-|=0D +|PcdVariableFirmwareRegionBaseAddress| The starting address of EFI variabl= e region that can be accessed in S-mode|Full access|Readale and Writable|=0D +|PcdVariableFirmwareRegionSize| The size of EFI variable firmware region|-= |-|=0D =0D ### RISC-V Processor HART Settings=0D =0D @@ -98,6 +200,7 @@ Below PCDs could be set in platform FDF file. |PcdHartCount| Number of RISC-V HARTs, the value is processor-implementati= on specific|=0D |PcdBootHartId| The ID of RISC-V HART to execute main fimrware code and bo= ot system to OS|=0D |PcdBootableHartNumber|The bootable HART number, which is incorporate with= RISC-V OpenSBI platform hart_index2id value|=0D +|PcdBootableHartIndexToId| if PcdBootableHartNumber =3D=3D 0, hart_index2i= d is built from Device Tree, otherwise this is an array of HART index to HA= RT ID|=0D =0D ### RISC-V OpenSBI Settings=0D =0D @@ -109,6 +212,7 @@ Below PCDs could be set in platform FDF file. |PcdTemporaryRamBase| The base address of temporary memory for PEI phase|= =0D |PcdTemporaryRamSize| The temporary memory size for PEI phase|=0D |PcdPeiCorePrivilegeMode|The target RISC-V privilege mode for edk2 PEI pha= se|=0D +|PcdDxeCorePrivilegeMode (TODO)|The target RISC-V privilege mode for edk2 = DXE phase|=0D =0D ## Supported Operating Systems=0D Currently support boot to EFI Shell and Linux kernel.=0D diff --git a/Platform/RISC-V/PlatformPkg/Documents/Media/RiscVEdk2BootProce= ss.svg b/Platform/RISC-V/PlatformPkg/Documents/Media/RiscVEdk2BootProcess.s= vg new file mode 100644 index 0000000000..dfd47a75b9 --- /dev/null +++ b/Platform/RISC-V/PlatformPkg/Documents/Media/RiscVEdk2BootProcess.svg @@ -0,0 +1,1928 @@ +=0D +=0D +=0D +=0D + =0D + =0D + =0D + =0D + =0D +=0D + =0D +=0D + =0D + =0D + = =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + = =0D + =0D + =0D + = =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + = =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Page-2=0D + =0D + =0D + =0D + =0D + Rectangle.356=0D + =0D + =0D + =0D + =0D + =0D + =0D + Rectangle.229=0D + =0D + =0D + =0D + =0D + =0D + =0D + Rectangle.178=0D + =0D + =0D + =0D + =0D + =0D + =0D + Rounded Rectangle.359=0D + RiscVOpensbiLib=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + RiscVOpensbiLib = =0D + =0D + Rectangle.200=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Rectangle.216=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Side to side 1.223=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Rectangle.305=0D + Privilege Mode Switch=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Privi= lege Mode Switch =0D + =0D + Rectangle.322=0D + Privilege in Supervisor Mode=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Privi= lege in Supervisor Mode =0D + =0D + Rectangle.339=0D + Power on / Reset=0D + =0D + =0D + =0D + =0D + =0D + =0D + Power= on / Reset =0D + =0D + Rectangle.217=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Rounded Rectangle.230=0D + Edk2OpensbiPlatformWrapperLib=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + = Edk2OpensbiPlatformWrapperLib<= /tspan> =0D + =0D + Rounded Rectangle.183=0D + OpenSbi PlatformLib=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + OpenSbiPlatformLi= b =0D + =0D + Rectangle.176=0D + BDS=0D + =0D + =0D + =0D + =0D + =0D + =0D + BDS =0D + =0D + Rounded Rectangle.180=0D + Generic Platform Functions=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Generic Platform Functions = =0D + =0D + Rounded Rectangle.182=0D + RiscVSpecial PlatformLib=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + = RiscVSpecialPlatformLi= b =0D + =0D + Rounded Rectangle.184=0D + HART index to ID array=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + HART index to ID array =0D + =0D + Rounded Rectangle.185=0D + Boot HART ID=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Boot HART ID =0D + =0D + Rounded Rectangle.181=0D + Special Platform Override=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Special Platform Override = =0D + =0D + Sheet.192=0D + =0D + =0D + =0D + Sheet.193=0D + =0D + =0D + =0D + Sheet.197=0D + =0D + =0D + =0D + Sheet.199=0D + =0D + =0D + =0D + Sheet.201=0D + PEI Core=0D + =0D + =0D + =0D + PEI Core =0D + =0D + Rounded Rectangle.203=0D + PlatformSecPpiLib=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + = PlatformSecPpiLib =0D + =0D + Rounded Rectangle.204=0D + RiscVFirmwareConextLib=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + = RiscVFirmwareConextLib<= /tspan> =0D + =0D + Bottom to top 1=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Rounded Rectangle=0D + OpenSBI Library (SBI Implementation)=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + OpenSBI Library (SBI Impleme= ntation) =0D + =0D + Sheet.212=0D + =0D + =0D + =0D + Sheet.213=0D + =0D + =0D + =0D + Sheet.218=0D + =0D + =0D + =0D + Sheet.219=0D + =0D + =0D + =0D + Sheet.222=0D + =0D + =0D + =0D + Sheet.225=0D + =0D + =0D + =0D + Rounded Rectangle.227=0D + DXE SBI Procotol=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + DXE SBI Procotol =0D + =0D + Sheet.228=0D + =0D + =0D + =0D + Sheet.209=0D + =0D + =0D + =0D + Rounded Rectangle.224=0D + PEI SBI PPI=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + PEI SBI PPI =0D + =0D + Rounded Rectangle.198=0D + SBI Implementation=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + SBI Implementatio= n =0D + =0D + Rounded Rectangle.226=0D + SBI Implementation=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + SBI Implementatio= n =0D + =0D + Sheet.215=0D + =0D + =0D + =0D + Sheet.231=0D + =0D + =0D + =0D + Sheet.237=0D + =0D + =0D + =0D + Bottom to top 1.239=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Link=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Link.242=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Bottom to top 1.244=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Sheet.245=0D + =0D + =0D + =0D + Rounded Rectangle.249=0D + OEM can override this library instance to hook before/af= ter e...=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + OEM can override this library= instance to= hook before/after each OpenSbi platform operation API for platform <= tspan=0D + x=3D"26.07" dy=3D"1.2em" class=3D"st16">specific p= urposes =0D + =0D + Directed line 1=0D + =0D + =0D + =0D + =0D + =0D + =0D + Link.256=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Bottom to top 1.257=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Bottom to top 1.258=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Link.260=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Bottom to top 1.261=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Bottom to top 1.262=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Sheet.271=0D + =0D + =0D + =0D + =0D + =0D + =0D + Rounded Rectangle.274=0D + DXE SBI Procotol=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + DXE SBI Procotol =0D + =0D + Sheet.275=0D + =0D + =0D + =0D + Rounded Rectangle.276=0D + SBI Implementation=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + SBI Implementatio= n =0D + =0D + Sheet.279=0D + PcdBootbaleHartNumber PcdBootbaleHartIndexToId=0D + =0D + =0D + =0D + PcdBootbaleH= artNumberPcdBootbaleH= artIndexToId =0D + =0D + Configure.282=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Curve connect 3.285=0D + =0D + =0D + =0D + =0D + =0D + =0D + Sheet.286=0D + PcdBootHartId=0D + =0D + =0D + =0D + PcdBootHartI= d =0D + =0D + Configure.288=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Curve connect 3.289=0D + =0D + =0D + =0D + =0D + =0D + =0D + Link.294=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Bottom to top 1.297=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Rounded Rectangle.202=0D + PeiCoreEntryPointLib=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + = PeiCoreEntryPointLib =0D + =0D + Link.300=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Sheet.214=0D + =0D + =0D + =0D + Side to side 1=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Rectangle.304=0D + Privilege Mode Switch=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Privi= lege Mode Switch =0D + =0D + Rectangle.174=0D + PEI=0D + =0D + =0D + =0D + =0D + =0D + =0D + PEI =0D + =0D + Rectangle.175=0D + DXE=0D + =0D + =0D + =0D + =0D + =0D + =0D + DXE =0D + =0D + Sheet.306=0D + PcdPeiCorePrivilegeMode=0D + =0D + =0D + =0D + PcdPeiCorePrivilegeMode = =0D + =0D + Configure.307=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Sheet.309=0D + PcdPDxeCorePrivilegeMode=0D + =0D + =0D + =0D + PcdPDxeCorePrivilegeMode = =0D + =0D + Configure.310=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Curve connect 3.312=0D + =0D + =0D + =0D + =0D + =0D + = =0D + Curve connect 3.313=0D + =0D + =0D + =0D + =0D + =0D + =0D + Rounded Rectangle.315=0D + PEI Driver=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + = PEI Driver =0D + =0D + Rounded Rectangle.314=0D + PEI Driver=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + = PEI Driver =0D + =0D + Bottom to top 1.318=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Rounded Rectangle.319=0D + PEI Driver=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + = PEI Driver =0D + =0D + Rounded Rectangle.320=0D + DXE Driver=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + = DXE Driver =0D + =0D + Bottom to top 1.321=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Sheet.325=0D + =0D + =0D + =0D + =0D + =0D + =0D + Rectangle.323=0D + RT=0D + =0D + =0D + =0D + =0D + =0D + =0D + RT =0D + =0D + Sheet.220=0D + DXE Core=0D + =0D + =0D + =0D + DXE Core =0D + =0D + Sheet.270=0D + BDS DXE=0D + =0D + =0D + =0D + BDS DXE =0D + =0D + Rounded Rectangle.221=0D + DXEIPL PEI Driver=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + DXEIPL PEI Driver =0D + =0D + Rounded Rectangle.208=0D + OpenSBI Next Address=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + OpenSBI Next = Address =0D + =0D + Data process=0D + Set Next Address and Mode=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Set Next Address and Mode = =0D + =0D + Directed line 1.334=0D + =0D + =0D + =0D + =0D + =0D + = =0D + Curve connect 2=0D + =0D + =0D + =0D + =0D + =0D + =0D + Rounded Rectangle.336=0D + sbi_init ()=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + sbi_init ()<= /text> =0D + =0D + Side to side 1.337=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Sheet.338=0D + =0D + =0D + =0D + Sheet.179=0D + SecMain=0D + =0D + =0D + =0D + SecMain =0D + =0D + Sheet.340=0D + =0D + =0D + =0D + =0D + =0D + =0D + Rectangle.324=0D + Runtime OS=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Runtime= OS =0D + =0D + Rounded Rectangle.342=0D + SBI Implementation=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + SBI Implementatio= n =0D + =0D + Data process.343=0D + 2=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + 2 =0D + =0D + Data process.344=0D + 3=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + 3 =0D + =0D + Data process.345=0D + 4=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + 4 =0D + =0D + Data process.347=0D + 5=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + 5 =0D + =0D + Data process.348=0D + 6=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + 6 =0D + =0D + Data process.349=0D + 7=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + 7 =0D + =0D + Data process.350=0D + 8=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + 8 =0D + =0D + Data process.351=0D + 9=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + 9 =0D + =0D + Data process.352=0D + 11=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + 11 =0D + =0D + Data process.353=0D + 6=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + 6 =0D + =0D + Data process.354=0D + 12=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + 12 =0D + =0D + Sheet.357=0D + =0D + =0D + =0D + Rectangle=0D + SEC=0D + =0D + =0D + =0D + =0D + =0D + =0D + SEC =0D + =0D + Data process.360=0D + 1=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + 1 =0D + =0D + Sheet.361=0D + =0D + =0D + =0D + Sheet.362=0D + =0D + =0D + =0D + Link.363=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Bottom to top 1.364=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Rounded Rectangle.365=0D + PeiServiceTablePointerOpensbi=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + = PeiServiceTablePointerOpen= sbi =0D + =0D + Data process.367=0D + 10=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + 10 =0D + =0D + Sheet.368=0D + =0D + =0D + =0D +=0D diff --git a/Platform/RISC-V/PlatformPkg/Documents/Media/RiscVEdk2FwDomain.= svg b/Platform/RISC-V/PlatformPkg/Documents/Media/RiscVEdk2FwDomain.svg new file mode 100644 index 0000000000..e2f00e1357 --- /dev/null +++ b/Platform/RISC-V/PlatformPkg/Documents/Media/RiscVEdk2FwDomain.svg @@ -0,0 +1,1290 @@ +=0D +=0D +=0D +=0D + =0D + =0D + =0D + =0D + =0D +=0D + =0D +=0D + =0D + =0D + =0D + =0D + =0D + =0D + Page-2=0D + =0D + =0D + =0D + =0D + Box=0D + =0D + =0D + =0D + =0D + =0D + =0D + Sheet.417=0D + =0D + Rounded Rectangle.385=0D + DXE Driver=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + DXE Driver = =0D + =0D + Rounded Rectangle.386=0D + PEI Driver=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + PEI Driver = =0D + =0D + Rounded Rectangle.387=0D + PEI Drivers=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + PEI Drivers = =0D + =0D + Sheet.421=0D + PEI Core=0D + =0D + =0D + =0D + PEI Core =0D + =0D + Sheet.422=0D + DXE Core=0D + =0D + =0D + =0D + DXE Core =0D + = =0D + Rectangle.390=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Rounded Rectangle.391=0D + PEI Drivers=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + PEI Drivers = =0D + =0D + Rounded Rectangle.392=0D + PEI Driver=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + PEI Driver = =0D + =0D + Rectangle.393=0D + PEI/DXE Firmware Volume=0D + =0D + =0D + =0D + =0D + =0D + =0D + PEI/DXE Firmware Volume<= /text> =0D + =0D + Rounded Rectangle.394=0D + PEI Driver=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + PEI Driver = =0D + =0D + Rounded Rectangle.395=0D + DXE Driver=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + DXE Driver = =0D + =0D + Rounded Rectangle.396=0D + PEI Driver=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + PEI Driver = =0D + =0D + Rounded Rectangle.397=0D + PEI Drivers=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + PEI Drivers = =0D + =0D + Sheet.431=0D + PEI Core=0D + =0D + =0D + =0D + PEI Core =0D + =0D + Sheet.432=0D + DXE Core=0D + =0D + =0D + =0D + DXE Core =0D + =0D + =0D + Sheet.401=0D + =0D + Rounded Rectangle.385=0D + DXE Driver=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + DXE Driver = =0D + =0D + Rounded Rectangle.386=0D + PEI Driver=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + PEI Driver = =0D + =0D + Rounded Rectangle.387=0D + PEI Drivers=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + PEI Drivers = =0D + =0D + Sheet.405=0D + PEI Core=0D + =0D + =0D + =0D + PEI Core =0D + =0D + Sheet.406=0D + DXE Core=0D + =0D + =0D + =0D + DXE Core =0D + = =0D + Rectangle.390=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Rounded Rectangle.391=0D + PEI Drivers=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + PEI Drivers = =0D + =0D + Rounded Rectangle.392=0D + PEI Driver=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + PEI Driver = =0D + =0D + Rectangle.393=0D + PEI/DXE Firmware Volume=0D + =0D + =0D + =0D + =0D + =0D + =0D + PEI/DXE Firmware Volume<= /text> =0D + =0D + Rounded Rectangle.394=0D + PEI Driver=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + PEI Driver = =0D + =0D + Rounded Rectangle.395=0D + DXE Driver=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + DXE Driver = =0D + =0D + Rounded Rectangle.396=0D + PEI Driver=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + PEI Driver = =0D + =0D + Rounded Rectangle.397=0D + PEI Drivers=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + PEI Drivers = =0D + =0D + Sheet.415=0D + PEI Core=0D + =0D + =0D + =0D + PEI Core =0D + =0D + Sheet.416=0D + DXE Core=0D + =0D + =0D + =0D + DXE Core =0D + =0D + =0D + Rectangle.178=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Rounded Rectangle.365=0D + PEI Driver=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + PEI Driver =0D + =0D + Rounded Rectangle.359=0D + RiscVOpensbiLib=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + RiscVOpensbiLib = =0D + =0D + Rounded Rectangle=0D + OpenSBI Library (SBI Implementation)=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + OpenSBI Library (SBI Impleme= ntation) =0D + =0D + Sheet.213=0D + =0D + =0D + =0D + Sheet.264=0D + PcdFirmwareDomainSize PcdFirmwareDomainBaseAddress=0D + =0D + =0D + =0D + PcdFirmwareD= omainSizePcdFirmwareD= omainBaseAddress =0D + =0D + Sheet.160=0D + PcdRootFirmwareDomainBaseAddress PcdRootFirmwareDomainSi= ze=0D + =0D + =0D + =0D + PcdRootFirmwa= reDomainBaseAddressPcdRootFirmw= areDomainSize =0D + =0D + Configure.283=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Configure.284=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Sheet.290=0D + PcdVariableFirmwareRegionBaseAddress PcdVariableFirmware= Regio...=0D + =0D + =0D + =0D + PcdVariableFi= rmwareRegionBaseAddressPcdVariableF= irmwareRegionSize =0D + =0D + Configure.291=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Rounded Rectangle.315=0D + PEI Driver=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + PEI Driver =0D + =0D + Rounded Rectangle.314=0D + SEC Libraries=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + SEC Libraries =0D + =0D + Sheet.179=0D + SecMain=0D + =0D + =0D + =0D + = SecMain= =0D + =0D + Rectangle=0D + SEC Firmware Volumn=0D + =0D + =0D + =0D + =0D + =0D + =0D + SEC Firmware Volumn = =0D + =0D + Sheet.400=0D + =0D + Rounded Rectangle.385=0D + DXE Driver=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + DXE Driver = =0D + =0D + Rounded Rectangle.386=0D + PEI Driver=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + PEI Driver = =0D + =0D + Rounded Rectangle.387=0D + PEI Drivers=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + PEI Drivers = =0D + =0D + Sheet.388=0D + PEI Core=0D + =0D + =0D + =0D + PEI Core =0D + =0D + Sheet.389=0D + DXE Core=0D + =0D + =0D + =0D + DXE Core =0D + = =0D + Rectangle.390=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Rounded Rectangle.391=0D + PEI Drivers=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + PEI Drivers = =0D + =0D + Rounded Rectangle.392=0D + PEI Driver=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + PEI Driver = =0D + =0D + Rectangle.393=0D + PEI/DXE Firmware Volume=0D + =0D + =0D + =0D + =0D + =0D + =0D + PEI/DXE Firmware Volume<= /text> =0D + =0D + Rounded Rectangle.394=0D + PEI Driver=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + PEI Driver = =0D + =0D + Rounded Rectangle.395=0D + DXE Driver=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + DXE Driver = =0D + =0D + Rounded Rectangle.396=0D + PEI Driver=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + PEI Driver = =0D + =0D + Rounded Rectangle.397=0D + PEI Drivers=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + PEI Drivers = =0D + =0D + Sheet.398=0D + PEI Core=0D + =0D + =0D + =0D + PEI Core =0D + =0D + Sheet.399=0D + DXE Core=0D + =0D + =0D + =0D + DXE Core =0D + =0D + =0D + Rectangle.433=0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + =0D + Rectangle.441=0D + EFI Variable=0D + =0D + =0D + =0D + =0D + =0D + =0D + EFI Variable =0D + =0D + Sheet.442=0D + =0D + =0D + =0D + Sheet.443=0D + =0D + =0D + =0D + Sheet.444=0D + =0D + =0D + =0D +=0D --=20 2.31.1