From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0a-002e3701.pphosted.com (mx0a-002e3701.pphosted.com [148.163.147.86]) by mx.groups.io with SMTP id smtpd.web12.7280.1634634525737042338 for ; Tue, 19 Oct 2021 02:08:49 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@hpe.com header.s=pps0720 header.b=E96J3KvD; spf=temperror, err=temporary DNS error (domain: hpe.com, ip: 148.163.147.86, mailfrom: prvs=0926d272d9=abner.chang@hpe.com) Received: from pps.filterd (m0150241.ppops.net [127.0.0.1]) by mx0a-002e3701.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 19J91tM6017711; Tue, 19 Oct 2021 09:08:45 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=hpe.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=pps0720; bh=QB+MbyrPCLj8ZvSeSKlj8FVR3ZVrqXN1lenwI7TtNEY=; b=E96J3KvDsaisrCS+AthFffnQ+ACwlKryMrOo+QQYPuDdcIlwTV6yhbKFghtcyLHMRe3S tPFu2yzQuVYbBuEHrHqa2YW7RM97r1hQLO0iK3BV0Ep1ypfmZ5IViqcZXSysWIBx8aI6 jlL1X/fqqtPWQsYo2GaRTNAPFDEHJyq+f/12KONgxBiYW959xzb6VvU7UKQm9T+wiq+x lpOIEZMXCs4jbu+r7LneTGVNYPlTvlI9FGnIjIVR/dYpS36ZoHJENhJkZtOnpNHy8IHR Stg1OFx1zFhH3Imuk07HRBGWgrg9k+3eq9rjVRtrCHWm+ww8S4mGfaVRF1bWdbePKBiT SA== Received: from g4t3426.houston.hpe.com (g4t3426.houston.hpe.com [15.241.140.75]) by mx0a-002e3701.pphosted.com with ESMTP id 3bs9b3qs05-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 Oct 2021 09:08:45 +0000 Received: from g9t2301.houston.hpecorp.net (g9t2301.houston.hpecorp.net [16.220.97.129]) by g4t3426.houston.hpe.com (Postfix) with ESMTP id 7283462; Tue, 19 Oct 2021 09:08:44 +0000 (UTC) Received: from UB16Abner.asiapacific.hpqcorp.net (ub16abner.asiapacific.hpqcorp.net [15.119.209.229]) by g9t2301.houston.hpecorp.net (Postfix) with ESMTP id 62B274A; Tue, 19 Oct 2021 09:08:43 +0000 (UTC) From: "Abner Chang" To: devel@edk2.groups.io Cc: abner.chang@hpe.com, Sunil V L , Daniel Schaefer Subject: [edk2-platforms][PATCH 23/30] RiscV/ProcessorPkg: Create read mtime CSR library instances Date: Tue, 19 Oct 2021 16:10:00 +0800 Message-Id: <20211019081007.31165-24-abner.chang@hpe.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20211019081007.31165-1-abner.chang@hpe.com> References: <20211019081007.31165-1-abner.chang@hpe.com> MIME-Version: 1.0 X-Proofpoint-GUID: CTrae0VZ-_E3GuevROCMwPLReHcC_qXA X-Proofpoint-ORIG-GUID: CTrae0VZ-_E3GuevROCMwPLReHcC_qXA X-HPE-SCL: -1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475 definitions=2021-10-18_07,2021-10-18_01,2020-04-07_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 priorityscore=1501 impostorscore=0 malwarescore=0 adultscore=0 mlxlogscore=990 mlxscore=0 bulkscore=0 spamscore=0 suspectscore=0 phishscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2109230001 definitions=main-2110190056 Content-Transfer-Encoding: quoted-printable Create library instances of reading Machine mode timer. - MacineModeTimerLib is used to read mtime CSR through platfrom library. - EmulatedMacineModeTimerLib is used to read mtime CSR through shadow CSR. Cc: Sunil V L Cc: Daniel Schaefer Signed-off-by: Abner Chang --- .../RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc | 2 + .../EmulatedMachineModeTimerLib.inf | 34 +++++++++++++++++ .../MachineModeTimerLib.inf | 38 +++++++++++++++++++ .../Include/IndustryStandard/RiscV.h | 5 +++ .../Include/Library/RiscVCpuLib.h | 3 ++ .../EmulatedMachineModeTimerLib.S | 24 ++++++++++++ .../MachineModeTimerLib/MachineModeTimerLib.S | 25 ++++++++++++ 7 files changed, 131 insertions(+) create mode 100644 Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineMod= eTimer/EmulatedMachineModeTimerLib/EmulatedMachineModeTimerLib.inf create mode 100644 Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineMod= eTimer/MachineModeTimerLib/MachineModeTimerLib.inf create mode 100644 Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineMod= eTimer/EmulatedMachineModeTimerLib/EmulatedMachineModeTimerLib.S create mode 100644 Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineMod= eTimer/MachineModeTimerLib/MachineModeTimerLib.S diff --git a/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc b/Silicon/RI= SC-V/ProcessorPkg/RiscVProcessorPkg.dsc index 531319322c..3b5738957d 100644 --- a/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc +++ b/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc @@ -44,6 +44,8 @@ RiscVEdk2SbiLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/Risc= VEdk2SbiLib.inf=0D RiscVOpensbiLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/Risc= VOpensbiLib.inf=0D TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTime= rLib.inf=0D + MachineModeTimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachine= ModeTimer/MachineModeTimerLib/MachineModeTimerLib.inf=0D + #MachineModeTimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachin= eModeTimer/EmulatedMachineModeTimerLib/EmulatedMachineModeTimerLib.inf=0D BaseLib|MdePkg/Library/BaseLib/BaseLib.inf=0D BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf=0D DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.i= nf=0D diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineModeTimer/= EmulatedMachineModeTimerLib/EmulatedMachineModeTimerLib.inf b/Silicon/RISC-= V/ProcessorPkg/Library/RiscVReadMachineModeTimer/EmulatedMachineModeTimerLi= b/EmulatedMachineModeTimerLib.inf new file mode 100644 index 0000000000..369028a9a6 --- /dev/null +++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineModeTimer/Emulate= dMachineModeTimerLib/EmulatedMachineModeTimerLib.inf @@ -0,0 +1,34 @@ +## @file=0D +# Library to read Machine Mode Timer.=0D +#=0D +# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All right= s reserved.
=0D +#=0D +# SPDX-License-Identifier: BSD-2-Clause-Patent=0D +#=0D +##=0D +=0D +[Defines]=0D + INF_VERSION =3D 0x0001001b=0D + BASE_NAME =3D EmulatedMachineModeTimerLib=0D + FILE_GUID =3D 81B82615-D85C-4377-8BFF-7442322E2835= =0D + MODULE_TYPE =3D BASE=0D + VERSION_STRING =3D 1.0=0D + LIBRARY_CLASS =3D MachineModeTimerLib=0D +=0D +#=0D +# The following information is for reference only and not required by the = build tools.=0D +#=0D +# VALID_ARCHITECTURES =3D RISCV64=0D +#=0D +=0D +[Sources]=0D +=0D +[Sources.RISCV64]=0D + EmulatedMachineModeTimerLib.S=0D +=0D +[Packages]=0D + MdePkg/MdePkg.dec=0D + Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec=0D +=0D +=0D +=0D diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineModeTimer/= MachineModeTimerLib/MachineModeTimerLib.inf b/Silicon/RISC-V/ProcessorPkg/L= ibrary/RiscVReadMachineModeTimer/MachineModeTimerLib/MachineModeTimerLib.inf new file mode 100644 index 0000000000..71d4315445 --- /dev/null +++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineModeTimer/Machine= ModeTimerLib/MachineModeTimerLib.inf @@ -0,0 +1,38 @@ +## @file=0D +# Library to read Machine Mode Timer.=0D +#=0D +# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All right= s reserved.
=0D +#=0D +# SPDX-License-Identifier: BSD-2-Clause-Patent=0D +#=0D +##=0D +=0D +[Defines]=0D + INF_VERSION =3D 0x0001001b=0D + BASE_NAME =3D MachineModeTimerLib=0D + FILE_GUID =3D 6390D8AA-E0E6-4625-A515-9BB2DC7BBCAB= =0D + MODULE_TYPE =3D BASE=0D + VERSION_STRING =3D 1.0=0D + LIBRARY_CLASS =3D MachineModeTimerLib=0D +=0D +#=0D +# The following information is for reference only and not required by the = build tools.=0D +#=0D +# VALID_ARCHITECTURES =3D RISCV64=0D +#=0D +=0D +[Sources]=0D +=0D +[Sources.RISCV64]=0D + MachineModeTimerLib.S=0D +=0D +[Packages]=0D + MdePkg/MdePkg.dec=0D + Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec=0D +=0D +[LibraryClasses]=0D + RiscVCpuLib=0D + RiscVPlatformTimerLib=0D +=0D +=0D +=0D diff --git a/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscV.h b= /Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscV.h index f6726bda24..c9715a2ee2 100644 --- a/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscV.h +++ b/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscV.h @@ -154,4 +154,9 @@ #define RISCV_CSR_MTOHOST 0x780=0D #define RISCV_CSR_MFROMHOST 0x781=0D =0D +//=0D +// User mode CSR=0D +//=0D +#define RISCV_CSR_CYCLE 0xc00=0D +#define RISCV_CSR_TIME 0xc01=0D #endif=0D diff --git a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h b/Si= licon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h index f70723567e..8d51152fa9 100644 --- a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h +++ b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h @@ -32,6 +32,9 @@ RiscVGetMachineTrapCause (VOID); UINT64=0D RiscVReadMachineTimer (VOID);=0D =0D +UINT64=0D +RiscVReadMachineTimerInterface (VOID);=0D +=0D VOID=0D RiscVSetMachineTimerCmp (UINT64);=0D =0D diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineModeTimer/= EmulatedMachineModeTimerLib/EmulatedMachineModeTimerLib.S b/Silicon/RISC-V/= ProcessorPkg/Library/RiscVReadMachineModeTimer/EmulatedMachineModeTimerLib/= EmulatedMachineModeTimerLib.S new file mode 100644 index 0000000000..1acd0ab062 --- /dev/null +++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineModeTimer/Emulate= dMachineModeTimerLib/EmulatedMachineModeTimerLib.S @@ -0,0 +1,24 @@ +//------------------------------------------------------------------------= ------=0D +//=0D +// Read Machine mode timer using shadow CSR.=0D +//=0D +// Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
=0D +//=0D +// SPDX-License-Identifier: BSD-2-Clause-Patent=0D +//=0D +//------------------------------------------------------------------------= ------=0D +#include =0D +=0D +.data=0D +=0D +.text=0D +.align 3=0D +=0D +.global ASM_PFX(RiscVReadMachineTimerInterface)=0D +//=0D +// Read machine mode timer CSR through shadow CSR.=0D +// @retval a0 : 64-bit machine timer.=0D +//=0D +ASM_PFX (RiscVReadMachineTimerInterface):=0D + csrr a0, RISCV_CSR_TIME=0D + ret=0D diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineModeTimer/= MachineModeTimerLib/MachineModeTimerLib.S b/Silicon/RISC-V/ProcessorPkg/Lib= rary/RiscVReadMachineModeTimer/MachineModeTimerLib/MachineModeTimerLib.S new file mode 100644 index 0000000000..16f8bdd70a --- /dev/null +++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineModeTimer/Machine= ModeTimerLib/MachineModeTimerLib.S @@ -0,0 +1,25 @@ +//------------------------------------------------------------------------= ------=0D +//=0D +// Read mtimer through platform library.=0D +//=0D +// Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
=0D +//=0D +// SPDX-License-Identifier: BSD-2-Clause-Patent=0D +//=0D +//------------------------------------------------------------------------= ------=0D +#include =0D +=0D +.data=0D +=0D +.text=0D +.align 3=0D +=0D +.global ASM_PFX(RiscVReadMachineTimerInterface)=0D +//=0D +// Read machine mode timer CSR.=0D +// @retval a0 : 64-bit machine timer.=0D +//=0D +ASM_PFX (RiscVReadMachineTimerInterface):=0D + call RiscVReadMachineTimer=0D + ret=0D +=0D --=20 2.31.1