From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0a-002e3701.pphosted.com (mx0a-002e3701.pphosted.com [148.163.147.86]) by mx.groups.io with SMTP id smtpd.web10.7406.1634634526929114080 for ; Tue, 19 Oct 2021 02:08:57 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@hpe.com header.s=pps0720 header.b=dKqKS9sQ; spf=temperror, err=temporary DNS error (domain: hpe.com, ip: 148.163.147.86, mailfrom: prvs=0926d272d9=abner.chang@hpe.com) Received: from pps.filterd (m0148663.ppops.net [127.0.0.1]) by mx0a-002e3701.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 19J8Vt0E028635; Tue, 19 Oct 2021 09:08:46 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=hpe.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=pps0720; bh=NXfy9fuh7TijRlMtr+bun6FRCcH1XGX2V7m6EB9UCeA=; b=dKqKS9sQz1LJ4e0cyLRjXiVLonHzHAuHRrNL7TNSQQAWtAYZjulgJ6uCaLRkK9r4O+l2 TX67OeRHyKKIkkDz2d1lfO6qy9zhw4KHQmA9+YGn7nY9Ckta0z3Q09fmY8l2HEEksHaF yqvsh4V44C1+3/hVDW9kR2aXGPj7TcEvkwI2DUpubMgi64KX8r0xyVT4LWMVbqW1O0LB C9+rNZoICHyxzFGt/IJKq2HtcHf4t3WJNVRRSacauBVoa2HFbdLYfGKO4Y9n1bDDt7eZ tPUGCBMJ0QtTkXPHNd/WIRP9Sxe1fHgVU2eXY0QoqfUe0/qBY037aIgn1B0cFvHXZihq hw== Received: from g4t3427.houston.hpe.com (g4t3427.houston.hpe.com [15.241.140.73]) by mx0a-002e3701.pphosted.com with ESMTP id 3bst6drgsb-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 19 Oct 2021 09:08:46 +0000 Received: from g9t2301.houston.hpecorp.net (g9t2301.houston.hpecorp.net [16.220.97.129]) by g4t3427.houston.hpe.com (Postfix) with ESMTP id D58636A; Tue, 19 Oct 2021 09:08:45 +0000 (UTC) Received: from UB16Abner.asiapacific.hpqcorp.net (ub16abner.asiapacific.hpqcorp.net [15.119.209.229]) by g9t2301.houston.hpecorp.net (Postfix) with ESMTP id C4ED253; Tue, 19 Oct 2021 09:08:44 +0000 (UTC) From: "Abner Chang" To: devel@edk2.groups.io Cc: abner.chang@hpe.com, Sunil V L , Daniel Schaefer Subject: [edk2-platforms][PATCH 24/30] RiscV/ProcessorPkg: Use mtime CSR library Date: Tue, 19 Oct 2021 16:10:01 +0800 Message-Id: <20211019081007.31165-25-abner.chang@hpe.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20211019081007.31165-1-abner.chang@hpe.com> References: <20211019081007.31165-1-abner.chang@hpe.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: SwWtQJdXZq0M_Oz5tpsgi2TmV5k5fNur X-Proofpoint-GUID: SwWtQJdXZq0M_Oz5tpsgi2TmV5k5fNur X-HPE-SCL: -1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475 definitions=2021-10-18_07,2021-10-18_01,2020-04-07_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 mlxlogscore=955 priorityscore=1501 adultscore=0 suspectscore=0 malwarescore=0 lowpriorityscore=0 spamscore=0 impostorscore=0 phishscore=0 clxscore=1015 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2109230001 definitions=main-2110190056 Content-Transfer-Encoding: quoted-printable Use mtime CSR library interface to access mtime CSR. Cc: Sunil V L Cc: Daniel Schaefer Signed-off-by: Abner Chang --- .../Library/RiscVTimerLib/BaseRiscVTimerLib.inf | 3 ++- Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf | 1 + .../ProcessorPkg/Library/RiscVTimerLib/RiscVTimerLib.c | 6 +++--- Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.c | 2 +- 4 files changed, 7 insertions(+), 5 deletions(-) diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTim= erLib.inf b/Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTime= rLib.inf index c914d3b4b6..3c61149da8 100644 --- a/Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.i= nf +++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.i= nf @@ -30,5 +30,6 @@ BaseLib=0D PcdLib=0D RiscVCpuLib=0D - RiscVPlatformTimerLib=0D + MachineModeTimerLib=0D +=0D =0D diff --git a/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf b/Sili= con/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf index 29cc4413bd..a422c12e32 100644 --- a/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf +++ b/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf @@ -26,6 +26,7 @@ CpuLib=0D CpuExceptionHandlerLib=0D DebugLib=0D + MachineModeTimerLib=0D RiscVCpuLib=0D TimerLib=0D UefiBootServicesTableLib=0D diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/RiscVTimerLi= b.c b/Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/RiscVTimerLib.c index 97fe2aef4b..54ca99787e 100644 --- a/Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/RiscVTimerLib.c +++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/RiscVTimerLib.c @@ -36,9 +36,9 @@ InternalRiscVTimerDelay ( //=0D // The target timer count is calculated here=0D //=0D - Ticks =3D RiscVReadMachineTimer () + Delay;=0D + Ticks =3D RiscVReadMachineTimerInterface () + Delay;=0D Delay =3D 1 << (RISCV_TIMER_COMPARE_BITS - 2);=0D - while (((Ticks - RiscVReadMachineTimer ()) & ( 1 << (RISCV_TIMER_COMPA= RE_BITS - 1))) =3D=3D 0) {=0D + while (((Ticks - RiscVReadMachineTimerInterface ()) & ( 1 << (RISCV_TI= MER_COMPARE_BITS - 1))) =3D=3D 0) {=0D CpuPause ();=0D }=0D } while (Times-- > 0);=0D @@ -118,7 +118,7 @@ GetPerformanceCounter ( VOID=0D )=0D {=0D - return (UINT64)RiscVReadMachineTimer ();=0D + return (UINT64)RiscVReadMachineTimerInterface ();=0D }=0D =0D /**return=0D diff --git a/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.c b/Silico= n/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.c index b8b8e91a6c..3104c6d2de 100644 --- a/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.c +++ b/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.c @@ -223,7 +223,7 @@ CpuGetTimerValue ( return EFI_INVALID_PARAMETER;=0D }=0D =0D - *TimerValue =3D (UINT64)RiscVReadMachineTimer ();=0D + *TimerValue =3D (UINT64)RiscVReadMachineTimerInterface ();=0D if (TimerPeriod !=3D NULL) {=0D *TimerPeriod =3D DivU64x32 (=0D 1000000000000000u,=0D --=20 2.31.1