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From: "Abner Chang" <abner.chang@hpe.com>
To: devel@edk2.groups.io
Cc: abner.chang@hpe.com, Sunil V L <sunilvl@ventanamicro.com>,
	Daniel Schaefer <daniel.schaefer@hpe.com>
Subject: [edk2-platforms][PATCH 26/30] SiFive/SerialPortLib: Remove global variable
Date: Tue, 19 Oct 2021 16:10:03 +0800	[thread overview]
Message-ID: <20211019081007.31165-27-abner.chang@hpe.com> (raw)
In-Reply-To: <20211019081007.31165-1-abner.chang@hpe.com>

Remove global variable from SerialPortLib because this
module is not necessarily executed in memory.

Cc: Sunil V L <sunilvl@ventanamicro.com>
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>

Signed-off-by: Abner Chang <abner.chang@hpe.com>
---
 .../SiFive/U5SeriesPkg/Include/SifiveU5Uart.h |  1 +
 .../Library/SerialIoLib/SerialPortLib.c       | 58 +++++++++++++++----
 2 files changed, 49 insertions(+), 10 deletions(-)

diff --git a/Platform/SiFive/U5SeriesPkg/Include/SifiveU5Uart.h b/Platform/SiFive/U5SeriesPkg/Include/SifiveU5Uart.h
index 0ccb98e874..be8dce8c96 100644
--- a/Platform/SiFive/U5SeriesPkg/Include/SifiveU5Uart.h
+++ b/Platform/SiFive/U5SeriesPkg/Include/SifiveU5Uart.h
@@ -10,6 +10,7 @@
 #ifndef SIFIVE_U5_SERIES_UART_H_
 #define SIFIVE_U5_SERIES_UART_H_
 
+#include <include/sbi/riscv_io.h>
 #include <include/sbi_utils/serial/sifive-uart.h>
 
 #endif
diff --git a/Platform/SiFive/U5SeriesPkg/Library/SerialIoLib/SerialPortLib.c b/Platform/SiFive/U5SeriesPkg/Library/SerialIoLib/SerialPortLib.c
index 7bc73a0b82..42e5aa7b76 100644
--- a/Platform/SiFive/U5SeriesPkg/Library/SerialIoLib/SerialPortLib.c
+++ b/Platform/SiFive/U5SeriesPkg/Library/SerialIoLib/SerialPortLib.c
@@ -8,6 +8,7 @@
 **/
 
 #include <Base.h>
+#include <Library/DebugLib.h>
 #include <Library/IoLib.h>
 #include <Library/SerialPortLib.h>
 #include <Include/SifiveU5Uart.h>
@@ -41,7 +42,7 @@
 #define UART_BAUDRATE  115200
 #define SYS_CLK        FixedPcdGet32(PcdU5PlatformSystemClock)
 
-BOOLEAN Initiated = FALSE;
+BOOLEAN Initiated = TRUE;
 
 /**
   Get value from serial port register.
@@ -55,7 +56,9 @@ UINT32 GetReg (
   IN UINT32 RegIndex
   )
 {
-  return MmioRead32 (FixedPcdGet32(PcdU5UartBase) + (RegIndex * 0x4));
+  STATIC volatile UINT32 * const uart = (UINT32 *)FixedPcdGet32(PcdU5UartBase);
+
+  return readl ((volatile void *)(uart + RegIndex));
 }
 
 /**
@@ -70,7 +73,9 @@ VOID SetReg (
   IN UINT32 Value
   )
 {
-  MmioWrite32 (Value, FixedPcdGet32(PcdU5UartBase) + (RegIndex * 0x4));
+  STATIC volatile UINT32 * const uart = (UINT32 *)FixedPcdGet32(PcdU5UartBase);
+
+  writel (Value, (volatile void *)(uart + RegIndex));
 }
 
 /**
@@ -104,7 +109,36 @@ UINT32 SifiveUartGetChar (VOID)
   }
   return -1;
 }
+/**
+  Find minimum divisor divides in_freq to max_target_hz;
+  Based on uart driver n SiFive FSBL.
+
+  f_baud = f_in / (div + 1) => div = (f_in / f_baud) - 1
+  The nearest integer solution requires rounding up as to not exceed max_target_hz.
+  div  = ceil(f_in / f_baud) - 1
+   = floor((f_in - 1 + f_baud) / f_baud) - 1
+  This should not overflow as long as (f_in - 1 + f_baud) does not exceed
+  2^32 - 1, which is unlikely since we represent frequencies in kHz.
+
+  @param Freq         The given clock to UART.
+  @param MaxTargetHZ  Target baudrate.
 
+**/
+UINT32
+UartMinClkDivisor (
+  IN UINT64 Freq,
+  IN UINT64 MaxTargetHZ
+  )
+{
+    UINT64 Quotient;
+
+    Quotient = (Freq + MaxTargetHZ - 1) / (MaxTargetHZ);
+    if (Quotient == 0) {
+        return 0;
+    } else {
+        return Quotient - 1;
+    }
+}
 /**
   Initialize the serial device hardware.
 
@@ -116,20 +150,24 @@ UINT32 SifiveUartGetChar (VOID)
   @retval RETURN_DEVICE_ERROR   The serail device could not be initialized.
 
 **/
-RETURN_STATUS
+EFI_STATUS
 EFIAPI
 SerialPortInitialize (
   VOID
   )
 {
-  if (Initiated) {
-    return RETURN_SUCCESS;
+  UINT32 Divisor;
+  UINT32 CurrentDivisor;
+
+  Divisor = UartMinClkDivisor (SYS_CLK / 2, UART_BAUDRATE);
+  if (Divisor == 0) {
+    return EFI_INVALID_PARAMETER;
   }
-  if (sifive_uart_init (FixedPcdGet32(PcdU5UartBase), SYS_CLK / 2, UART_BAUDRATE) != 0) {
-      return EFI_DEVICE_ERROR;
+  CurrentDivisor = GetReg(UART_REG_DIV);
+  if (Divisor != CurrentDivisor) {
+    sifive_uart_init (FixedPcdGet32(PcdU5UartBase), SYS_CLK / 2, UART_BAUDRATE);
   }
-  Initiated = TRUE;
-  return RETURN_SUCCESS;
+  return EFI_SUCCESS;
 }
 
 /**
-- 
2.31.1


  parent reply	other threads:[~2021-10-19  9:08 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-19  8:09 [edk2-platforms][PATCH 00/30] EDK2 RISC-V port with opensbi v0.9 Abner Chang
2021-10-19  8:09 ` [edk2-platforms][PATCH 01/30] RISC-V/PlatformPkg: Update document Abner Chang
2021-10-19  8:09 ` [edk2-platforms][PATCH 02/30] RISC-V: Add RISC-V PeiCoreEntryPoint library Abner Chang
2021-10-19  8:09 ` [edk2-platforms][PATCH 03/30] RISC-V: Create opensbi firmware domains Abner Chang
2021-10-19  8:09 ` [edk2-platforms][PATCH 04/30] RISC-V: Use RISC-V PeiCoreEntryPoint library Abner Chang
2021-10-19  8:09 ` [edk2-platforms][PATCH 05/30] Platform/RISC-V: Add library to get PPI descriptor Abner Chang
2021-10-19  8:09 ` [edk2-platforms][PATCH 06/30] Platform/U540: Provide PlatormSecPpiLib Abner Chang
2021-10-19  8:09 ` [edk2-platforms][PATCH 07/30] Platform/RISC-V: Use PlatformSecPpiLib Abner Chang
2021-10-19  8:09 ` [edk2-platforms][PATCH 08/30] Platform/SiFive: CoreInfoHob uses RiscVFirmwareContextLib Abner Chang
2021-10-19  8:09 ` [edk2-platforms][PATCH 09/30] SiFive/U5SeriesPkg: Add CLINT to Device Tree Abner Chang
2021-10-19  8:09 ` [edk2-platforms][PATCH 10/30] Platform/RISC-V: Add NULL library instance of RiscVSpecialPlatformLib Abner Chang
2021-10-19  8:09 ` [edk2-platforms][PATCH 11/30] SiFive/U540: RiscVSpecialPlatformLib instance of U540 Abner Chang
2021-10-19  8:09 ` [edk2-platforms][PATCH 12/30] Platform/RISC-V: Remove platform dependency from this library Abner Chang
2021-10-19  8:09 ` [edk2-platforms][PATCH 13/30] Platform/RISC-V: Remove Null instance of OpensbilatformLibNull Abner Chang
2021-10-19  8:09 ` [edk2-platforms][PATCH 14/30] RiscVPlatformPkg/Sec: Initial hart_index2Id array Abner Chang
2021-10-19  8:09 ` [edk2-platforms][PATCH 15/30] RiscVPlatformPkg/OpensbiPlatformLib: Remove platform code Abner Chang
2021-10-19  8:09 ` [edk2-platforms][PATCH 16/30] RiscVPlatformPkg/U540: Only use four harts on U540 Abner Chang
2021-10-19  8:09 ` [edk2-platforms][PATCH 17/30] U5SeriesPkg/PeiCoreInfoHob: Remove hart count check Abner Chang
2021-10-19  8:09 ` [edk2-platforms][PATCH 18/30] RiscVPlatformPkg/RiscVSpecialPlatformLib: Rename module name Abner Chang
2021-10-19  8:09 ` [edk2-platforms][PATCH 19/30] RiscVPlatformPkg/U540: Add SortLib Abner Chang
2021-10-19  8:09 ` [edk2-platforms][PATCH 20/30] ProcessorPkg/opensbi: Update opensbi library Abner Chang
2021-10-19  8:09 ` [edk2-platforms][PATCH 21/30] RiscVPlatformPkg/Sec: Check Cold/Warm hart Abner Chang
2021-10-19  8:09 ` [edk2-platforms][PATCH 22/30] RiscVPlatformPkg/Sec: Add more comments to Secmain.c Abner Chang
2021-10-19  8:10 ` [edk2-platforms][PATCH 23/30] RiscV/ProcessorPkg: Create read mtime CSR library instances Abner Chang
2021-10-19  8:10 ` [edk2-platforms][PATCH 24/30] RiscV/ProcessorPkg: Use mtime CSR library Abner Chang
2021-10-19  8:10 ` [edk2-platforms][PATCH 25/30] Silicon/SiFive: " Abner Chang
2021-10-19  8:10 ` Abner Chang [this message]
2021-10-19  8:10 ` [edk2-platforms][PATCH 27/30] RISC-V/PlatformPkg: Updates for the latest OpenSBI Abner Chang
2021-10-19  8:10 ` [edk2-platforms][PATCH 28/30] RiscVPlatformPkg/Sec: Separate EDK2 Opensbi platform hook Abner Chang
2021-10-19  8:10 ` [edk2-platforms][PATCH 29/30] RISC-V/PlatformPkg: Determine hart number from DTB Abner Chang
2021-10-19  8:10 ` [edk2-platforms][PATCH 30/30] Silicon/RISC-V: Add PciCpuIoDxe driver Abner Chang
2021-11-09  4:26 ` [edk2-platforms][PATCH 00/30] EDK2 RISC-V port with opensbi v0.9 Daniel Schaefer
2021-11-09 10:06 ` Sunil V L

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