From: "Abner Chang" <abner.chang@hpe.com>
To: devel@edk2.groups.io
Cc: abner.chang@hpe.com, Sunil V L <sunilvl@ventanamicro.com>,
Daniel Schaefer <daniel.schaefer@hpe.com>
Subject: [edk2-platforms][PATCH 28/30] RiscVPlatformPkg/Sec: Separate EDK2 Opensbi platform hook.
Date: Tue, 19 Oct 2021 16:10:05 +0800 [thread overview]
Message-ID: <20211019081007.31165-29-abner.chang@hpe.com> (raw)
In-Reply-To: <20211019081007.31165-1-abner.chang@hpe.com>
Separate EDK2 Opensbi platform operations hooks from
Secmain as an individual library which can be override
by OEM platform.
Cc: Sunil V L <sunilvl@ventanamicro.com>
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
Signed-off-by: Abner Chang <abner.chang@hpe.com>
---
.../RISC-V/PlatformPkg/RiscVPlatformPkg.dec | 1 +
.../RISC-V/PlatformPkg/RiscVPlatformPkg.dsc | 4 +-
.../FreedomU500VC707Board/U500.dsc | 1 +
.../FreedomU540HiFiveUnleashedBoard/U540.dsc | 1 +
.../Edk2OpensbiPlatformWrapperLib.inf | 44 ++
.../PlatformPkg/Universal/Sec/SecMain.inf | 10 +-
.../Library/Edk2OpensbiPlatformWrapperLib.h | 16 +
.../PlatformPkg/Universal/Sec/SecMain.h | 1 +
.../Edk2OpensbiPlatformWrapperLib.c | 530 ++++++++++++++++++
.../Universal/Sec/Edk2OpenSbiPlatform.c | 277 ---------
.../PlatformPkg/Universal/Sec/SecMain.c | 141 -----
11 files changed, 600 insertions(+), 426 deletions(-)
create mode 100644 Platform/RISC-V/PlatformPkg/Library/Edk2OpensbiPlatformWrapperLib/Edk2OpensbiPlatformWrapperLib.inf
create mode 100644 Platform/RISC-V/PlatformPkg/Include/Library/Edk2OpensbiPlatformWrapperLib.h
create mode 100644 Platform/RISC-V/PlatformPkg/Library/Edk2OpensbiPlatformWrapperLib/Edk2OpensbiPlatformWrapperLib.c
delete mode 100644 Platform/RISC-V/PlatformPkg/Universal/Sec/Edk2OpenSbiPlatform.c
diff --git a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec b/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec
index 947ae40e20..19206556ce 100644
--- a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec
+++ b/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec
@@ -20,6 +20,7 @@
[LibraryClasses]
FirmwareContextProcessorSpecificLib|Include/Library/FirmwareContextProcessorSpecificLib.h
RiscVPlatformTempMemoryInitLib|Include/Library/RiscVPlatformTempMemoryInitLib.h
+ Edk2OpensbiPlatformiLib|Include/Library/Edk2OpensbiPlatformiWrapperLib.h
[Guids]
gUefiRiscVPlatformPkgTokenSpaceGuid = {0x6A67AF99, 0x4592, 0x40F8, { 0xB6, 0xBE, 0x62, 0xBC, 0xA1, 0x0D, 0xA1, 0xEC}}
diff --git a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dsc b/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dsc
index bbb043f9ed..47a0fc4494 100644
--- a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dsc
+++ b/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dsc
@@ -43,7 +43,6 @@
RiscVOpensbiPlatformLib|Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf
RiscVCpuLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/RiscVCpuLib.inf
RiscVEdk2SbiLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.inf
- RiscVOpensbiLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/RiscVOpensbiLib.inf
BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf
@@ -72,6 +71,8 @@
[LibraryClasses.common.SEC]
ExtractGuidedSectionLib|MdePkg/Library/BaseExtractGuidedSectionLib/BaseExtractGuidedSectionLib.inf
+ RiscVOpensbiLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/RiscVOpensbiLib.inf
+ Edk2OpensbiPlatformWrapperLib|Platform/RISC-V/PlatformPkg/Library/Edk2OpensbiPlatformWrapperLib/Edk2OpensbiPlatformWrapperLib.inf
RiscVSpecialPlatformLib|Platform/RISC-V/PlatformPkg/Library/RiscVSpecialPlatformLibNull/RiscVSpecialPlatformLibNull.inf
[LibraryClasses.common.DXE_DRIVER]
@@ -87,6 +88,7 @@
Platform/RISC-V/PlatformPkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf
Platform/RISC-V/PlatformPkg/Library/PlatformSecPpiLibNull/PlatformSecPpiLibNull.inf
Platform/RISC-V/PlatformPkg/Library/RiscVSpecialPlatformLibNull/RiscVSpecialPlatformLibNull.inf
+ Platform/RISC-V/PlatformPkg/Library/Edk2OpensbiPlatformWrapperLib/Edk2OpensbiPlatformWrapperLib.inf
[Components.common.SEC]
Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc
index f14511120e..e680e330ed 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc
@@ -158,6 +158,7 @@
ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf
ExtractGuidedSectionLib|MdePkg/Library/BaseExtractGuidedSectionLib/BaseExtractGuidedSectionLib.inf
+ Edk2OpensbiPlatformWrapperLib|Platform/RISC-V/PlatformPkg/Library/Edk2OpensbiPlatformWrapperLib/Edk2OpensbiPlatformWrapperLib.inf
!ifdef $(SOURCE_DEBUG_ENABLE)
DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/SecPeiDebugAgentLib.inf
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
index c29b36e9bb..98a6a69ca3 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
@@ -165,6 +165,7 @@
ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf
ExtractGuidedSectionLib|MdePkg/Library/BaseExtractGuidedSectionLib/BaseExtractGuidedSectionLib.inf
+ Edk2OpensbiPlatformWrapperLib|Platform/RISC-V/PlatformPkg/Library/Edk2OpensbiPlatformWrapperLib/Edk2OpensbiPlatformWrapperLib.inf
RiscVSpecialPlatformLib|Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/RiscVSpecialPlatformLib/RiscVSpecialPlatformLib.inf
!ifdef $(SOURCE_DEBUG_ENABLE)
diff --git a/Platform/RISC-V/PlatformPkg/Library/Edk2OpensbiPlatformWrapperLib/Edk2OpensbiPlatformWrapperLib.inf b/Platform/RISC-V/PlatformPkg/Library/Edk2OpensbiPlatformWrapperLib/Edk2OpensbiPlatformWrapperLib.inf
new file mode 100644
index 0000000000..8c268c556d
--- /dev/null
+++ b/Platform/RISC-V/PlatformPkg/Library/Edk2OpensbiPlatformWrapperLib/Edk2OpensbiPlatformWrapperLib.inf
@@ -0,0 +1,44 @@
+## @file
+# EDK2 OpenSBI generic platform wrapper library
+#
+# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001b
+ BASE_NAME = Edk2OpensbiPlatformWrapperLib
+ FILE_GUID = 364395A3-21BA-400C-96F7-5D9817F6FEE5
+ MODULE_TYPE = SEC
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = Edk2OpensbiPlatformWrapperLib
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = RISCV64
+#
+
+[Sources]
+ Edk2OpensbiPlatformWrapperLib.c
+
+[Packages]
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec
+ Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec
+
+[Pcd]
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdFirmwareDomainBaseAddress
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdFirmwareDomainSize
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdVariableFirmwareRegionBaseAddress
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdVariableFirmwareRegionSize
+
+[LibraryClasses]
+ BaseLib
+ DebugLib
+ DebugAgentLib
+ PcdLib
+ PrintLib
diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf
index dd5f01ab4d..ceb6d25222 100644
--- a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf
+++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf
@@ -23,7 +23,6 @@
[Sources]
SecMain.c
- Edk2OpenSbiPlatform.c
[Sources.RISCV64]
Riscv64/SecEntry.S
@@ -40,6 +39,7 @@
BaseMemoryLib
DebugAgentLib
DebugLib
+ Edk2OpensbiPlatformWrapperLib
ExtractGuidedSectionLib
FdtLib
IoLib
@@ -62,14 +62,10 @@
[Pcd]
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootHartId
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdHartCount
- gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootableHartNumber
- gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootableHartIndexToId
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRootFirmwareDomainBaseAddress
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRootFirmwareDomainSize
- gUefiRiscVPlatformPkgTokenSpaceGuid.PcdFirmwareDomainBaseAddress
- gUefiRiscVPlatformPkgTokenSpaceGuid.PcdFirmwareDomainSize
- gUefiRiscVPlatformPkgTokenSpaceGuid.PcdVariableFirmwareRegionBaseAddress
- gUefiRiscVPlatformPkgTokenSpaceGuid.PcdVariableFirmwareRegionSize
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootableHartNumber
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootableHartIndexToId
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdOpenSbiStackSize
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdScratchRamBase
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdScratchRamSize
diff --git a/Platform/RISC-V/PlatformPkg/Include/Library/Edk2OpensbiPlatformWrapperLib.h b/Platform/RISC-V/PlatformPkg/Include/Library/Edk2OpensbiPlatformWrapperLib.h
new file mode 100644
index 0000000000..4da0a64a8c
--- /dev/null
+++ b/Platform/RISC-V/PlatformPkg/Include/Library/Edk2OpensbiPlatformWrapperLib.h
@@ -0,0 +1,16 @@
+/** @file
+ Definition of EDK2 OpenSBI generic platform wrapper library
+
+ Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef EDK2_OPENSBI_PLATFORM_WRAPPER_LIB_
+#define EDK2_OPENSBI_PLATFORM_WRAPPER_LIB_
+
+#include <sbi/sbi_platform.h>
+
+extern struct sbi_platform_operations Edk2OpensbiPlatformOps;
+
+#endif
diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.h b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.h
index 496799efc0..6188778fc4 100644
--- a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.h
+++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.h
@@ -16,6 +16,7 @@
#include <Library/BaseMemoryLib.h>
#include <Library/DebugAgentLib.h>
#include <Library/DebugLib.h>
+#include <Library/Edk2OpensbiPlatformWrapperLib.h>
#include <Library/ExtractGuidedSectionLib.h>
#include <Library/IoLib.h>
#include <Library/HobLib.h>
diff --git a/Platform/RISC-V/PlatformPkg/Library/Edk2OpensbiPlatformWrapperLib/Edk2OpensbiPlatformWrapperLib.c b/Platform/RISC-V/PlatformPkg/Library/Edk2OpensbiPlatformWrapperLib/Edk2OpensbiPlatformWrapperLib.c
new file mode 100644
index 0000000000..6c5c1a789f
--- /dev/null
+++ b/Platform/RISC-V/PlatformPkg/Library/Edk2OpensbiPlatformWrapperLib/Edk2OpensbiPlatformWrapperLib.c
@@ -0,0 +1,530 @@
+/*
+ EDK2 OpenSBI generic platform wrapper library
+
+ Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ */
+
+#include <Library/DebugAgentLib.h>
+#include <Library/DebugLib.h>
+#include <IndustryStandard/RiscVOpensbi.h>
+#include <sbi/riscv_asm.h>
+#include <sbi/sbi_platform.h>
+#include <sbi/sbi_scratch.h>
+#include <sbi/sbi_domain.h>
+#include <sbi/sbi_math.h>
+
+extern struct sbi_platform_operations platform_ops;
+extern atomic_t BootHartDone;
+
+/**
+ Add firmware memory domain.
+
+ @retval OpenSBI error code.
+
+**/
+INT32
+SecSetEdk2FwMemoryRegions (
+ VOID
+ )
+{
+ INT32 Ret;
+ struct sbi_domain_memregion fw_memregs;
+
+ Ret = 0;
+
+ //
+ // EDK2 PEI domain memory region
+ //
+ fw_memregs.order = log2roundup(FixedPcdGet32(PcdFirmwareDomainSize));
+ fw_memregs.base = FixedPcdGet32(PcdFirmwareDomainBaseAddress);
+ fw_memregs.flags = SBI_DOMAIN_MEMREGION_EXECUTABLE | SBI_DOMAIN_MEMREGION_READABLE;
+ Ret = sbi_domain_root_add_memregion ((CONST struct sbi_domain_memregion *)&fw_memregs);
+ if (Ret != 0) {
+ DEBUG ((DEBUG_ERROR, "%a: Add firmware regiosn of FW Domain fail\n", __FUNCTION__));
+ }
+
+ //
+ // EDK2 EFI Variable domain memory region
+ //
+ fw_memregs.order = log2roundup(FixedPcdGet32(PcdVariableFirmwareRegionSize));
+ fw_memregs.base = FixedPcdGet32(PcdVariableFirmwareRegionBaseAddress);
+ fw_memregs.flags = SBI_DOMAIN_MEMREGION_READABLE | SBI_DOMAIN_MEMREGION_WRITEABLE;
+ Ret = sbi_domain_root_add_memregion ((CONST struct sbi_domain_memregion *)&fw_memregs);
+ if (Ret != 0) {
+ DEBUG ((DEBUG_ERROR, "%a: Add firmware regiosn of variable FW Domain fail\n", __FUNCTION__));
+ }
+ return Ret;
+}
+/**
+ OpenSBI platform early init hook.
+
+ @param[in] ColdBoot Is cold boot path or warm boot path.
+ @retval OpenSBI error code.
+
+**/
+INT32
+SecPostOpenSbiPlatformEarlylInit(
+ IN BOOLEAN ColdBoot
+ )
+{
+ UINT32 HartId;
+
+ if (!ColdBoot) {
+ HartId = current_hartid();
+ DEBUG ((DEBUG_INFO, "%a: Non boot hart %d.\n", __FUNCTION__, HartId));
+ return 0;
+ }
+ //
+ // Setup firmware memory region.
+ //
+ if (SecSetEdk2FwMemoryRegions () != 0) {
+ ASSERT (FALSE);
+ }
+
+ //
+ // Boot HART is already in the process of OpenSBI initialization.
+ // We can let other HART to keep booting.
+ //
+ DEBUG ((DEBUG_INFO, "%a: Set boot hart done.\n", __FUNCTION__));
+ atomic_write (&BootHartDone, (UINT64)TRUE);
+ return 0;
+}
+
+/**
+ OpenSBI platform final init hook.
+ We restore the next_arg1 to the pointer of EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT.
+
+ @param[in] ColdBoot Is cold boot path or warm boot path.
+ @retval OpenSBI error code.
+
+**/
+INT32
+SecPostOpenSbiPlatformFinalInit (
+ IN BOOLEAN ColdBoot
+ )
+{
+ UINT32 HartId;
+ struct sbi_scratch *SbiScratch;
+ struct sbi_scratch *ScratchSpace;
+ struct sbi_platform *SbiPlatform;
+ EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT *FirmwareContext;
+
+ if (!ColdBoot) {
+ HartId = current_hartid();
+ DEBUG ((DEBUG_INFO, "%a: Non boot hart %d.\n", __FUNCTION__, HartId));
+ return 0;
+ }
+
+ DEBUG((DEBUG_INFO, "%a: Entry, preparing to jump to PEI Core\n\n", __FUNCTION__));
+
+ SbiScratch = sbi_scratch_thishart_ptr();
+ SbiPlatform = (struct sbi_platform *)sbi_platform_ptr(SbiScratch);
+ FirmwareContext = (EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT *)SbiPlatform->firmware_context;
+
+ //
+ // Print out scratch address of each hart
+ //
+ DEBUG ((DEBUG_INFO, "%a: OpenSBI scratch address for each hart:\n", __FUNCTION__));
+ for (HartId = 0; HartId < SBI_HARTMASK_MAX_BITS; HartId ++) {
+ if (sbi_platform_hart_invalid(SbiPlatform, HartId)) {
+ continue;
+ }
+ ScratchSpace = sbi_hartid_to_scratch (HartId);
+ if(ScratchSpace != NULL) {
+ DEBUG((DEBUG_INFO, " Hart %d: 0x%x\n", HartId, ScratchSpace));
+ } else {
+ DEBUG((DEBUG_INFO, " Hart %d not initialized yet\n", HartId));
+ }
+ }
+
+ //
+ // Set firmware context Hart-specific pointer
+ //
+ for (HartId = 0; HartId < SBI_HARTMASK_MAX_BITS; HartId ++) {
+ if (sbi_platform_hart_invalid(SbiPlatform, HartId)) {
+ continue;
+ }
+ ScratchSpace = sbi_hartid_to_scratch (HartId);
+ if (ScratchSpace != NULL) {
+ FirmwareContext->HartSpecific[HartId] =
+ (EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC *)((UINT8 *)ScratchSpace - FIRMWARE_CONTEXT_HART_SPECIFIC_SIZE);
+ DEBUG ((DEBUG_INFO, "%a: OpenSBI Hart %d Firmware Context Hart-specific at address: 0x%x\n",
+ __FUNCTION__,
+ HartId,
+ FirmwareContext->HartSpecific [HartId]
+ ));
+ }
+ }
+
+ DEBUG((DEBUG_INFO, "%a: Will jump to PEI Core in OpenSBI with \n", __FUNCTION__));
+ DEBUG((DEBUG_INFO, " sbi_scratch = %x\n", SbiScratch));
+ DEBUG((DEBUG_INFO, " sbi_platform = %x\n", SbiPlatform));
+ DEBUG((DEBUG_INFO, " FirmwareContext = %x\n", FirmwareContext));
+ SbiScratch->next_arg1 = (unsigned long)FirmwareContext;
+
+ return 0;
+}
+/**
+ OpenSBI platform early init hook.
+
+ @param[in] ColdBoot Is cold boot path or warm boot path.
+ @retval OpenSBI error code.
+
+**/
+INT32
+Edk2OpensbiPlatformEarlyInit (
+ IN BOOLEAN ColdBoot
+ )
+{
+ INT32 ReturnCode;
+
+ DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));
+
+ if (platform_ops.early_init) {
+ ReturnCode = platform_ops.early_init (ColdBoot);
+ if (ReturnCode) {
+ return ReturnCode;
+ }
+ }
+ if (ColdBoot == TRUE) {
+ return SecPostOpenSbiPlatformEarlylInit(ColdBoot);
+ }
+ return 0;
+}
+/**
+ OpenSBI platform final init hook.
+
+ @param[in] ColdBoot Is cold boot path or warm boot path.
+ @retval OpenSBI error code.
+
+**/
+INT32
+Edk2OpensbiPlatformFinalInit (
+ IN BOOLEAN ColdBoot
+ )
+{
+ INT32 ReturnCode;
+
+ DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));
+
+ if (platform_ops.final_init) {
+ ReturnCode = platform_ops.final_init (ColdBoot);
+ if (ReturnCode) {
+ return ReturnCode;
+ }
+ }
+ if (ColdBoot == TRUE) {
+ return SecPostOpenSbiPlatformFinalInit(ColdBoot);
+ }
+ return 0;
+}
+/**
+ OpenSBI platform early exit hook.
+
+**/
+VOID
+Edk2OpensbiPlatformEarlyExit (
+ VOID
+)
+{
+ DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));
+
+ if (platform_ops.early_exit) {
+ return platform_ops.early_exit ();
+ }
+}
+
+/**
+ Platform final exit hook
+
+ **/
+VOID
+Edk2OpensbiPlatformFinalExit (
+ VOID
+ )
+{
+ DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));
+
+ if (platform_ops.early_exit) {
+ return platform_ops.early_exit ();
+ }
+}
+
+/**
+ For platforms that do not implement misa, non-standard
+ methods are needed to determine cpu extension.
+
+ @param[in] Extension Check ISA extension.
+ @retval OpenSBI error code.
+
+**/
+INT32
+Edk2OpensbiPlatforMMISACheckExtension (
+ IN CHAR8 Extension
+ )
+{
+ if (platform_ops.misa_check_extension) {
+ return platform_ops.misa_check_extension (Extension);
+ }
+ return 0;
+}
+
+/**
+ Get the XLEN.
+
+ @retval Return the XLEN
+
+**/
+INT32
+Edk2OpensbiPlatforMMISAGetXLEN (
+ VOID
+)
+{
+ if (platform_ops.misa_get_xlen) {
+ return platform_ops.misa_get_xlen ();
+ }
+ return 0;
+}
+
+/**
+ Initialize (or populate) domains for the platform*
+
+ @retval OpenSBI error code.
+
+**/
+INT32
+Edk2OpensbiPlatformDomainsInit (
+ VOID
+)
+{
+ DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));
+
+ if (platform_ops.domains_init) {
+ return platform_ops.domains_init ();
+ }
+ return 0;
+}
+
+/**
+ Initialize the platform console
+
+ @retval OpenSBI error code.
+
+**/
+INT32
+Edk2OpensbiPlatformSerialInit (
+ VOID
+)
+{
+ DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));
+
+ if (platform_ops.console_init) {
+ return platform_ops.console_init ();
+ }
+ return 0;
+}
+
+/**
+ Initialize the platform interrupt controller for current HART
+
+ @param[in] ColdBoot Is cold boot path or warm boot path.
+ @retval OpenSBI error code.
+
+**/
+INT32
+Edk2OpensbiPlatformIrqchipInit (
+ IN BOOLEAN ColdBoot
+)
+{
+ DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));
+
+ if (platform_ops.irqchip_init) {
+ return platform_ops.irqchip_init (ColdBoot);
+ }
+ return 0;
+}
+
+/**
+ Exit the platform interrupt controller for current HART
+
+**/
+VOID
+Edk2OpensbiPlatformIrqchipExit (
+ VOID
+)
+{
+ DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));
+
+ if (platform_ops.irqchip_exit) {
+ return platform_ops.irqchip_exit ();
+ }
+}
+
+/**
+ Initialize IPI for current HART
+
+ @param[in] ColdBoot Is cold boot path or warm boot path.
+ @retval OpenSBI error code.
+
+**/
+INT32
+Edk2OpensbiPlatformIpiInit (
+ IN BOOLEAN ColdBoot
+)
+{
+ DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));
+
+ if (platform_ops.ipi_init) {
+ return platform_ops.ipi_init (ColdBoot);
+ }
+ return 0;
+}
+
+/**
+ Exit IPI for current HART
+
+**/
+VOID
+Edk2OpensbiPlatformIpiExit (
+ VOID
+)
+{
+ DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));
+
+ if (platform_ops.ipi_exit) {
+ return platform_ops.ipi_exit ();
+ }
+}
+
+/**
+ Get tlb flush limit value
+
+ @retval Cache flush limit value.
+
+**/
+UINT64
+Edk2OpensbiPlatformTlbrFlushLimit (
+ VOID
+)
+{
+ DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));
+
+ if (platform_ops.get_tlbr_flush_limit) {
+ return platform_ops.get_tlbr_flush_limit ();
+ }
+ return 0;
+}
+
+/**
+ Initialize platform timer for current HART
+
+ @param[in] ColdBoot Is cold boot path or warm boot path.
+ @retval OpenSBI error code.
+
+**/
+INT32
+Edk2OpensbiPlatformTimerInit (
+ IN BOOLEAN ColdBoot
+)
+{
+ DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));
+
+ if (platform_ops.timer_init) {
+ return platform_ops.timer_init (ColdBoot);
+ }
+ return 0;
+}
+
+/**
+ Exit platform timer for current HART
+
+**/
+VOID
+Edk2OpensbiPlatformTimerExit (
+ VOID
+)
+{
+ DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));
+
+ if (platform_ops.timer_exit) {
+ return platform_ops.timer_exit ();
+ }
+}
+
+/**
+ Check platform vendor SBI extension.
+
+ @param[in] ExtId Extension ID.
+ @retval OpenSBI error code.
+
+ **/
+INT32
+Edk2OpensbiPlatformVendorExtCheck (
+ IN long ExtId
+)
+{
+ DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));
+
+ if (platform_ops.vendor_ext_check) {
+ return platform_ops.vendor_ext_check (ExtId);
+ }
+ return 0;
+}
+
+/**
+ Platform specific SBI extension implementation provider
+
+ @param[in] ExtId SBI extension ID.
+ @param[in] FuncId Function ID.
+ @param[in] Regs The trap register.
+ @param[in] OutValue Value returned from SBI.
+ @param[in] OutTrap The trap infomation after calling to SBI.
+
+ @retval OpenSBI error code.
+
+**/
+INT32
+Edk2OpensbiPlatformVendorExtProvider (
+ IN long ExtId,
+ IN long FuncId,
+ IN CONST struct sbi_trap_regs *Regs,
+ IN unsigned long *OutValue,
+ IN struct sbi_trap_info *OutTrap
+)
+{
+ DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));
+
+ if (platform_ops.vendor_ext_provider) {
+ return platform_ops.vendor_ext_provider (
+ ExtId,
+ FuncId,
+ Regs,
+ OutValue,
+ OutTrap
+ );
+ }
+ return 0;
+}
+
+CONST struct sbi_platform_operations Edk2OpensbiPlatformOps = {
+ .early_init = Edk2OpensbiPlatformEarlyInit,
+ .final_init = Edk2OpensbiPlatformFinalInit,
+ .early_exit = Edk2OpensbiPlatformEarlyExit,
+ .final_exit = Edk2OpensbiPlatformFinalExit,
+ .misa_check_extension = Edk2OpensbiPlatforMMISACheckExtension,
+ .misa_get_xlen = Edk2OpensbiPlatforMMISAGetXLEN,
+ .domains_init = Edk2OpensbiPlatformDomainsInit,
+ .console_init = Edk2OpensbiPlatformSerialInit,
+ .irqchip_init = Edk2OpensbiPlatformIrqchipInit,
+ .irqchip_exit = Edk2OpensbiPlatformIrqchipExit,
+ .ipi_init = Edk2OpensbiPlatformIpiInit,
+ .ipi_exit = Edk2OpensbiPlatformIpiExit,
+ .get_tlbr_flush_limit = Edk2OpensbiPlatformTlbrFlushLimit,
+ .timer_init = Edk2OpensbiPlatformTimerInit,
+ .timer_exit = Edk2OpensbiPlatformTimerExit,
+ .vendor_ext_check = Edk2OpensbiPlatformVendorExtCheck,
+ .vendor_ext_provider = Edk2OpensbiPlatformVendorExtProvider,
+};
diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/Edk2OpenSbiPlatform.c b/Platform/RISC-V/PlatformPkg/Universal/Sec/Edk2OpenSbiPlatform.c
deleted file mode 100644
index 779705489c..0000000000
--- a/Platform/RISC-V/PlatformPkg/Universal/Sec/Edk2OpenSbiPlatform.c
+++ /dev/null
@@ -1,277 +0,0 @@
-/*
- Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-
- */
-
-#include <Library/DebugAgentLib.h>
-#include <Library/DebugLib.h>
-
-#include <libfdt.h>
-#include <sbi/riscv_asm.h>
-#include <sbi/sbi_domain.h>
-#include <sbi/sbi_hartmask.h>
-#include <sbi/sbi_platform.h>
-#include <sbi/sbi_string.h>
-#include <sbi/sbi_math.h>
-#include <sbi_utils/fdt/fdt_domain.h>
-#include <sbi_utils/fdt/fdt_fixup.h>
-#include <sbi_utils/fdt/fdt_helper.h>
-#include <sbi_utils/irqchip/fdt_irqchip.h>
-#include <sbi_utils/serial/fdt_serial.h>
-#include <sbi_utils/timer/fdt_timer.h>
-#include <sbi_utils/ipi/fdt_ipi.h>
-#include <sbi_utils/reset/fdt_reset.h>
-
-#include "SecMain.h"
-
-extern struct sbi_platform_operations platform_ops;
-
-int Edk2OpensbiPlatformEarlyInit (
- BOOLEAN ColdBoot
- )
-{
- int ReturnCode;
-
- DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));
-
- if (platform_ops.early_init) {
- ReturnCode = platform_ops.early_init (ColdBoot);
- if (ReturnCode) {
- return ReturnCode;
- }
- }
- if (ColdBoot == TRUE) {
- return SecPostOpenSbiPlatformEarlylInit(ColdBoot);
- }
- return 0;
-}
-
-int Edk2OpensbiPlatformFinalInit (
- BOOLEAN ColdBoot
- )
-{
- int ReturnCode;
-
- DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));
-
- if (platform_ops.final_init) {
- ReturnCode = platform_ops.final_init (ColdBoot);
- if (ReturnCode) {
- return ReturnCode;
- }
- }
- if (ColdBoot == TRUE) {
- return SecPostOpenSbiPlatformFinalInit(ColdBoot);
- }
- return 0;
-}
-
-VOID Edk2OpensbiPlatformEarlyExit (
- VOID
- )
-{
- DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));
-
- if (platform_ops.early_exit) {
- return platform_ops.early_exit ();
- }
-}
-
-/** Platform final exit */
-VOID Edk2OpensbiPlatformFinalExit (
- VOID
- )
-{
- DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));
-
- if (platform_ops.early_exit) {
- return platform_ops.early_exit ();
- }
-}
-
-/**
- For platforms that do not implement misa, non-standard
- methods are needed to determine cpu extension.
-**/
-int Edk2OpensbiPlatforMMISACheckExtension (
- CHAR8 Extension
- )
-{
- if (platform_ops.misa_check_extension) {
- return platform_ops.misa_check_extension (Extension);
- }
- return 0;
-}
-
-/**
- For platforms that do not implement misa, non-standard
- methods are needed to get MXL field of misa.
-**/
-int Edk2OpensbiPlatforMMISAGetXLEN (VOID)
-{
- if (platform_ops.misa_get_xlen) {
- return platform_ops.misa_get_xlen ();
- }
- return 0;
-}
-
-/** Initialize (or populate) domains for the platform */
-int Edk2OpensbiPlatformDomainsInit (VOID)
-{
- DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));
-
- if (platform_ops.domains_init) {
- return platform_ops.domains_init ();
- }
- return 0;
-}
-
-/** Initialize the platform console */
-int Edk2OpensbiPlatformSerialInit (VOID)
-{
- DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));
-
- if (platform_ops.console_init) {
- return platform_ops.console_init ();
- }
- return 0;
-}
-
-/** Initialize the platform interrupt controller for current HART */
-int Edk2OpensbiPlatformIrqchipInit (
- BOOLEAN ColdBoot
- )
-{
- DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));
-
- if (platform_ops.irqchip_init) {
- return platform_ops.irqchip_init (ColdBoot);
- }
- return 0;
-}
-
-/** Exit the platform interrupt controller for current HART */
-VOID Edk2OpensbiPlatformIrqchipExit (VOID)
-{
- DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));
-
- if (platform_ops.irqchip_exit) {
- return platform_ops.irqchip_exit ();
- }
-}
-
-/** Initialize IPI for current HART */
-int Edk2OpensbiPlatformIpiInit (
- BOOLEAN ColdBoot
- )
-{
- DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));
-
- if (platform_ops.ipi_init) {
- return platform_ops.ipi_init (ColdBoot);
- }
- return 0;
-}
-
-/** Exit IPI for current HART */
-VOID Edk2OpensbiPlatformIpiExit (VOID)
-{
- DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));
-
- if (platform_ops.ipi_exit) {
- return platform_ops.ipi_exit ();
- }
-}
-
-/** Get tlb flush limit value **/
-UINT64 Edk2OpensbiPlatformTlbrFlushLimit (VOID)
-{
- DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));
-
- if (platform_ops.get_tlbr_flush_limit) {
- return platform_ops.get_tlbr_flush_limit ();
- }
- return 0;
-}
-
-/** Initialize platform timer for current HART */
-int Edk2OpensbiPlatformTimerInit (
- BOOLEAN ColdBoot
- )
-{
- DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));
-
- if (platform_ops.timer_init) {
- return platform_ops.timer_init (ColdBoot);
- }
- return 0;
-}
-
-/** Exit platform timer for current HART */
-VOID Edk2OpensbiPlatformTimerExit (VOID)
-{
- DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));
-
- if (platform_ops.timer_exit) {
- return platform_ops.timer_exit ();
- }
-}
-
-/** platform specific SBI extension implementation probe function */
-int Edk2OpensbiPlatformVendorExtCheck (
- long ExtId
- )
-{
- DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));
-
- if (platform_ops.vendor_ext_check) {
- return platform_ops.vendor_ext_check (ExtId);
- }
- return 0;
-}
-
-
-/** platform specific SBI extension implementation provider */
-int Edk2OpensbiPlatformVendorExtProvider (
- long ExtId,
- long FuncId,
- const struct sbi_trap_regs *Regs,
- unsigned long *OutValue,
- struct sbi_trap_info *OutTrap
- )
-{
- DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));
-
- if (platform_ops.vendor_ext_provider) {
- return platform_ops.vendor_ext_provider (
- ExtId,
- FuncId,
- Regs,
- OutValue,
- OutTrap
- );
- }
- return 0;
-}
-
-const struct sbi_platform_operations Edk2OpensbiPlatformOps = {
- .early_init = Edk2OpensbiPlatformEarlyInit,
- .final_init = Edk2OpensbiPlatformFinalInit,
- .early_exit = Edk2OpensbiPlatformEarlyExit,
- .final_exit = Edk2OpensbiPlatformFinalExit,
- .misa_check_extension = Edk2OpensbiPlatforMMISACheckExtension,
- .misa_get_xlen = Edk2OpensbiPlatforMMISAGetXLEN,
- .domains_init = Edk2OpensbiPlatformDomainsInit,
- .console_init = Edk2OpensbiPlatformSerialInit,
- .irqchip_init = Edk2OpensbiPlatformIrqchipInit,
- .irqchip_exit = Edk2OpensbiPlatformIrqchipExit,
- .ipi_init = Edk2OpensbiPlatformIpiInit,
- .ipi_exit = Edk2OpensbiPlatformIpiExit,
- .get_tlbr_flush_limit = Edk2OpensbiPlatformTlbrFlushLimit,
- .timer_init = Edk2OpensbiPlatformTimerInit,
- .timer_exit = Edk2OpensbiPlatformTimerExit,
- .vendor_ext_check = Edk2OpensbiPlatformVendorExtCheck,
- .vendor_ext_provider = Edk2OpensbiPlatformVendorExtProvider,
-};
diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c
index 3bc3690047..f2b2c7b583 100644
--- a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c
+++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c
@@ -25,49 +25,12 @@
#include <sbi/sbi_ecall.h> // Reference to header file in opensbi
#include <sbi/sbi_trap.h> // Reference to header file in opensbi
-extern struct sbi_platform_operations Edk2OpensbiPlatformOps;
-
//
// Indicates the boot hart (PcdBootHartId) OpenSBI initialization is done.
//
atomic_t BootHartDone = ATOMIC_INITIALIZER(0);
atomic_t NonBootHartMessageLock = ATOMIC_INITIALIZER(0);
-int sbi_domain_root_add_memregion(const struct sbi_domain_memregion *reg);
-
-typedef struct sbi_scratch *(*hartid2scratch)(ulong hartid, ulong hartindex);
-
-struct sbi_domain_memregion fw_memregs;
-
-int SecSetEdk2FwMemoryRegions (VOID) {
- int Ret;
-
- Ret = 0;
-
- //
- // EDK2 PEI domain memory region
- //
- fw_memregs.order = log2roundup(FixedPcdGet32(PcdFirmwareDomainSize));
- fw_memregs.base = FixedPcdGet32(PcdFirmwareDomainBaseAddress);
- fw_memregs.flags = SBI_DOMAIN_MEMREGION_EXECUTABLE | SBI_DOMAIN_MEMREGION_READABLE;
- Ret = sbi_domain_root_add_memregion ((const struct sbi_domain_memregion *)&fw_memregs);
- if (Ret != 0) {
- DEBUG ((DEBUG_ERROR, "%a: Add firmware regiosn of FW Domain fail\n", __FUNCTION__));
- }
-
- //
- // EDK2 EFI Variable domain memory region
- //
- fw_memregs.order = log2roundup(FixedPcdGet32(PcdVariableFirmwareRegionSize));
- fw_memregs.base = FixedPcdGet32(PcdVariableFirmwareRegionBaseAddress);
- fw_memregs.flags = SBI_DOMAIN_MEMREGION_READABLE | SBI_DOMAIN_MEMREGION_WRITEABLE;
- Ret = sbi_domain_root_add_memregion ((const struct sbi_domain_memregion *)&fw_memregs);
- if (Ret != 0) {
- DEBUG ((DEBUG_ERROR, "%a: Add firmware regiosn of variable FW Domain fail\n", __FUNCTION__));
- }
- return Ret;
-}
-
/**
Locates a section within a series of sections
with the specified section type.
@@ -424,109 +387,6 @@ RegisterFirmwareSbiExtension (
return EFI_SUCCESS;
}
-/**
- OpenSBI platform early init hook.
-
-**/
-int
-SecPostOpenSbiPlatformEarlylInit(
- IN BOOLEAN ColdBoot
- )
-{
- UINT32 HartId;
-
- if (!ColdBoot) {
- HartId = current_hartid();
- DEBUG ((DEBUG_INFO, "%a: Non boot hart %d.\n", __FUNCTION__, HartId));
- return 0;
- }
- //
- // Setup firmware memory region.
- //
- if (SecSetEdk2FwMemoryRegions () != 0) {
- ASSERT (FALSE);
- }
-
- //
- // Boot HART is already in the process of OpenSBI initialization.
- // We can let other HART to keep booting.
- //
- DEBUG ((DEBUG_INFO, "%a: Set boot hart done.\n", __FUNCTION__));
- atomic_write (&BootHartDone, (UINT64)TRUE);
- return 0;
-}
-
-/**
- OpenSBI platform final init hook.
- We restore the next_arg1 to the pointer of EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT.
-
-**/
-int
-SecPostOpenSbiPlatformFinalInit (
- IN BOOLEAN ColdBoot
- )
-{
- UINT32 HartId;
- struct sbi_scratch *SbiScratch;
- struct sbi_scratch *ScratchSpace;
- struct sbi_platform *SbiPlatform;
- EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT *FirmwareContext;
-
- if (!ColdBoot) {
- HartId = current_hartid();
- DEBUG ((DEBUG_INFO, "%a: Non boot hart %d.\n", __FUNCTION__, HartId));
- return 0;
- }
-
- DEBUG((DEBUG_INFO, "%a: Entry, preparing to jump to PEI Core\n\n", __FUNCTION__));
-
- SbiScratch = sbi_scratch_thishart_ptr();
- SbiPlatform = (struct sbi_platform *)sbi_platform_ptr(SbiScratch);
- FirmwareContext = (EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT *)SbiPlatform->firmware_context;
-
- //
- // Print out scratch address of each hart
- //
- DEBUG ((DEBUG_INFO, "%a: OpenSBI scratch address for each hart:\n", __FUNCTION__));
- for (HartId = 0; HartId < SBI_HARTMASK_MAX_BITS; HartId ++) {
- if (sbi_platform_hart_invalid(SbiPlatform, HartId)) {
- continue;
- }
- ScratchSpace = sbi_hartid_to_scratch (HartId);
- if(ScratchSpace != NULL) {
- DEBUG((DEBUG_INFO, " Hart %d: 0x%x\n", HartId, ScratchSpace));
- } else {
- DEBUG((DEBUG_INFO, " Hart %d not initialized yet\n", HartId));
- }
- }
-
- //
- // Set firmware context Hart-specific pointer
- //
- for (HartId = 0; HartId < SBI_HARTMASK_MAX_BITS; HartId ++) {
- if (sbi_platform_hart_invalid(SbiPlatform, HartId)) {
- continue;
- }
- ScratchSpace = sbi_hartid_to_scratch (HartId);
- if (ScratchSpace != NULL) {
- FirmwareContext->HartSpecific[HartId] =
- (EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC *)((UINT8 *)ScratchSpace - FIRMWARE_CONTEXT_HART_SPECIFIC_SIZE);
- DEBUG ((DEBUG_INFO, "%a: OpenSBI Hart %d Firmware Context Hart-specific at address: 0x%x\n",
- __FUNCTION__,
- HartId,
- FirmwareContext->HartSpecific [HartId]
- ));
- }
- }
-
- DEBUG((DEBUG_INFO, "%a: Will jump to PEI Core in OpenSBI with \n", __FUNCTION__));
- DEBUG((DEBUG_INFO, " sbi_scratch = %x\n", SbiScratch));
- DEBUG((DEBUG_INFO, " sbi_platform = %x\n", SbiPlatform));
- DEBUG((DEBUG_INFO, " FirmwareContext = %x\n", FirmwareContext));
- SbiScratch->next_arg1 = (unsigned long)FirmwareContext;
-
- return 0;
-}
/** Transion from SEC phase to PEI phase.
@@ -787,7 +647,6 @@ VOID EFIAPI SecCoreStartUpWithStack(
//
ThisSbiPlatform = (struct sbi_platform *)sbi_platform_ptr(Scratch);
ThisSbiPlatform->platform_ops_addr = (unsigned long)&Edk2OpensbiPlatformOps;
-
if (HartId == FixedPcdGet32(PcdBootHartId)) {
Scratch->next_arg1 = (unsigned long)GetDeviceTreeAddress ();
--
2.31.1
next prev parent reply other threads:[~2021-10-19 9:08 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-19 8:09 [edk2-platforms][PATCH 00/30] EDK2 RISC-V port with opensbi v0.9 Abner Chang
2021-10-19 8:09 ` [edk2-platforms][PATCH 01/30] RISC-V/PlatformPkg: Update document Abner Chang
2021-10-19 8:09 ` [edk2-platforms][PATCH 02/30] RISC-V: Add RISC-V PeiCoreEntryPoint library Abner Chang
2021-10-19 8:09 ` [edk2-platforms][PATCH 03/30] RISC-V: Create opensbi firmware domains Abner Chang
2021-10-19 8:09 ` [edk2-platforms][PATCH 04/30] RISC-V: Use RISC-V PeiCoreEntryPoint library Abner Chang
2021-10-19 8:09 ` [edk2-platforms][PATCH 05/30] Platform/RISC-V: Add library to get PPI descriptor Abner Chang
2021-10-19 8:09 ` [edk2-platforms][PATCH 06/30] Platform/U540: Provide PlatormSecPpiLib Abner Chang
2021-10-19 8:09 ` [edk2-platforms][PATCH 07/30] Platform/RISC-V: Use PlatformSecPpiLib Abner Chang
2021-10-19 8:09 ` [edk2-platforms][PATCH 08/30] Platform/SiFive: CoreInfoHob uses RiscVFirmwareContextLib Abner Chang
2021-10-19 8:09 ` [edk2-platforms][PATCH 09/30] SiFive/U5SeriesPkg: Add CLINT to Device Tree Abner Chang
2021-10-19 8:09 ` [edk2-platforms][PATCH 10/30] Platform/RISC-V: Add NULL library instance of RiscVSpecialPlatformLib Abner Chang
2021-10-19 8:09 ` [edk2-platforms][PATCH 11/30] SiFive/U540: RiscVSpecialPlatformLib instance of U540 Abner Chang
2021-10-19 8:09 ` [edk2-platforms][PATCH 12/30] Platform/RISC-V: Remove platform dependency from this library Abner Chang
2021-10-19 8:09 ` [edk2-platforms][PATCH 13/30] Platform/RISC-V: Remove Null instance of OpensbilatformLibNull Abner Chang
2021-10-19 8:09 ` [edk2-platforms][PATCH 14/30] RiscVPlatformPkg/Sec: Initial hart_index2Id array Abner Chang
2021-10-19 8:09 ` [edk2-platforms][PATCH 15/30] RiscVPlatformPkg/OpensbiPlatformLib: Remove platform code Abner Chang
2021-10-19 8:09 ` [edk2-platforms][PATCH 16/30] RiscVPlatformPkg/U540: Only use four harts on U540 Abner Chang
2021-10-19 8:09 ` [edk2-platforms][PATCH 17/30] U5SeriesPkg/PeiCoreInfoHob: Remove hart count check Abner Chang
2021-10-19 8:09 ` [edk2-platforms][PATCH 18/30] RiscVPlatformPkg/RiscVSpecialPlatformLib: Rename module name Abner Chang
2021-10-19 8:09 ` [edk2-platforms][PATCH 19/30] RiscVPlatformPkg/U540: Add SortLib Abner Chang
2021-10-19 8:09 ` [edk2-platforms][PATCH 20/30] ProcessorPkg/opensbi: Update opensbi library Abner Chang
2021-10-19 8:09 ` [edk2-platforms][PATCH 21/30] RiscVPlatformPkg/Sec: Check Cold/Warm hart Abner Chang
2021-10-19 8:09 ` [edk2-platforms][PATCH 22/30] RiscVPlatformPkg/Sec: Add more comments to Secmain.c Abner Chang
2021-10-19 8:10 ` [edk2-platforms][PATCH 23/30] RiscV/ProcessorPkg: Create read mtime CSR library instances Abner Chang
2021-10-19 8:10 ` [edk2-platforms][PATCH 24/30] RiscV/ProcessorPkg: Use mtime CSR library Abner Chang
2021-10-19 8:10 ` [edk2-platforms][PATCH 25/30] Silicon/SiFive: " Abner Chang
2021-10-19 8:10 ` [edk2-platforms][PATCH 26/30] SiFive/SerialPortLib: Remove global variable Abner Chang
2021-10-19 8:10 ` [edk2-platforms][PATCH 27/30] RISC-V/PlatformPkg: Updates for the latest OpenSBI Abner Chang
2021-10-19 8:10 ` Abner Chang [this message]
2021-10-19 8:10 ` [edk2-platforms][PATCH 29/30] RISC-V/PlatformPkg: Determine hart number from DTB Abner Chang
2021-10-19 8:10 ` [edk2-platforms][PATCH 30/30] Silicon/RISC-V: Add PciCpuIoDxe driver Abner Chang
2021-11-09 4:26 ` [edk2-platforms][PATCH 00/30] EDK2 RISC-V port with opensbi v0.9 Daniel Schaefer
2021-11-09 10:06 ` Sunil V L
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-list from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20211019081007.31165-29-abner.chang@hpe.com \
--to=devel@edk2.groups.io \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox