From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by mx.groups.io with SMTP id smtpd.web09.6803.1634808547749851921 for ; Thu, 21 Oct 2021 02:29:08 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@redhat.com header.s=mimecast20190719 header.b=G841HaGN; spf=pass (domain: redhat.com, ip: 170.10.133.124, mailfrom: kraxel@redhat.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1634808546; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=o6KWuFMZNPu/nQvx3nMXKAqd4gE86q7QuXvmfnGj/NI=; b=G841HaGNGGZjD11+9QyESbHrUv2StSA/fxx4zS3Tod7jvixDQ4vm6Cfzmt101u2gle+qAU Hh3aNI8uS8yDkkwLP6LHp6VrVufsX7o9YGB8oDSwyM7g1Ec4zeW85oWsYA57nmFzvkNtVu aayopFQYhqxX0PDutYIbrV1VV//73pQ= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-222-piZxAOkWMIawWw-g5jO1lA-1; Thu, 21 Oct 2021 05:28:58 -0400 X-MC-Unique: piZxAOkWMIawWw-g5jO1lA-1 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id A6214CC621; Thu, 21 Oct 2021 09:28:56 +0000 (UTC) Received: from sirius.home.kraxel.org (unknown [10.39.192.23]) by smtp.corp.redhat.com (Postfix) with ESMTPS id EA12F60D30; Thu, 21 Oct 2021 09:28:55 +0000 (UTC) Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id 3D2E81800796; Thu, 21 Oct 2021 11:28:54 +0200 (CEST) Date: Thu, 21 Oct 2021 11:28:54 +0200 From: "Gerd Hoffmann" To: Min Xu Cc: devel@edk2.groups.io, Ard Biesheuvel , Jordan Justen , Brijesh Singh , Erdem Aktas , James Bottomley , Jiewen Yao , Tom Lendacky Subject: Re: [PATCH V10 2/4] OvmfPkg: Clear WORK_AREA_GUEST_TYPE in Main.asm Message-ID: <20211021092854.emghtoeawp6v62i5@sirius.home.kraxel.org> References: <3659452251fb91060601f8a4b96fb64b82549fa2.1634774871.git.min.m.xu@intel.com> MIME-Version: 1.0 In-Reply-To: <3659452251fb91060601f8a4b96fb64b82549fa2.1634774871.git.min.m.xu@intel.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=kraxel@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit On Thu, Oct 21, 2021 at 08:17:32AM +0800, Min Xu wrote: > RFC： https://bugzilla.tianocore.org/show_bug.cgi?id=3429 > > Previously WORK_AREA_GUEST_TYPE was cleared in SetCr3ForPageTables64. > This is workable for Legacy guest and SEV guest. But it doesn't work > after Intel TDX is introduced. It is because all TDX CPUs (BSP and APs) > start to run from 0xfffffff0, thus WORK_AREA_GUEST_TYPE will be cleared > multi-times if it is TDX guest. So the clearance of WORK_AREA_GUEST_TYPE > is moved to Main16 entry point in Main.asm. > Note: WORK_AREA_GUEST_TYPE is only defined for ARCH_X64. > > For Intel TDX, its corresponding entry point is Main32 (which will be > introduced in next commit in this patch-set). WORK_AREA_GUEST_TYPE will > be cleared there. Acked-by: Gerd Hoffmann