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From: "Brijesh Singh" <brijesh.singh@amd.com>
To: <devel@edk2.groups.io>
Cc: James Bottomley <jejb@linux.ibm.com>, Min Xu <min.m.xu@intel.com>,
	"Jiewen Yao" <jiewen.yao@intel.com>,
	Tom Lendacky <thomas.lendacky@amd.com>,
	"Jordan Justen" <jordan.l.justen@intel.com>,
	Ard Biesheuvel <ardb+tianocore@kernel.org>,
	Erdem Aktas <erdemaktas@google.com>,
	"Michael Roth" <Michael.Roth@amd.com>,
	Gerd Hoffmann <kraxel@redhat.com>,
	Brijesh Singh <brijesh.singh@amd.com>,
	Michael Roth <michael.roth@amd.com>,
	Jiewen Yao <Jiewen.yao@intel.com>
Subject: [PATCH v11 10/32] OvmfPkg/SecMain: register GHCB gpa for the SEV-SNP guest
Date: Fri, 22 Oct 2021 23:13:27 -0500	[thread overview]
Message-ID: <20211023041349.1263726-11-brijesh.singh@amd.com> (raw)
In-Reply-To: <20211023041349.1263726-1-brijesh.singh@amd.com>

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

The SEV-SNP guest requires that GHCB GPA must be registered before using.
See the GHCB specification section 2.3.2 for more details.

Cc: Michael Roth <michael.roth@amd.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
---
 OvmfPkg/Sec/AmdSev.c | 117 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 117 insertions(+)

diff --git a/OvmfPkg/Sec/AmdSev.c b/OvmfPkg/Sec/AmdSev.c
index 7f74e8bfe88e..58f054ea4418 100644
--- a/OvmfPkg/Sec/AmdSev.c
+++ b/OvmfPkg/Sec/AmdSev.c
@@ -48,6 +48,102 @@ SevEsProtocolFailure (
   CpuDeadLoop ();
 }
 
+/**
+  Determine if SEV-SNP is active.
+
+  @retval TRUE   SEV-SNP is enabled
+  @retval FALSE  SEV-SNP is not enabled
+
+**/
+STATIC
+BOOLEAN
+SevSnpIsEnabled (
+  VOID
+  )
+{
+  MSR_SEV_STATUS_REGISTER           Msr;
+
+  //
+  // Read the SEV_STATUS MSR to determine whether SEV-SNP is active.
+  //
+  Msr.Uint32 = AsmReadMsr32 (MSR_SEV_STATUS);
+
+  //
+  // Check MSR_0xC0010131 Bit 2 (Sev-Snp Enabled)
+  //
+  if (Msr.Bits.SevSnpBit) {
+    return TRUE;
+  }
+
+  return FALSE;
+}
+
+/**
+ Register the GHCB GPA
+
+*/
+STATIC
+VOID
+SevSnpGhcbRegister (
+  EFI_PHYSICAL_ADDRESS   Address
+  )
+{
+  MSR_SEV_ES_GHCB_REGISTER  Msr;
+
+  //
+  // Use the GHCB MSR Protocol to request to register the GPA.
+  //
+  Msr.GhcbPhysicalAddress = Address & ~EFI_PAGE_MASK;
+  Msr.GhcbGpaRegister.Function = GHCB_INFO_GHCB_GPA_REGISTER_REQUEST;
+  AsmWriteMsr64 (MSR_SEV_ES_GHCB, Msr.GhcbPhysicalAddress);
+
+  AsmVmgExit ();
+
+  Msr.GhcbPhysicalAddress = AsmReadMsr64 (MSR_SEV_ES_GHCB);
+
+  //
+  // If hypervisor responded with a different GPA than requested then fail.
+  //
+  if ((Msr.GhcbGpaRegister.Function != GHCB_INFO_GHCB_GPA_REGISTER_RESPONSE) ||
+      ((Msr.GhcbPhysicalAddress & ~EFI_PAGE_MASK) != Address)) {
+    SevEsProtocolFailure (GHCB_TERMINATE_GHCB_GENERAL);
+  }
+}
+
+/**
+ Verify that Hypervisor supports the SNP feature.
+
+ */
+STATIC
+BOOLEAN
+HypervisorSnpFeatureCheck (
+  VOID
+  )
+{
+  MSR_SEV_ES_GHCB_REGISTER  Msr;
+  UINT64                    Features;
+
+  //
+  // Use the GHCB MSR Protocol to query the hypervisor capabilities
+  //
+  Msr.GhcbPhysicalAddress = 0;
+  Msr.GhcbHypervisorFeatures.Function = GHCB_HYPERVISOR_FEATURES_REQUEST;
+  AsmWriteMsr64 (MSR_SEV_ES_GHCB, Msr.GhcbPhysicalAddress);
+
+  AsmVmgExit ();
+
+  Msr.GhcbPhysicalAddress = AsmReadMsr64 (MSR_SEV_ES_GHCB);
+
+  Features =  RShiftU64 (Msr.GhcbPhysicalAddress, 12);
+
+  if ((Msr.GhcbHypervisorFeatures.Function != GHCB_HYPERVISOR_FEATURES_RESPONSE) ||
+      (!(Features & GHCB_HV_FEATURES_SNP))) {
+    return FALSE;
+  }
+
+  return TRUE;
+}
+
 /**
   Validate the SEV-ES/GHCB protocol level.
 
@@ -88,6 +184,27 @@ SevEsProtocolCheck (
     SevEsProtocolFailure (GHCB_TERMINATE_GHCB_PROTOCOL);
   }
 
+  //
+  // We cannot use the MemEncryptSevSnpIsEnabled () because the
+  // ProcessLibraryConstructorList () is not called yet.
+  //
+  if (SevSnpIsEnabled ()) {
+    //
+    // Check if hypervisor supports the SNP feature
+    //
+    if (!HypervisorSnpFeatureCheck ()) {
+      SevEsProtocolFailure (GHCB_TERMINATE_GHCB_PROTOCOL);
+    }
+
+    //
+    // Unlike the SEV-ES guest, the SNP requires that GHCB GPA must be
+    // registered with the Hypervisor before the use. This can be done
+    // using the new VMGEXIT defined in the GHCB v2. Register the GPA
+    // before it is used.
+    //
+    SevSnpGhcbRegister ((EFI_PHYSICAL_ADDRESS) (UINTN) FixedPcdGet32 (PcdOvmfSecGhcbBase));
+  }
+
   //
   // SEV-ES protocol checking succeeded, set the initial GHCB address
   //
-- 
2.25.1


  parent reply	other threads:[~2021-10-23  4:14 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-23  4:13 [PATCH v11 00/32] Add AMD Secure Nested Paging (SEV-SNP) support Brijesh Singh
2021-10-23  4:13 ` [PATCH v11 01/32] OvmfPkg/SecMain: move SEV specific routines in AmdSev.c Brijesh Singh
2021-10-23  4:13 ` [PATCH v11 02/32] UefiCpuPkg/MpInitLib: " Brijesh Singh
2021-10-24 23:45   ` Brijesh Singh
2021-11-04 13:53     ` Yao, Jiewen
2021-10-23  4:13 ` [PATCH v11 03/32] OvmfPkg/ResetVector: move clearing GHCB in SecMain Brijesh Singh
2021-10-23  4:13 ` [PATCH v11 04/32] OvmfPkg/ResetVector: introduce SEV metadata descriptor for VMM use Brijesh Singh
2021-10-23  4:13 ` [PATCH v11 05/32] OvmfPkg: reserve SNP secrets page Brijesh Singh
2021-10-23  4:13 ` [PATCH v11 06/32] OvmfPkg: reserve CPUID page Brijesh Singh
2021-10-23  4:13 ` [PATCH v11 07/32] OvmfPkg/ResetVector: pre-validate the data pages used in SEC phase Brijesh Singh
2021-10-23  4:13 ` [PATCH v11 08/32] OvmfPkg/ResetVector: use SEV-SNP-validated CPUID values Brijesh Singh
2021-10-23  4:13 ` [PATCH v11 09/32] OvmfPkg/MemEncryptSevLib: add MemEncryptSevSnpEnabled() Brijesh Singh
2021-10-23  4:13 ` Brijesh Singh [this message]
2021-10-23  4:13 ` [PATCH v11 11/32] OvmfPkg/VmgExitLib: use SEV-SNP-validated CPUID values Brijesh Singh
2021-10-23  4:13 ` [PATCH v11 12/32] OvmfPkg/PlatformPei: register GHCB gpa for the SEV-SNP guest Brijesh Singh
2021-10-23  4:13 ` [PATCH v11 13/32] OvmfPkg/AmdSevDxe: do not use extended PCI config space Brijesh Singh
2021-10-23  4:13 ` [PATCH v11 14/32] OvmfPkg/MemEncryptSevLib: add support to validate system RAM Brijesh Singh
2021-10-23  4:13 ` [PATCH v11 15/32] OvmfPkg/MemEncryptSevLib: add function to check the VMPL0 Brijesh Singh
2021-10-23  4:13 ` [PATCH v11 16/32] OvmfPkg/BaseMemEncryptSevLib: skip the pre-validated system RAM Brijesh Singh
2021-10-23  4:13 ` [PATCH v11 17/32] OvmfPkg/MemEncryptSevLib: add support to validate > 4GB memory in PEI phase Brijesh Singh
2021-10-23  4:13 ` [PATCH v11 18/32] OvmfPkg/SecMain: validate the memory used for decompressing Fv Brijesh Singh
2021-10-23  4:13 ` [PATCH v11 19/32] OvmfPkg/PlatformPei: validate the system RAM when SNP is active Brijesh Singh
2021-10-23  4:13 ` [PATCH v11 20/32] UefiCpuPkg: Define ConfidentialComputingGuestAttr Brijesh Singh
2021-10-24 23:44   ` Brijesh Singh
2021-10-25  7:22   ` [edk2-devel] " Min Xu
2021-10-25 13:57     ` Brijesh Singh
2021-10-23  4:13 ` [PATCH v11 21/32] OvmfPkg/PlatformPei: set PcdConfidentialComputingAttr when SEV is active Brijesh Singh
2021-10-23  4:13 ` [PATCH v11 22/32] UefiCpuPkg/MpInitLib: use PcdConfidentialComputingAttr to check SEV status Brijesh Singh
2021-10-23  4:13 ` [PATCH v11 23/32] UefiCpuPkg: add PcdGhcbHypervisorFeatures Brijesh Singh
2021-10-23  4:13 ` [PATCH v11 24/32] OvmfPkg/PlatformPei: set the Hypervisor Features PCD Brijesh Singh
2021-10-23  4:13 ` [PATCH v11 25/32] MdePkg/GHCB: increase the GHCB protocol max version Brijesh Singh
2021-10-23  4:13 ` [PATCH v11 26/32] UefiCpuPkg/MpLib: add support to register GHCB GPA when SEV-SNP is enabled Brijesh Singh
2021-10-23  4:13 ` [PATCH v11 27/32] UefiCpuPkg/MpInitLib: use BSP to do extended topology check Brijesh Singh
2021-10-23  4:13 ` [PATCH v11 28/32] OvmfPkg/MemEncryptSevLib: change the page state in the RMP table Brijesh Singh
2021-10-23  4:13 ` [PATCH v11 29/32] OvmfPkg/MemEncryptSevLib: skip page state change for Mmio address Brijesh Singh
2021-10-23  4:13 ` [PATCH v11 30/32] OvmfPkg/PlatformPei: mark cpuid and secrets memory reserved in EFI map Brijesh Singh
2021-10-23  4:13 ` [PATCH v11 31/32] OvmfPkg/AmdSev: expose the SNP reserved pages through configuration table Brijesh Singh
2021-10-23  4:13 ` [PATCH v11 32/32] UefiCpuPkg/MpInitLib: Use SEV-SNP AP Creation NAE event to launch APs Brijesh Singh
2021-10-24  1:46 ` [PATCH v11 00/32] Add AMD Secure Nested Paging (SEV-SNP) support Yao, Jiewen
2021-10-24  4:36   ` [edk2-devel] " Brijesh Singh
2021-10-24 23:54   ` Brijesh Singh
2021-10-29 12:26     ` Yao, Jiewen
2021-10-29 14:52       ` Brijesh Singh
2021-10-31 21:40         ` Brijesh Singh
     [not found]         ` <16B33B74BAC60F9D.13000@groups.io>
2021-11-08  2:10           ` Brijesh Singh
2021-11-08  2:14             ` Yao, Jiewen
2021-11-08  2:49               ` Brijesh Singh
2021-11-08  2:54                 ` Yao, Jiewen
     [not found] ` <16B08DB9AF0DA9D0.23504@groups.io>
2021-10-24 23:43   ` [edk2-devel] [PATCH v11 32/32] UefiCpuPkg/MpInitLib: Use SEV-SNP AP Creation NAE event to launch APs Brijesh Singh
     [not found] ` <16B08DB907104617.16488@groups.io>
2021-10-24 23:43   ` [edk2-devel] [PATCH v11 27/32] UefiCpuPkg/MpInitLib: use BSP to do extended topology check Brijesh Singh
     [not found] ` <16B08DB7BBA673AC.26581@groups.io>
2021-10-24 23:44   ` [edk2-devel] [PATCH v11 23/32] UefiCpuPkg: add PcdGhcbHypervisorFeatures Brijesh Singh

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