From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wr1-f50.google.com (mail-wr1-f50.google.com [209.85.221.50]) by mx.groups.io with SMTP id smtpd.web12.11845.1635253776446391406 for ; Tue, 26 Oct 2021 06:09:36 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@nuviainc-com.20210112.gappssmtp.com header.s=20210112 header.b=dUQC/Gpn; spf=pass (domain: nuviainc.com, ip: 209.85.221.50, mailfrom: leif@nuviainc.com) Received: by mail-wr1-f50.google.com with SMTP id m22so15809694wrb.0 for ; Tue, 26 Oct 2021 06:09:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nuviainc-com.20210112.gappssmtp.com; s=20210112; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=6pAnCb2eBtsZq24ZTJZjq/vbg/QzUaju3ay3i1gfvlA=; b=dUQC/GpnQiIe+ti9WiR6wkXoDZCSkiGX/INSOtAh5DXNj59piXT2tZqt7OcwNmmgLE KZ1VwYhD9a3fir3EWR+X0gMS+wQ5V2+ZRHXCB1lQXeV8XTDG8lyzxZ7KxbDviyrlTNWC ArgvjaWvS8svNB4kBufRJg4HUukz3jlL5p2AT3YslWS1kOfs3XL3OU9Zc0tHdcWtr+JH Tvl2FsIw/JP6pF9tSFDz25MlPBVIHpAed+zQ+0p/8vbnPiWteyBwGJN2R/XxZFx2oUOR GCaygwBcF+fw2amLY1nn2KnGjb+zjpZN7/EGdrxQQxHMzbPw0TGWfqae7T9mwEuBb3M5 9msA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=6pAnCb2eBtsZq24ZTJZjq/vbg/QzUaju3ay3i1gfvlA=; b=kdpdJybV9qpqs7TIw+ebawong4szeC88UhFVHPz3Pxz4Q2p0ordT0Dlq9zJw0Ynbf7 RP+njleHRp8u82IoCQohPk9OFh4lihMq9bv3706HRWCkUfnhPywVb8QaDRtz+821Syqc C7acMj9B/baN+E3gbDgtU15wkOW1x9pwfEWlADI0qz6rrnpdxhKSLqeP4kkGcCMCdQNi VrOVWxid8YHZeMfuZgVxs8PsJgX4QOOJSTjKaHAVjbTijiTaz2iD1pvr2Z5ERduMTwiY 6yIOLye3cURhYJPjhkVkeWYQ87JJXqocWrdJ72WCz3A77IV4swCqUQBsDousrLQxJklV ugbw== X-Gm-Message-State: AOAM530kIr8tvANWYmNXs6cnRd73EsgxAY2jYvMdUWASXC+x8YHZSDTI TwF5u7sGz/HBBNGKzIVGgHujXw== X-Google-Smtp-Source: ABdhPJx9Np57O08yIiCxzCstZHKe5o0pmNXMvYtchdZRrLN35XWwDc/613TQ7BG3lY4z8KQbVtzDng== X-Received: by 2002:a5d:6da9:: with SMTP id u9mr32399547wrs.84.1635253774809; Tue, 26 Oct 2021 06:09:34 -0700 (PDT) Return-Path: Received: from leviathan (cpc92314-cmbg19-2-0-cust559.5-4.cable.virginm.net. [82.11.186.48]) by smtp.gmail.com with ESMTPSA id u16sm568117wmc.21.2021.10.26.06.09.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Oct 2021 06:09:34 -0700 (PDT) Date: Tue, 26 Oct 2021 14:09:32 +0100 From: "Leif Lindholm" To: Vu Nguyen Cc: devel@edk2.groups.io, patches@amperecomputing.com, Ard Biesheuvel , Chuong Tran , Michael D Kinney , Nate DeSimone , Phong Vo , Thang Nguyen Subject: Re: [edk2-non-osi][PATCH v4 0/2] Introduce Silicon/Ampere and AmpereAltraBinPkg package Message-ID: <20211026130932.gzzz3oci6l6m657n@leviathan> References: <20211022055604.19500-1-vunguyen@os.amperecomputing.com> MIME-Version: 1.0 In-Reply-To: <20211022055604.19500-1-vunguyen@os.amperecomputing.com> Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Fri, Oct 22, 2021 at 12:56:02 +0700, Vu Nguyen wrote: > Create edk2-non-osi component holder for Ampere Libraries. This patchset > also adds PciePhyLib which provides function to initialize PCIe PHY on > Ampere Altra processor. > > Commits in this patchset can be found at: > https://github.com/AmpereComputing/edk2-non-osi/tree/add-PciePhyLib > > Cc: Ard Biesheuvel > Cc: Chuong Tran > Cc: Leif Lindholm > Cc: Michael D Kinney > Cc: Nate DeSimone > Cc: Phong Vo > Cc: Thang Nguyen > > Signed-off-by: Vu Nguyen For this series: Reviewed-by: Leif Lindholm (But I'll still hold back on pushing until the main platform port goes in.) / Leif > Change since v3: > Add wrapper function to hide the initialization code. > Update header file. > > Change since v2: > Remove unused macros and function prototypes from the header file. > Rename Ac01BinPkg.dec to AmpereAltraBinPkg.dec. > > Change since v1: > Remove PciePhyLib.lib binary from the commit. > Update header guard to align with coding standard. > > Vu Nguyen (2): > AmpereAltraBinPkg: Add PciePhyLib library > edk2-non-osi: Add AmpereAltraBinPkg maintainers > > Maintainers.txt | 4 +++ > Silicon/Ampere/License.txt | 25 +++++++++++++++++++ > .../AmpereAltraBinPkg/AmpereAltraBinPkg.dec | 16 ++++++++++++ > .../Library/PciePhyLib/PciePhyLib.inf | 23 +++++++++++++++++ > .../Include/Library/PciePhyLib.h | 25 +++++++++++++++++++ > 5 files changed, 93 insertions(+) > create mode 100644 Silicon/Ampere/License.txt > create mode 100644 Silicon/Ampere/AmpereAltraBinPkg/AmpereAltraBinPkg.dec > create mode 100644 Silicon/Ampere/AmpereAltraBinPkg/Library/PciePhyLib/PciePhyLib.inf > create mode 100644 Silicon/Ampere/AmpereAltraBinPkg/Include/Library/PciePhyLib.h > > -- > 2.17.1 >