* [PATCH v6 37/52] SimicsIch10Pkg: Remove PCH SPI SMM Protocol from package
2021-10-28 22:08 [PATCH v6 36/52] KabylakeSiliconPkg: Remove PCH SPI PPI and Protocol from package Michael Kubacki
@ 2021-10-28 22:08 ` Michael Kubacki
2021-10-28 22:08 ` [PATCH v6 38/52] TigerlakeSiliconPkg: Remove PCH SPI PPI and " Michael Kubacki
` (14 subsequent siblings)
15 siblings, 0 replies; 29+ messages in thread
From: Michael Kubacki @ 2021-10-28 22:08 UTC (permalink / raw)
To: devel; +Cc: Agyeman Prince, Nate DeSimone
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
gEfiSmmSpiProtocolGuid is now declared in IntelSiliconPkg.dec. This
change updates Ich10Pkg to remove the protocol declaration in the
package and update libraries and modules to use the protocol from
IntelSiliconPkg.
Cc: Agyeman Prince <prince.agyeman@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c | 24 +-
Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c | 4 +-
Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec | 5 -
Silicon/Intel/SimicsIch10Pkg/Include/Protocol/Spi.h | 295 --------------------
Silicon/Intel/SimicsIch10Pkg/IncludePrivate/Library/PchSpiCommonLib.h | 26 +-
Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpiSmm.inf | 3 +-
6 files changed, 29 insertions(+), 328 deletions(-)
diff --git a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c
index f2907ef53bfc..fc2a8be76b6a 100644
--- a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c
+++ b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c
@@ -158,7 +158,7 @@ PchPmTimerStallRuntimeSafe (
EFI_STATUS
EFIAPI
SpiProtocolFlashRead (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN FLASH_REGION_TYPE FlashRegionType,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -197,7 +197,7 @@ SpiProtocolFlashRead (
EFI_STATUS
EFIAPI
SpiProtocolFlashWrite (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN FLASH_REGION_TYPE FlashRegionType,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -235,7 +235,7 @@ SpiProtocolFlashWrite (
EFI_STATUS
EFIAPI
SpiProtocolFlashErase (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN FLASH_REGION_TYPE FlashRegionType,
IN UINT32 Address,
IN UINT32 ByteCount
@@ -274,7 +274,7 @@ SpiProtocolFlashErase (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadSfdp (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -328,7 +328,7 @@ SpiProtocolFlashReadSfdp (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadJedecId (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 ByteCount,
OUT UINT8 *JedecId
@@ -379,7 +379,7 @@ SpiProtocolFlashReadJedecId (
EFI_STATUS
EFIAPI
SpiProtocolFlashWriteStatus (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN UINT32 ByteCount,
IN UINT8 *StatusValue
)
@@ -414,7 +414,7 @@ SpiProtocolFlashWriteStatus (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadStatus (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN UINT32 ByteCount,
OUT UINT8 *StatusValue
)
@@ -450,7 +450,7 @@ SpiProtocolFlashReadStatus (
EFI_STATUS
EFIAPI
SpiProtocolGetRegionAddress (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN FLASH_REGION_TYPE FlashRegionType,
OUT UINT32 *BaseAddress,
OUT UINT32 *RegionSize
@@ -510,7 +510,7 @@ SpiProtocolGetRegionAddress (
EFI_STATUS
EFIAPI
SpiProtocolReadPchSoftStrap (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -568,7 +568,7 @@ SpiProtocolReadPchSoftStrap (
EFI_STATUS
EFIAPI
SpiProtocolReadCpuSoftStrap (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -626,7 +626,7 @@ SpiProtocolReadCpuSoftStrap (
**/
EFI_STATUS
SendSpiCmd (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN FLASH_REGION_TYPE FlashRegionType,
IN FLASH_CYCLE_TYPE FlashCycleType,
IN UINT32 Address,
@@ -897,7 +897,7 @@ SendSpiCmd (
**/
BOOLEAN
WaitForSpiCycleComplete (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN UINTN PchSpiBar0,
IN BOOLEAN ErrorCheck
)
diff --git a/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c b/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c
index 0baf730a4823..e4a81f91316c 100644
--- a/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c
+++ b/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c
@@ -92,11 +92,11 @@ InstallPchSpi (
return Status;
}
//
- // Install the SMM EFI_SPI_PROTOCOL interface
+ // Install the SMM PCH_SPI_PROTOCOL interface
//
Status = gSmst->SmmInstallProtocolInterface (
&(mSpiInstance->Handle),
- &gEfiSmmSpiProtocolGuid,
+ &gPchSmmSpiProtocolGuid,
EFI_NATIVE_INTERFACE,
&(mSpiInstance->SpiProtocol)
);
diff --git a/Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec b/Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec
index 8d395a8b4370..58850f54e95c 100644
--- a/Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec
+++ b/Silicon/Intel/SimicsIch10Pkg/Ich10Pkg.dec
@@ -13,8 +13,3 @@ [Defines]
[Includes]
Include
-
-[Ppis]
-
-[Protocols]
- gEfiSmmSpiProtocolGuid = {0xbd75fe35, 0xfdce, 0x49d7, {0xa9, 0xdd, 0xb2, 0x6f, 0x1f, 0xc6, 0xb4, 0x37}}
diff --git a/Silicon/Intel/SimicsIch10Pkg/Include/Protocol/Spi.h b/Silicon/Intel/SimicsIch10Pkg/Include/Protocol/Spi.h
deleted file mode 100644
index b0c5b3d0e624..000000000000
--- a/Silicon/Intel/SimicsIch10Pkg/Include/Protocol/Spi.h
+++ /dev/null
@@ -1,295 +0,0 @@
-/** @file
- This file defines the PCH SPI Protocol which implements the
- Intel(R) PCH SPI Host Controller Compatibility Interface.
-
- Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#ifndef _PCH_SPI_PROTOCOL_H_
-#define _PCH_SPI_PROTOCOL_H_
-
-//
-// Extern the GUID for protocol users.
-//
-extern EFI_GUID gEfiSpiProtocolGuid;
-extern EFI_GUID gEfiSmmSpiProtocolGuid;
-
-//
-// Forward reference for ANSI C compatibility
-//
-typedef struct _PCH_SPI_PROTOCOL EFI_SPI_PROTOCOL;
-
-//
-// SPI protocol data structures and definitions
-//
-
-/**
- Flash Region Type
-**/
-typedef enum {
- FlashRegionDescriptor,
- FlashRegionBios,
- FlashRegionMe,
- FlashRegionGbE,
- FlashRegionPlatformData,
- FlashRegionDer,
- FlashRegionAll,
- FlashRegionMax
-} FLASH_REGION_TYPE;
-
-
-//
-// Protocol member functions
-//
-
-/**
- Read data from the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
- @param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
- @param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
- @param[out] Buffer The Pointer to caller-allocated buffer containing the dada received.
- It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_READ) (
- IN EFI_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
- IN UINT32 Address,
- IN UINT32 ByteCount,
- OUT UINT8 *Buffer
- );
-
-/**
- Write data to the flash part. Remark: Erase may be needed before write to the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
- @param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
- @param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
- @param[in] Buffer Pointer to caller-allocated buffer containing the data sent during the SPI cycle.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_WRITE) (
- IN EFI_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
- IN UINT32 Address,
- IN UINT32 ByteCount,
- IN UINT8 *Buffer
- );
-
-/**
- Erase some area on the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
- @param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
- @param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_ERASE) (
- IN EFI_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
- IN UINT32 Address,
- IN UINT32 ByteCount
- );
-
-/**
- Read SFDP data from the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] ComponentNumber The Componen Number for chip select
- @param[in] Address The starting byte address for SFDP data read.
- @param[in] ByteCount Number of bytes in SFDP data portion of the SPI cycle
- @param[out] SfdpData The Pointer to caller-allocated buffer containing the SFDP data received
- It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_READ_SFDP) (
- IN EFI_SPI_PROTOCOL *This,
- IN UINT8 ComponentNumber,
- IN UINT32 Address,
- IN UINT32 ByteCount,
- OUT UINT8 *SfdpData
- );
-
-/**
- Read Jedec Id from the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] ComponentNumber The Componen Number for chip select
- @param[in] ByteCount Number of bytes in JedecId data portion of the SPI cycle, the data size is 3 typically
- @param[out] JedecId The Pointer to caller-allocated buffer containing JEDEC ID received
- It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_READ_JEDEC_ID) (
- IN EFI_SPI_PROTOCOL *This,
- IN UINT8 ComponentNumber,
- IN UINT32 ByteCount,
- OUT UINT8 *JedecId
- );
-
-/**
- Write the status register in the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
- @param[in] StatusValue The Pointer to caller-allocated buffer containing the value of Status register writing
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_WRITE_STATUS) (
- IN EFI_SPI_PROTOCOL *This,
- IN UINT32 ByteCount,
- IN UINT8 *StatusValue
- );
-
-/**
- Read status register in the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
- @param[out] StatusValue The Pointer to caller-allocated buffer containing the value of Status register received.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_READ_STATUS) (
- IN EFI_SPI_PROTOCOL *This,
- IN UINT32 ByteCount,
- OUT UINT8 *StatusValue
- );
-
-/**
- Get the SPI region base and size, based on the enum type
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for for the base address which is listed in the Descriptor.
- @param[out] BaseAddress The Flash Linear Address for the Region 'n' Base
- @param[out] RegionSize The size for the Region 'n'
-
- @retval EFI_SUCCESS Read success
- @retval EFI_INVALID_PARAMETER Invalid region type given
- @retval EFI_DEVICE_ERROR The region is not used
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_GET_REGION_ADDRESS) (
- IN EFI_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
- OUT UINT32 *BaseAddress,
- OUT UINT32 *RegionSize
- );
-
-/**
- Read PCH Soft Strap Values
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA.
- @param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle
- @param[out] SoftStrapValue The Pointer to caller-allocated buffer containing PCH Soft Strap Value.
- If the value of ByteCount is 0, the data type of SoftStrapValue should be UINT16 and SoftStrapValue will be PCH Soft Strap Length
- It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_READ_PCH_SOFTSTRAP) (
- IN EFI_SPI_PROTOCOL *This,
- IN UINT32 SoftStrapAddr,
- IN UINT32 ByteCount,
- OUT VOID *SoftStrapValue
- );
-
-/**
- Read CPU Soft Strap Values
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUSBA.
- @param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle.
- @param[out] SoftStrapValue The Pointer to caller-allocated buffer containing CPU Soft Strap Value.
- If the value of ByteCount is 0, the data type of SoftStrapValue should be UINT16 and SoftStrapValue will be PCH Soft Strap Length
- It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_READ_CPU_SOFTSTRAP) (
- IN EFI_SPI_PROTOCOL *This,
- IN UINT32 SoftStrapAddr,
- IN UINT32 ByteCount,
- OUT VOID *SoftStrapValue
- );
-
-/**
- These protocols/PPI allows a platform module to perform SPI operations through the
- Intel PCH SPI Host Controller Interface.
-**/
-struct _PCH_SPI_PROTOCOL {
- /**
- This member specifies the revision of this structure. This field is used to
- indicate backwards compatible changes to the protocol.
- **/
- UINT8 Revision;
- PCH_SPI_FLASH_READ FlashRead; ///< Read data from the flash part.
- PCH_SPI_FLASH_WRITE FlashWrite; ///< Write data to the flash part. Remark: Erase may be needed before write to the flash part.
- PCH_SPI_FLASH_ERASE FlashErase; ///< Erase some area on the flash part.
- PCH_SPI_FLASH_READ_SFDP FlashReadSfdp; ///< Read SFDP data from the flash part.
- PCH_SPI_FLASH_READ_JEDEC_ID FlashReadJedecId; ///< Read Jedec Id from the flash part.
- PCH_SPI_FLASH_WRITE_STATUS FlashWriteStatus; ///< Write the status register in the flash part.
- PCH_SPI_FLASH_READ_STATUS FlashReadStatus; ///< Read status register in the flash part.
- PCH_SPI_GET_REGION_ADDRESS GetRegionAddress; ///< Get the SPI region base and size
- PCH_SPI_READ_PCH_SOFTSTRAP ReadPchSoftStrap; ///< Read PCH Soft Strap Values
- PCH_SPI_READ_CPU_SOFTSTRAP ReadCpuSoftStrap; ///< Read CPU Soft Strap Values
-};
-
-/**
- PCH SPI PPI/PROTOCOL revision number
-
- Revision 1: Initial version
-**/
-#define PCH_SPI_SERVICES_REVISION 1
-
-#endif
diff --git a/Silicon/Intel/SimicsIch10Pkg/IncludePrivate/Library/PchSpiCommonLib.h b/Silicon/Intel/SimicsIch10Pkg/IncludePrivate/Library/PchSpiCommonLib.h
index cf60f1fd5881..2c8162ac8170 100644
--- a/Silicon/Intel/SimicsIch10Pkg/IncludePrivate/Library/PchSpiCommonLib.h
+++ b/Silicon/Intel/SimicsIch10Pkg/IncludePrivate/Library/PchSpiCommonLib.h
@@ -48,7 +48,7 @@ typedef enum {
typedef struct {
UINT32 Signature;
EFI_HANDLE Handle;
- EFI_SPI_PROTOCOL SpiProtocol;
+ PCH_SPI_PROTOCOL SpiProtocol;
UINT16 PchAcpiBase;
UINTN PchSpiBase;
UINT16 ReadPermission;
@@ -148,7 +148,7 @@ ReleaseSpiBar0 (
EFI_STATUS
EFIAPI
SpiProtocolFlashRead (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN FLASH_REGION_TYPE FlashRegionType,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -171,7 +171,7 @@ SpiProtocolFlashRead (
EFI_STATUS
EFIAPI
SpiProtocolFlashWrite (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN FLASH_REGION_TYPE FlashRegionType,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -193,7 +193,7 @@ SpiProtocolFlashWrite (
EFI_STATUS
EFIAPI
SpiProtocolFlashErase (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN FLASH_REGION_TYPE FlashRegionType,
IN UINT32 Address,
IN UINT32 ByteCount
@@ -216,7 +216,7 @@ SpiProtocolFlashErase (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadSfdp (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -239,7 +239,7 @@ SpiProtocolFlashReadSfdp (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadJedecId (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 ByteCount,
OUT UINT8 *JedecId
@@ -259,7 +259,7 @@ SpiProtocolFlashReadJedecId (
EFI_STATUS
EFIAPI
SpiProtocolFlashWriteStatus (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN UINT32 ByteCount,
IN UINT8 *StatusValue
);
@@ -278,7 +278,7 @@ SpiProtocolFlashWriteStatus (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadStatus (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN UINT32 ByteCount,
OUT UINT8 *StatusValue
);
@@ -298,7 +298,7 @@ SpiProtocolFlashReadStatus (
EFI_STATUS
EFIAPI
SpiProtocolGetRegionAddress (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN FLASH_REGION_TYPE FlashRegionType,
OUT UINT32 *BaseAddress,
OUT UINT32 *RegionSize
@@ -321,7 +321,7 @@ SpiProtocolGetRegionAddress (
EFI_STATUS
EFIAPI
SpiProtocolReadPchSoftStrap (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -344,7 +344,7 @@ SpiProtocolReadPchSoftStrap (
EFI_STATUS
EFIAPI
SpiProtocolReadCpuSoftStrap (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -367,7 +367,7 @@ SpiProtocolReadCpuSoftStrap (
**/
EFI_STATUS
SendSpiCmd (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN FLASH_REGION_TYPE FlashRegionType,
IN FLASH_CYCLE_TYPE FlashCycleType,
IN UINT32 Address,
@@ -388,7 +388,7 @@ SendSpiCmd (
**/
BOOLEAN
WaitForSpiCycleComplete (
- IN EFI_SPI_PROTOCOL *This,
+ IN PCH_SPI_PROTOCOL *This,
IN UINTN PchSpiBar0,
IN BOOLEAN ErrorCheck
);
diff --git a/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpiSmm.inf b/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpiSmm.inf
index 7b60d36c5b9c..35655ed5b5aa 100644
--- a/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpiSmm.inf
+++ b/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpiSmm.inf
@@ -28,6 +28,7 @@ [Defines]
[Packages]
MdePkg/MdePkg.dec
+ IntelSiliconPkg/IntelSiliconPkg.dec
SimicsIch10Pkg/Ich10Pkg.dec
[Sources]
@@ -36,7 +37,7 @@ [Sources]
[Protocols]
- gEfiSmmSpiProtocolGuid # PRODUCES #SERVER_BIOS
+ gPchSmmSpiProtocolGuid # PRODUCES
[Depex]
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 29+ messages in thread* [PATCH v6 38/52] TigerlakeSiliconPkg: Remove PCH SPI PPI and Protocol from package
2021-10-28 22:08 [PATCH v6 36/52] KabylakeSiliconPkg: Remove PCH SPI PPI and Protocol from package Michael Kubacki
2021-10-28 22:08 ` [PATCH v6 37/52] SimicsIch10Pkg: Remove PCH SPI SMM " Michael Kubacki
@ 2021-10-28 22:08 ` Michael Kubacki
2021-10-28 22:08 ` [PATCH v6 39/52] IntelSiliconPkg: Add flash region GUIDs Michael Kubacki
` (13 subsequent siblings)
15 siblings, 0 replies; 29+ messages in thread
From: Michael Kubacki @ 2021-10-28 22:08 UTC (permalink / raw)
To: devel; +Cc: Sai Chaganty, Nate DeSimone, Heng Luo
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
The following PPI and Protocols have moved to IntelSiliconPkg. The
remaining definitions in TigerlakeSiliconPkg are removed and libs/
modules that need to reference IntelSiliconPkg are updated.
1. gPchSpiProtocolGuid
2. gPchSmmSpiProtocolGuid
3. gPchSpiPpiGuid
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Heng Luo <heng.luo@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
Silicon/Intel/TigerlakeSiliconPkg/Include/Protocol/Spi.h | 301 --------------------
Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/BaseSpiCommonLib.inf | 1 +
Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf | 1 +
Silicon/Intel/TigerlakeSiliconPkg/Pch/PchInit/Dxe/PchInitDxeTgl.inf | 1 +
Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec | 3 -
5 files changed, 3 insertions(+), 304 deletions(-)
diff --git a/Silicon/Intel/TigerlakeSiliconPkg/Include/Protocol/Spi.h b/Silicon/Intel/TigerlakeSiliconPkg/Include/Protocol/Spi.h
deleted file mode 100644
index c13dc5a5f5f5..000000000000
--- a/Silicon/Intel/TigerlakeSiliconPkg/Include/Protocol/Spi.h
+++ /dev/null
@@ -1,301 +0,0 @@
-/** @file
- This file defines the PCH SPI Protocol which implements the
- Intel(R) PCH SPI Host Controller Compatibility Interface.
-
- Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-#ifndef _PCH_SPI_PROTOCOL_H_
-#define _PCH_SPI_PROTOCOL_H_
-
-//
-// Extern the GUID for protocol users.
-//
-extern EFI_GUID gPchSpiProtocolGuid;
-extern EFI_GUID gPchSmmSpiProtocolGuid;
-
-//
-// Forward reference for ANSI C compatibility
-//
-typedef struct _PCH_SPI_PROTOCOL PCH_SPI_PROTOCOL;
-
-//
-// SPI protocol data structures and definitions
-//
-
-/**
- Flash Region Type
-**/
-typedef enum {
- FlashRegionDescriptor,
- FlashRegionBios,
- FlashRegionMe,
- FlashRegionGbE,
- FlashRegionPlatformData,
- FlashRegionDer,
- FlashRegionSecondaryBios,
- FlashRegionuCodePatch,
- FlashRegionEC,
- FlashRegionDeviceExpansion2,
- FlashRegionIE,
- FlashRegion10Gbe_A,
- FlashRegion10Gbe_B,
- FlashRegion13,
- FlashRegion14,
- FlashRegion15,
- FlashRegionAll,
- FlashRegionMax
-} FLASH_REGION_TYPE;
-//
-// Protocol member functions
-//
-
-/**
- Read data from the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
- @param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
- @param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
- @param[out] Buffer The Pointer to caller-allocated buffer containing the dada received.
- It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_READ) (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
- IN UINT32 Address,
- IN UINT32 ByteCount,
- OUT UINT8 *Buffer
- );
-
-/**
- Write data to the flash part. Remark: Erase may be needed before write to the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
- @param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
- @param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
- @param[in] Buffer Pointer to caller-allocated buffer containing the data sent during the SPI cycle.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_WRITE) (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
- IN UINT32 Address,
- IN UINT32 ByteCount,
- IN UINT8 *Buffer
- );
-
-/**
- Erase some area on the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
- @param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
- @param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_ERASE) (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
- IN UINT32 Address,
- IN UINT32 ByteCount
- );
-
-/**
- Read SFDP data from the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] ComponentNumber The Componen Number for chip select
- @param[in] Address The starting byte address for SFDP data read.
- @param[in] ByteCount Number of bytes in SFDP data portion of the SPI cycle
- @param[out] SfdpData The Pointer to caller-allocated buffer containing the SFDP data received
- It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_READ_SFDP) (
- IN PCH_SPI_PROTOCOL *This,
- IN UINT8 ComponentNumber,
- IN UINT32 Address,
- IN UINT32 ByteCount,
- OUT UINT8 *SfdpData
- );
-
-/**
- Read Jedec Id from the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] ComponentNumber The Componen Number for chip select
- @param[in] ByteCount Number of bytes in JedecId data portion of the SPI cycle, the data size is 3 typically
- @param[out] JedecId The Pointer to caller-allocated buffer containing JEDEC ID received
- It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_READ_JEDEC_ID) (
- IN PCH_SPI_PROTOCOL *This,
- IN UINT8 ComponentNumber,
- IN UINT32 ByteCount,
- OUT UINT8 *JedecId
- );
-
-/**
- Write the status register in the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
- @param[in] StatusValue The Pointer to caller-allocated buffer containing the value of Status register writing
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_WRITE_STATUS) (
- IN PCH_SPI_PROTOCOL *This,
- IN UINT32 ByteCount,
- IN UINT8 *StatusValue
- );
-
-/**
- Read status register in the flash part.
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
- @param[out] StatusValue The Pointer to caller-allocated buffer containing the value of Status register received.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_FLASH_READ_STATUS) (
- IN PCH_SPI_PROTOCOL *This,
- IN UINT32 ByteCount,
- OUT UINT8 *StatusValue
- );
-
-/**
- Get the SPI region base and size, based on the enum type
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for for the base address which is listed in the Descriptor.
- @param[out] BaseAddress The Flash Linear Address for the Region 'n' Base
- @param[out] RegionSize The size for the Region 'n'
-
- @retval EFI_SUCCESS Read success
- @retval EFI_INVALID_PARAMETER Invalid region type given
- @retval EFI_DEVICE_ERROR The region is not used
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_GET_REGION_ADDRESS) (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
- OUT UINT32 *BaseAddress,
- OUT UINT32 *RegionSize
- );
-
-/**
- Read PCH Soft Strap Values
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA.
- @param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle
- @param[out] SoftStrapValue The Pointer to caller-allocated buffer containing PCH Soft Strap Value.
- If the value of ByteCount is 0, the data type of SoftStrapValue should be UINT16 and SoftStrapValue will be PCH Soft Strap Length
- It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_READ_PCH_SOFTSTRAP) (
- IN PCH_SPI_PROTOCOL *This,
- IN UINT32 SoftStrapAddr,
- IN UINT32 ByteCount,
- OUT VOID *SoftStrapValue
- );
-
-/**
- Read CPU Soft Strap Values
-
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUSBA.
- @param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle.
- @param[out] SoftStrapValue The Pointer to caller-allocated buffer containing CPU Soft Strap Value.
- If the value of ByteCount is 0, the data type of SoftStrapValue should be UINT16 and SoftStrapValue will be PCH Soft Strap Length
- It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
-
- @retval EFI_SUCCESS Command succeed.
- @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
- @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *PCH_SPI_READ_CPU_SOFTSTRAP) (
- IN PCH_SPI_PROTOCOL *This,
- IN UINT32 SoftStrapAddr,
- IN UINT32 ByteCount,
- OUT VOID *SoftStrapValue
- );
-
-/**
- These protocols/PPI allows a platform module to perform SPI operations through the
- Intel PCH SPI Host Controller Interface.
-**/
-struct _PCH_SPI_PROTOCOL {
- /**
- This member specifies the revision of this structure. This field is used to
- indicate backwards compatible changes to the protocol.
- **/
- UINT8 Revision;
- PCH_SPI_FLASH_READ FlashRead; ///< Read data from the flash part.
- PCH_SPI_FLASH_WRITE FlashWrite; ///< Write data to the flash part. Remark: Erase may be needed before write to the flash part.
- PCH_SPI_FLASH_ERASE FlashErase; ///< Erase some area on the flash part.
- PCH_SPI_FLASH_READ_SFDP FlashReadSfdp; ///< Read SFDP data from the flash part.
- PCH_SPI_FLASH_READ_JEDEC_ID FlashReadJedecId; ///< Read Jedec Id from the flash part.
- PCH_SPI_FLASH_WRITE_STATUS FlashWriteStatus; ///< Write the status register in the flash part.
- PCH_SPI_FLASH_READ_STATUS FlashReadStatus; ///< Read status register in the flash part.
- PCH_SPI_GET_REGION_ADDRESS GetRegionAddress; ///< Get the SPI region base and size
- PCH_SPI_READ_PCH_SOFTSTRAP ReadPchSoftStrap; ///< Read PCH Soft Strap Values
- PCH_SPI_READ_CPU_SOFTSTRAP ReadCpuSoftStrap; ///< Read CPU Soft Strap Values
-};
-
-/**
- PCH SPI PPI/PROTOCOL revision number
-
- Revision 1: Initial version
-**/
-#define PCH_SPI_SERVICES_REVISION 1
-
-#endif
diff --git a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/BaseSpiCommonLib.inf b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/BaseSpiCommonLib.inf
index a1a54677457e..2686dff41e25 100644
--- a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/BaseSpiCommonLib.inf
+++ b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/BaseSpiCommonLib.inf
@@ -19,6 +19,7 @@ [Sources]
[Packages]
MdePkg/MdePkg.dec
+ IntelSiliconPkg/IntelSiliconPkg.dec
TigerlakeSiliconPkg/SiPkg.dec
[LibraryClasses]
diff --git a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf
index 033134cea171..f64b84880b31 100644
--- a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf
+++ b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf
@@ -30,6 +30,7 @@ [LibraryClasses]
[Packages]
MdePkg/MdePkg.dec
+IntelSiliconPkg/IntelSiliconPkg.dec
TigerlakeSiliconPkg/SiPkg.dec
diff --git a/Silicon/Intel/TigerlakeSiliconPkg/Pch/PchInit/Dxe/PchInitDxeTgl.inf b/Silicon/Intel/TigerlakeSiliconPkg/Pch/PchInit/Dxe/PchInitDxeTgl.inf
index 4941ff0f498d..95182e50651e 100644
--- a/Silicon/Intel/TigerlakeSiliconPkg/Pch/PchInit/Dxe/PchInitDxeTgl.inf
+++ b/Silicon/Intel/TigerlakeSiliconPkg/Pch/PchInit/Dxe/PchInitDxeTgl.inf
@@ -49,6 +49,7 @@ [LibraryClasses]
[Packages]
MdePkg/MdePkg.dec
+IntelSiliconPkg/IntelSiliconPkg.dec
TigerlakeSiliconPkg/SiPkg.dec
diff --git a/Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec b/Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec
index 37f61cc5ee18..7cdbb3748155 100644
--- a/Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec
+++ b/Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec
@@ -624,11 +624,9 @@ [Protocols]
## PCH
##
gThcProtocolGuid = {0x00860921, 0x7B9B, 0x4EA8, {0xAD, 0x23, 0x3C, 0xCA, 0x33, 0x9E, 0x7D, 0xFE}}
-gPchSpiProtocolGuid = {0xc7d289, 0x1347, 0x4de0, {0xbf, 0x42, 0xe, 0x26, 0x9d, 0xe, 0xf3, 0x4a}}
gWdtProtocolGuid = {0xb42b8d12, 0x2acb, 0x499a, {0xa9, 0x20, 0xdd, 0x5b, 0xe6, 0xcf, 0x09, 0xb1}}
gPchSerialIoUartDebugInfoProtocolGuid = {0x2fd2b1bd, 0x0387, 0x4ec6, {0x94, 0x1f, 0xf1, 0x4b, 0x7f, 0x1c, 0x94, 0xb6}}
gEfiSmmSmbusProtocolGuid = {0x72e40094, 0x2ee1, 0x497a, {0x8f, 0x33, 0x4c, 0x93, 0x4a, 0x9e, 0x9c, 0x0c}}
-gPchSmmSpiProtocolGuid = {0x56521f06, 0xa62, 0x4822, {0x99, 0x63, 0xdf, 0x1, 0x9d, 0x72, 0xc7, 0xe1}}
gPchSmmIoTrapControlGuid = {0x514d2afd, 0x2096, 0x4283, {0x9d, 0xa6, 0x70, 0x0c, 0xd2, 0x7d, 0xc7, 0xa5}}
gPchTcoSmiDispatchProtocolGuid = {0x9e71d609, 0x6d24, 0x47fd, {0xb5, 0x72, 0x61, 0x40, 0xf8, 0xd9, 0xc2, 0xa4}}
gPchPcieSmiDispatchProtocolGuid = {0x3e7d2b56, 0x3f47, 0x42aa, {0x8f, 0x6b, 0x22, 0xf5, 0x19, 0x81, 0x8d, 0xab}}
@@ -751,7 +749,6 @@ [Ppis]
## PCH
##
gWdtPpiGuid = {0xf38d1338, 0xaf7a, 0x4fb6, {0x91, 0xdb, 0x1a, 0x9c, 0x21, 0x83, 0x57, 0x0d}}
-gPchSpiPpiGuid = {0xdade7ce3, 0x6971, 0x4b75, {0x82, 0x5e, 0xe, 0xe0, 0xeb, 0x17, 0x72, 0x2d}}
gPeiSmbusPolicyPpiGuid = {0x63b6e435, 0x32bc, 0x49c6, {0x81, 0xbd, 0xb7, 0xa1, 0xa0, 0xfe, 0x1a, 0x6c}}
##
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 29+ messages in thread* [PATCH v6 39/52] IntelSiliconPkg: Add flash region GUIDs
2021-10-28 22:08 [PATCH v6 36/52] KabylakeSiliconPkg: Remove PCH SPI PPI and Protocol from package Michael Kubacki
2021-10-28 22:08 ` [PATCH v6 37/52] SimicsIch10Pkg: Remove PCH SPI SMM " Michael Kubacki
2021-10-28 22:08 ` [PATCH v6 38/52] TigerlakeSiliconPkg: Remove PCH SPI PPI and " Michael Kubacki
@ 2021-10-28 22:08 ` Michael Kubacki
2021-10-28 22:08 ` [PATCH v6 40/52] IntelSiliconPkg: Identify flash regions by GUID Michael Kubacki
` (12 subsequent siblings)
15 siblings, 0 replies; 29+ messages in thread
From: Michael Kubacki @ 2021-10-28 22:08 UTC (permalink / raw)
To: devel; +Cc: Ray Ni, Rangasai V Chaganty, Nate DeSimone
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
This change identifies flash regions by GUID instead of fixed values
since the flash region identifiers are now defined in IntelSiliconPkg
and different boards may want to associate a flash region identifier
with a board/platform specific value.
The flash region GUIDs are intended to provide identifier consistency
across board implementations improving portability of the code among
IntelSiliconPkg consumers.
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Sai Chaganty <rangasai.v.chaganty@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
Silicon/Intel/IntelSiliconPkg/Include/Guid/FlashRegion.h | 45 ++++++++++++++++++++
Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 18 ++++++++
2 files changed, 63 insertions(+)
diff --git a/Silicon/Intel/IntelSiliconPkg/Include/Guid/FlashRegion.h b/Silicon/Intel/IntelSiliconPkg/Include/Guid/FlashRegion.h
new file mode 100644
index 000000000000..5585ed710ef4
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Include/Guid/FlashRegion.h
@@ -0,0 +1,45 @@
+/** @file
+
+ Flash region GUID definitions.
+
+ Copyright (c) Microsoft Corporation.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef __FLASH_REGION_H__
+#define __FLASH_REGION_H__
+
+#define FLASH_REGION_DESCRIPTOR_GUID { 0xaf90c5d8, 0xb8d1, 0x4cc2, {0xbb, 0xc1, 0xc9, 0xeb, 0x51, 0x2d, 0x2f, 0x82 } }
+#define FLASH_REGION_BIOS_GUID { 0x6fe65e44, 0x00fc, 0x4ae7, {0xb7, 0x61, 0xb4, 0x8f, 0x17, 0x0f, 0x4d, 0x85 } }
+#define FLASH_REGION_ME_GUID { 0xebbfcd3f, 0xe8de, 0x40c1, {0x9c, 0xfd, 0xd3, 0x4e, 0x36, 0xdc, 0x0d, 0xe4 } }
+#define FLASH_REGION_GBE_GUID { 0x79d11264, 0xed7a, 0x4556, {0xaf, 0xeb, 0x4b, 0x23, 0x93, 0x9c, 0x88, 0xe7 } }
+#define FLASH_REGION_PLATFORM_DATA_GUID { 0x4330a7d5, 0xad54, 0x456a, {0x8f, 0xe1, 0xea, 0x4f, 0xa1, 0xbe, 0x58, 0xd0 } }
+#define FLASH_REGION_DER_GUID { 0x83014a66, 0xfd0b, 0x4049, {0xb3, 0xf7, 0x85, 0x6c, 0x26, 0xbb, 0xb4, 0x34 } }
+#define FLASH_REGION_SECONDARY_BIOS_GUID { 0x993382b4, 0x5a43, 0x4cb0, {0xba, 0x77, 0x06, 0xb9, 0x16, 0xc5, 0x6a, 0x18 } }
+#define FLASH_REGION_MICROCODE_PATCH_GUID { 0x3e97eeeb, 0xc5f7, 0x4af6, {0xa8, 0x61, 0x22, 0xfd, 0x8d, 0x8c, 0xa1, 0x84 } }
+#define FLASH_REGION_EC_GUID { 0x55a62589, 0x1b0c, 0x43ad, {0x91, 0xe2, 0x6f, 0xcc, 0x08, 0xc6, 0x9b, 0x75 } }
+#define FLASH_REGION_DEVICE_EXPANSION_GUID { 0x0dc8f30b, 0x472b, 0x48cc, {0xbd, 0x22, 0xe2, 0x7c, 0xfe, 0xc2, 0xc3, 0x7e } }
+#define FLASH_REGION_IE_GUID { 0xf930a983, 0xb72e, 0x41cc, {0x98, 0x1a, 0x2c, 0x60, 0x6b, 0xf5, 0x7e, 0xdb } }
+#define FLASH_REGION_10GBE_A_GUID { 0xde09e662, 0x831f, 0x4ace, {0x9a, 0x06, 0x31, 0x7c, 0xcd, 0x9c, 0x38, 0x3e } }
+#define FLASH_REGION_10GBE_B_GUID { 0x7776d88b, 0x48cb, 0x42a4, {0xb5, 0x93, 0x9b, 0x50, 0x9c, 0x8e, 0xd2, 0xae } }
+#define FLASH_REGION_ALL_GUID { 0xbabe60dc, 0xf88d, 0x4584, {0x9e, 0x54, 0x57, 0x44, 0x4b, 0xe2, 0x6e, 0xf3 } }
+#define FLASH_REGION_MAX_GUID { 0x74c2e3c1, 0x8faa, 0x4659, {0xa7, 0xbb, 0x87, 0x1f, 0xbb, 0x61, 0xd3, 0xb4 } }
+
+extern EFI_GUID gFlashRegionDescriptorGuid;
+extern EFI_GUID gFlashRegionBiosGuid;
+extern EFI_GUID gFlashRegionMeGuid;
+extern EFI_GUID gFlashRegionGbeGuid;
+extern EFI_GUID gFlashRegionPlatformDataGuid;
+extern EFI_GUID gFlashRegionDerGuid;
+extern EFI_GUID gFlashRegionSecondaryBiosGuid;
+extern EFI_GUID gFlashRegionMicrocodePatchGuid;
+extern EFI_GUID gFlashRegionEcGuid;
+extern EFI_GUID gFlashRegionDeviceExpansion2Guid;
+extern EFI_GUID gFlashRegionIeGuid;
+extern EFI_GUID gFlashRegion10GbeAGuid;
+extern EFI_GUID gFlashRegion10GbeBGuid;
+extern EFI_GUID gFlashRegionAllGuid;
+extern EFI_GUID gFlashRegionMaxGuid;
+
+#endif
diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
index e71e7b3421cd..c92d5ee64755 100644
--- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
+++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
@@ -4,6 +4,7 @@
# This package provides common open source Intel silicon modules.
#
# Copyright (c) 2016 - 2021, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) Microsoft Corporation.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -74,6 +75,23 @@ [Guids]
## Include/Guid/MicrocodeShadowInfoHob.h
gEdkiiMicrocodeStorageTypeFlashGuid = { 0x2cba01b3, 0xd391, 0x4598, { 0x8d, 0x89, 0xb7, 0xfc, 0x39, 0x22, 0xfd, 0x71 } }
+ ## Include/Guid/FlashRegion.h
+ gFlashRegionDescriptorGuid = { 0xaf90c5d8, 0xb8d1, 0x4cc2, {0xbb, 0xc1, 0xc9, 0xeb, 0x51, 0x2d, 0x2f, 0x82 } }
+ gFlashRegionBiosGuid = { 0x6fe65e44, 0x00fc, 0x4ae7, {0xb7, 0x61, 0xb4, 0x8f, 0x17, 0x0f, 0x4d, 0x85 } }
+ gFlashRegionMeGuid = { 0xebbfcd3f, 0xe8de, 0x40c1, {0x9c, 0xfd, 0xd3, 0x4e, 0x36, 0xdc, 0x0d, 0xe4 } }
+ gFlashRegionGbeGuid = { 0x79d11264, 0xed7a, 0x4556, {0xaf, 0xeb, 0x4b, 0x23, 0x93, 0x9c, 0x88, 0xe7 } }
+ gFlashRegionPlatformDataGuid = { 0x4330a7d5, 0xad54, 0x456a, {0x8f, 0xe1, 0xea, 0x4f, 0xa1, 0xbe, 0x58, 0xd0 } }
+ gFlashRegionDerGuid = { 0x83014a66, 0xfd0b, 0x4049, {0xb3, 0xf7, 0x85, 0x6c, 0x26, 0xbb, 0xb4, 0x34 } }
+ gFlashRegionSecondaryBiosGuid = { 0x993382b4, 0x5a43, 0x4cb0, {0xba, 0x77, 0x06, 0xb9, 0x16, 0xc5, 0x6a, 0x18 } }
+ gFlashRegionMicrocodePatchGuid = { 0x3e97eeeb, 0xc5f7, 0x4af6, {0xa8, 0x61, 0x22, 0xfd, 0x8d, 0x8c, 0xa1, 0x84 } }
+ gFlashRegionEcGuid = { 0x55a62589, 0x1b0c, 0x43ad, {0x91, 0xe2, 0x6f, 0xcc, 0x08, 0xc6, 0x9b, 0x75 } }
+ gFlashRegionDeviceExpansionGuid = { 0x0dc8f30b, 0x472b, 0x48cc, {0xbd, 0x22, 0xe2, 0x7c, 0xfe, 0xc2, 0xc3, 0x7e } }
+ gFlashRegionIeGuid = { 0xf930a983, 0xb72e, 0x41cc, {0x98, 0x1a, 0x2c, 0x60, 0x6b, 0xf5, 0x7e, 0xdb } }
+ gFlashRegion10GbeAGuid = { 0xde09e662, 0x831f, 0x4ace, {0x9a, 0x06, 0x31, 0x7c, 0xcd, 0x9c, 0x38, 0x3e } }
+ gFlashRegion10GbeBGuid = { 0x7776d88b, 0x48cb, 0x42a4, {0xb5, 0x93, 0x9b, 0x50, 0x9c, 0x8e, 0xd2, 0xae } }
+ gFlashRegionAllGuid = { 0xbabe60dc, 0xf88d, 0x4584, {0x9e, 0x54, 0x57, 0x44, 0x4b, 0xe2, 0x6e, 0xf3 } }
+ gFlashRegionMaxGuid = { 0x74c2e3c1, 0x8faa, 0x4659, {0xa7, 0xbb, 0x87, 0x1f, 0xbb, 0x61, 0xd3, 0xb4 } }
+
[Ppis]
## Include/Ppi/Spi.h
gPchSpiPpiGuid = { 0x104c7177, 0xc2e6, 0x44f0, { 0xae, 0xe3, 0x9d, 0x0d, 0x9a, 0x52, 0xca, 0xdf } }
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 29+ messages in thread* [PATCH v6 40/52] IntelSiliconPkg: Identify flash regions by GUID
2021-10-28 22:08 [PATCH v6 36/52] KabylakeSiliconPkg: Remove PCH SPI PPI and Protocol from package Michael Kubacki
` (2 preceding siblings ...)
2021-10-28 22:08 ` [PATCH v6 39/52] IntelSiliconPkg: Add flash region GUIDs Michael Kubacki
@ 2021-10-28 22:08 ` Michael Kubacki
2021-10-28 22:08 ` [PATCH v6 41/52] CoffeelakeSiliconPkg/BasePchSpiCommonLib: " Michael Kubacki
` (11 subsequent siblings)
15 siblings, 0 replies; 29+ messages in thread
From: Michael Kubacki @ 2021-10-28 22:08 UTC (permalink / raw)
To: devel; +Cc: Ray Ni, Rangasai V Chaganty, Nate DeSimone
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Adds a new SPI 2 protocol (and corresponding PPI) that identify
flash regions by GUID instead of fixed values defined in an enum.
Packages consuming IntelSiliconPkg are able to associate a given
GUID with their chosen values based on their SPI flash details as
implemented in their PCH_SPI2_PROTOCOL instance.
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Sai Chaganty <rangasai.v.chaganty@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.c | 16 +-
Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c | 32 +--
Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi2.h | 31 +++
Silicon/Intel/IntelSiliconPkg/Include/Protocol/Spi2.h | 283 ++++++++++++++++++++
Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 8 +
Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf | 7 +-
6 files changed, 352 insertions(+), 25 deletions(-)
diff --git a/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.c b/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.c
index 7941b8f8720c..c4c08cac1272 100644
--- a/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.c
+++ b/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.c
@@ -2,21 +2,23 @@
SMM Library instance of SPI Flash Common Library Class
Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) Microsoft Corporation.<BR>
+
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <Library/SmmServicesTableLib.h>
-#include <Protocol/Spi.h>
+#include <Protocol/Spi2.h>
#include <Library/DebugLib.h>
-extern PCH_SPI_PROTOCOL *mSpiProtocol;
+extern PCH_SPI2_PROTOCOL *mSpi2Protocol;
extern UINTN mBiosAreaBaseAddress;
extern UINTN mBiosSize;
extern UINTN mBiosOffset;
/**
- The library constructuor.
+ The library constructor.
The function does the necessary initialization work for this library
instance.
@@ -43,16 +45,16 @@ SmmSpiFlashCommonLibConstructor (
mBiosSize = (UINTN)PcdGet32 (PcdBiosSize);
//
- // Locate the SMM SPI protocol.
+ // Locate the SMM SPI2 protocol.
//
Status = gSmst->SmmLocateProtocol (
- &gPchSmmSpiProtocolGuid,
+ &gPchSmmSpi2ProtocolGuid,
NULL,
- (VOID **) &mSpiProtocol
+ (VOID **) &mSpi2Protocol
);
ASSERT_EFI_ERROR (Status);
- mSpiProtocol->GetRegionAddress (mSpiProtocol, FlashRegionBios, &BaseAddr, &RegionSize);
+ mSpi2Protocol->GetRegionAddress (mSpi2Protocol, &gFlashRegionBiosGuid, &BaseAddr, &RegionSize);
mBiosOffset = BaseAddr;
return Status;
}
diff --git a/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c b/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
index daebaf8e5e33..826bebdc91f6 100644
--- a/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
+++ b/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c
@@ -1,5 +1,5 @@
/** @file
- Wrap PCH_SPI_PROTOCOL to provide some library level interfaces
+ Wrap PCH_SPI2_PROTOCOL to provide some library level interfaces
for module use.
Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
@@ -8,9 +8,9 @@
#include <Library/SpiFlashCommonLib.h>
#include <Library/IoLib.h>
-#include <Protocol/Spi.h>
+#include <Protocol/Spi2.h>
-PCH_SPI_PROTOCOL *mSpiProtocol;
+PCH_SPI2_PROTOCOL *mSpi2Protocol;
//
// Variables for boottime and runtime usage.
@@ -125,13 +125,13 @@ SpiFlashWrite (
} else {
Length = RemainingBytes;
}
- Status = mSpiProtocol->FlashWrite (
- mSpiProtocol,
- FlashRegionBios,
- (UINT32) Offset,
- Length,
- Buffer
- );
+ Status = mSpi2Protocol->FlashWrite (
+ mSpi2Protocol,
+ &gFlashRegionBiosGuid,
+ (UINT32) Offset,
+ Length,
+ Buffer
+ );
if (EFI_ERROR (Status)) {
break;
}
@@ -199,11 +199,11 @@ SpiFlashBlockErase (
RemainingBytes = *NumBytes;
- Status = mSpiProtocol->FlashErase (
- mSpiProtocol,
- FlashRegionBios,
- (UINT32) Offset,
- (UINT32) RemainingBytes
- );
+ Status = mSpi2Protocol->FlashErase (
+ mSpi2Protocol,
+ &gFlashRegionBiosGuid,
+ (UINT32) Offset,
+ (UINT32) RemainingBytes
+ );
return Status;
}
diff --git a/Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi2.h b/Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi2.h
new file mode 100644
index 000000000000..55879b36ad0c
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi2.h
@@ -0,0 +1,31 @@
+/** @file
+ This file defines the PCH SPI2 PPI which implements the
+ Intel(R) PCH SPI Host Controller Compatibility Interface.
+
+ This SPI Protocol differs from the PCH SPI 1 Protocol interface
+ primarily by identifying SPI flash regions by GUID instead
+ of numeric values.
+
+ Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) Microsoft Corporation.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+#ifndef _PCH_SPI2_PPI_H_
+#define _PCH_SPI2_PPI_H_
+
+#include <Protocol/Spi2.h>
+
+//
+// Extern the GUID for PPI users.
+//
+extern EFI_GUID gPchSpi2PpiGuid;
+
+/**
+ Reuse the PCH_SPI2_PROTOCOL definitions
+ This is possible because the PPI implementation does not rely on a PeiService pointer,
+ as it uses EDKII Glue Lib to do IO accesses
+**/
+typedef PCH_SPI2_PROTOCOL PCH_SPI2_PPI;
+
+#endif
diff --git a/Silicon/Intel/IntelSiliconPkg/Include/Protocol/Spi2.h b/Silicon/Intel/IntelSiliconPkg/Include/Protocol/Spi2.h
new file mode 100644
index 000000000000..1672cfacf7b0
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Include/Protocol/Spi2.h
@@ -0,0 +1,283 @@
+/** @file
+ This file defines the PCH SPI 2 Protocol which implements the
+ Intel(R) PCH SPI Host Controller Compatibility Interface.
+
+ This SPI Protocol differs from the PCH SPI 1 Protocol interface
+ primarily by identifying SPI flash regions by GUID instead
+ of numeric values.
+
+ Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) Microsoft Corporation.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+#ifndef _PCH_SPI2_PROTOCOL_H_
+#define _PCH_SPI2_PROTOCOL_H_
+
+//
+// Extern the GUID for protocol users.
+//
+extern EFI_GUID gPchSpi2ProtocolGuid;
+extern EFI_GUID gPchSmmSpi2ProtocolGuid;
+
+//
+// Forward reference for ANSI C compatibility
+//
+typedef struct _PCH_SPI2_PROTOCOL PCH_SPI2_PROTOCOL;
+
+//
+// Protocol member functions
+//
+
+/**
+ Read data from the flash part.
+
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
+ @param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
+ @param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
+ @param[out] Buffer The Pointer to caller-allocated buffer containing the dada received.
+ It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
+
+ @retval EFI_SUCCESS Command succeed.
+ @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
+ @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PCH_SPI_FLASH_READ) (
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
+ IN UINT32 Address,
+ IN UINT32 ByteCount,
+ OUT UINT8 *Buffer
+ );
+
+/**
+ Write data to the flash part. Remark: Erase may be needed before write to the flash part.
+
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
+ @param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
+ @param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
+ @param[in] Buffer Pointer to caller-allocated buffer containing the data sent during the SPI cycle.
+
+ @retval EFI_SUCCESS Command succeed.
+ @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
+ @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PCH_SPI_FLASH_WRITE) (
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
+ IN UINT32 Address,
+ IN UINT32 ByteCount,
+ IN UINT8 *Buffer
+ );
+
+/**
+ Erase some area on the flash part.
+
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
+ @param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
+ @param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
+
+ @retval EFI_SUCCESS Command succeed.
+ @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
+ @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PCH_SPI_FLASH_ERASE) (
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
+ IN UINT32 Address,
+ IN UINT32 ByteCount
+ );
+
+/**
+ Read SFDP data from the flash part.
+
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] ComponentNumber The Component Number for chip select
+ @param[in] Address The starting byte address for SFDP data read.
+ @param[in] ByteCount Number of bytes in SFDP data portion of the SPI cycle
+ @param[out] SfdpData The Pointer to caller-allocated buffer containing the SFDP data received
+ It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read
+
+ @retval EFI_SUCCESS Command succeed.
+ @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
+ @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PCH_SPI_FLASH_READ_SFDP) (
+ IN PCH_SPI2_PROTOCOL *This,
+ IN UINT8 ComponentNumber,
+ IN UINT32 Address,
+ IN UINT32 ByteCount,
+ OUT UINT8 *SfdpData
+ );
+
+/**
+ Read Jedec Id from the flash part.
+
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] ComponentNumber The Component Number for chip select
+ @param[in] ByteCount Number of bytes in JedecId data portion of the SPI cycle, the data size is 3 typically
+ @param[out] JedecId The Pointer to caller-allocated buffer containing JEDEC ID received
+ It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
+
+ @retval EFI_SUCCESS Command succeed.
+ @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
+ @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PCH_SPI_FLASH_READ_JEDEC_ID) (
+ IN PCH_SPI2_PROTOCOL *This,
+ IN UINT8 ComponentNumber,
+ IN UINT32 ByteCount,
+ OUT UINT8 *JedecId
+ );
+
+/**
+ Write the status register in the flash part.
+
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
+ @param[in] StatusValue The Pointer to caller-allocated buffer containing the value of Status register writing
+
+ @retval EFI_SUCCESS Command succeed.
+ @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
+ @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PCH_SPI_FLASH_WRITE_STATUS) (
+ IN PCH_SPI2_PROTOCOL *This,
+ IN UINT32 ByteCount,
+ IN UINT8 *StatusValue
+ );
+
+/**
+ Read status register in the flash part.
+
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
+ @param[out] StatusValue The Pointer to caller-allocated buffer containing the value of Status register received.
+
+ @retval EFI_SUCCESS Command succeed.
+ @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
+ @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PCH_SPI_FLASH_READ_STATUS) (
+ IN PCH_SPI2_PROTOCOL *This,
+ IN UINT32 ByteCount,
+ OUT UINT8 *StatusValue
+ );
+
+/**
+ Get the SPI region base and size, based on the enum type
+
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
+ @param[out] BaseAddress The Flash Linear Address for the Region 'n' Base
+ @param[out] RegionSize The size for the Region 'n'
+
+ @retval EFI_SUCCESS Read success
+ @retval EFI_INVALID_PARAMETER Invalid region type given
+ @retval EFI_DEVICE_ERROR The region is not used
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PCH_SPI_GET_REGION_ADDRESS) (
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
+ OUT UINT32 *BaseAddress,
+ OUT UINT32 *RegionSize
+ );
+
+/**
+ Read PCH Soft Strap Values
+
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA.
+ @param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle
+ @param[out] SoftStrapValue The Pointer to caller-allocated buffer containing PCH Soft Strap Value.
+ If the value of ByteCount is 0, the data type of SoftStrapValue should be UINT16 and SoftStrapValue will be PCH Soft Strap Length
+ It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
+
+ @retval EFI_SUCCESS Command succeed.
+ @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
+ @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PCH_SPI_READ_PCH_SOFTSTRAP) (
+ IN PCH_SPI2_PROTOCOL *This,
+ IN UINT32 SoftStrapAddr,
+ IN UINT32 ByteCount,
+ OUT VOID *SoftStrapValue
+ );
+
+/**
+ Read CPU Soft Strap Values
+
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUSBA.
+ @param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle.
+ @param[out] SoftStrapValue The Pointer to caller-allocated buffer containing CPU Soft Strap Value.
+ If the value of ByteCount is 0, the data type of SoftStrapValue should be UINT16 and SoftStrapValue will be PCH Soft Strap Length
+ It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
+
+ @retval EFI_SUCCESS Command succeed.
+ @retval EFI_INVALID_PARAMETER The parameters specified are not valid.
+ @retval EFI_DEVICE_ERROR Device error, command aborts abnormally.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PCH_SPI_READ_CPU_SOFTSTRAP) (
+ IN PCH_SPI2_PROTOCOL *This,
+ IN UINT32 SoftStrapAddr,
+ IN UINT32 ByteCount,
+ OUT VOID *SoftStrapValue
+ );
+
+/**
+ These protocols/PPI allows a platform module to perform SPI operations through the
+ Intel PCH SPI Host Controller Interface.
+
+**/
+struct _PCH_SPI2_PROTOCOL {
+ /**
+ This member specifies the revision of this structure. This field is used to
+ indicate backwards compatible changes to the protocol.
+ **/
+ UINT8 Revision;
+ PCH_SPI_FLASH_READ FlashRead; ///< Read data from the flash part.
+ PCH_SPI_FLASH_WRITE FlashWrite; ///< Write data to the flash part. Remark: Erase may be needed before write to the flash part.
+ PCH_SPI_FLASH_ERASE FlashErase; ///< Erase some area on the flash part.
+ PCH_SPI_FLASH_READ_SFDP FlashReadSfdp; ///< Read SFDP data from the flash part.
+ PCH_SPI_FLASH_READ_JEDEC_ID FlashReadJedecId; ///< Read Jedec Id from the flash part.
+ PCH_SPI_FLASH_WRITE_STATUS FlashWriteStatus; ///< Write the status register in the flash part.
+ PCH_SPI_FLASH_READ_STATUS FlashReadStatus; ///< Read status register in the flash part.
+ PCH_SPI_GET_REGION_ADDRESS GetRegionAddress; ///< Get the SPI region base and size
+ PCH_SPI_READ_PCH_SOFTSTRAP ReadPchSoftStrap; ///< Read PCH Soft Strap Values
+ PCH_SPI_READ_CPU_SOFTSTRAP ReadCpuSoftStrap; ///< Read CPU Soft Strap Values
+};
+
+/**
+ PCH SPI PPI/PROTOCOL revision number
+
+ Revision 1: Initial version
+ Revision 2: Identify regions by GUID
+
+**/
+#define PCH_SPI_SERVICES_REVISION 2
+
+#endif
diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
index c92d5ee64755..1704f9e02541 100644
--- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
+++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
@@ -96,15 +96,23 @@ [Ppis]
## Include/Ppi/Spi.h
gPchSpiPpiGuid = { 0x104c7177, 0xc2e6, 0x44f0, { 0xae, 0xe3, 0x9d, 0x0d, 0x9a, 0x52, 0xca, 0xdf } }
+ ## Include/Ppi/Spi2.h
+ gPchSpi2PpiGuid = { 0x63c40580, 0x10c4, 0x4a8e, { 0xb4, 0x16, 0x86, 0x85, 0x25, 0x7e, 0xce, 0x04 } }
+
gEdkiiVTdInfoPpiGuid = { 0x8a59fcb3, 0xf191, 0x400c, { 0x97, 0x67, 0x67, 0xaf, 0x2b, 0x25, 0x68, 0x4a } }
gEdkiiVTdNullRootEntryTableGuid = { 0x3de0593f, 0x6e3e, 0x4542, { 0xa1, 0xcb, 0xcb, 0xb2, 0xdb, 0xeb, 0xd8, 0xff } }
[Protocols]
## Protocols that provide services for the Intel(R) PCH SPI Host Controller Compatibility Interface
+
# Include/Protocol/Spi.h
gPchSpiProtocolGuid = { 0xe007dec0, 0xccc3, 0x4c90, { 0x9c, 0xd0, 0xef, 0x99, 0x38, 0x83, 0x28, 0xcf } }
gPchSmmSpiProtocolGuid = { 0x4840e48e, 0xc264, 0x4fef, { 0xb9, 0x34, 0x14, 0x84, 0x0c, 0x95, 0xd8, 0x3f } }
+ # Include/Protocol/Spi2.h
+ gPchSpi2ProtocolGuid = { 0x3a99abd1, 0x096c, 0x4399, { 0xb1, 0x68, 0x52, 0xaa, 0x52, 0x64, 0xce, 0x70 } }
+ gPchSmmSpi2ProtocolGuid = { 0x2d1c0c43, 0x20d3, 0x40ae, { 0x99, 0x07, 0x2d, 0xf0, 0xe7, 0x91, 0x21, 0xa5 } }
+
gEdkiiPlatformVTdPolicyProtocolGuid = { 0x3d17e448, 0x466, 0x4e20, { 0x99, 0x9f, 0xb2, 0xe1, 0x34, 0x88, 0xee, 0x22 }}
## Protocol for device security policy.
diff --git a/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf b/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
index f6a06351ace5..4227d2138860 100644
--- a/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
+++ b/Silicon/Intel/IntelSiliconPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
@@ -37,12 +37,15 @@ [Pcd]
gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress ## CONSUMES
gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize ## CONSUMES
+[Guids]
+ gFlashRegionBiosGuid
+
[Sources]
SmmSpiFlashCommonLib.c
SpiFlashCommon.c
[Protocols]
- gPchSmmSpiProtocolGuid ## CONSUMES
+ gPchSmmSpi2ProtocolGuid ## CONSUMES
[Depex.X64.DXE_SMM_DRIVER]
- gPchSmmSpiProtocolGuid
+ gPchSmmSpi2ProtocolGuid
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 29+ messages in thread* [PATCH v6 41/52] CoffeelakeSiliconPkg/BasePchSpiCommonLib: Identify flash regions by GUID
2021-10-28 22:08 [PATCH v6 36/52] KabylakeSiliconPkg: Remove PCH SPI PPI and Protocol from package Michael Kubacki
` (3 preceding siblings ...)
2021-10-28 22:08 ` [PATCH v6 40/52] IntelSiliconPkg: Identify flash regions by GUID Michael Kubacki
@ 2021-10-28 22:08 ` Michael Kubacki
2021-11-02 23:23 ` [edk2-devel] " Nate DeSimone
2021-10-28 22:08 ` [PATCH v6 42/52] CoffeelakeSiliconPkg: Update for SPI2 PPI and Protocol Michael Kubacki
` (10 subsequent siblings)
15 siblings, 1 reply; 29+ messages in thread
From: Michael Kubacki @ 2021-10-28 22:08 UTC (permalink / raw)
To: devel; +Cc: Chasel Chiu, Rangasai V Chaganty, Nate DeSimone
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Updates the library to identify flash regions by GUID and internally
map the GUID entries to values specific to CoffeelakeSiliconPkg.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
---
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/SpiCommon.c | 192 +++++++++++++++-----
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Private/Library/PchSpiCommonLib.h | 60 +++---
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/BasePchSpiCommonLib.inf | 12 ++
3 files changed, 187 insertions(+), 77 deletions(-)
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/SpiCommon.c b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/SpiCommon.c
index bc84a4f27f1a..df9c55f2cbb1 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/SpiCommon.c
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/SpiCommon.c
@@ -2,11 +2,13 @@
PCH SPI Common Driver implements the SPI Host Controller Compatibility Interface.
Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
+ Copyright (c) Microsoft Corporation.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <Uefi/UefiBaseType.h>
+#include <Guid/FlashRegion.h>
#include <Library/BaseLib.h>
#include <Library/IoLib.h>
#include <Library/DebugLib.h>
@@ -14,12 +16,101 @@
#include <IndustryStandard/Pci30.h>
#include <Library/PmcLib.h>
#include <Library/PciSegmentLib.h>
-#include <Protocol/Spi.h>
+#include <Protocol/Spi2.h>
#include <Private/Library/PchSpiCommonLib.h>
#include <Register/PchRegs.h>
#include <Register/PchRegsSpi.h>
#include <Register/PchRegsPmc.h>
+typedef enum {
+ FlashRegionDescriptor,
+ FlashRegionBios,
+ FlashRegionMe,
+ FlashRegionGbe,
+ FlashRegionPlatformData,
+ FlashRegionDer,
+ FlashRegionEc = 8,
+ FlashRegionAll,
+ FlashRegionMax
+} FLASH_REGION_TYPE;
+
+typedef struct {
+ EFI_GUID *Guid;
+ FLASH_REGION_TYPE Type;
+} FLASH_REGION_MAPPING;
+
+FLASH_REGION_MAPPING mFlashRegionTypes[] = {
+ {
+ &gFlashRegionDescriptorGuid,
+ FlashRegionDescriptor
+ },
+ {
+ &gFlashRegionBiosGuid,
+ FlashRegionBios
+ },
+ {
+ &gFlashRegionMeGuid,
+ FlashRegionMe
+ },
+ {
+ &gFlashRegionGbeGuid,
+ FlashRegionGbe
+ },
+ {
+ &gFlashRegionPlatformDataGuid,
+ FlashRegionPlatformData
+ },
+ {
+ &gFlashRegionDerGuid,
+ FlashRegionDer
+ },
+ {
+ &gFlashRegionEcGuid,
+ FlashRegionEc
+ },
+ {
+ &gFlashRegionAllGuid,
+ FlashRegionAll
+ },
+ {
+ &gFlashRegionMaxGuid,
+ FlashRegionMax
+ }
+};
+
+/**
+ Returns the type of a flash region given its GUID.
+
+ @param[in] FlashRegionGuid Pointer to the flash region GUID.
+ @param[out] FlashRegionType Pointer to a buffer that will be set to the flash region type value.
+
+ @retval EFI_SUCCESS The flash region type was found for the given flash region GUID.
+ @retval EFI_INVALID_PARAMETER A pointer argument passed to the function is NULL.
+ @retval EFI_NOT_FOUND The flash region type was not found for the given flash region GUID.
+
+**/
+EFI_STATUS
+GetFlashRegionType (
+ IN EFI_GUID *FlashRegionGuid,
+ OUT FLASH_REGION_TYPE *FlashRegionType
+ )
+{
+ UINTN Index;
+
+ if (FlashRegionGuid == NULL || FlashRegionType == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ for (Index = 0; Index < ARRAY_SIZE (mFlashRegionTypes); Index++) {
+ if (CompareGuid (mFlashRegionTypes[Index].Guid, FlashRegionGuid)) {
+ *FlashRegionType = mFlashRegionTypes[Index].Type;
+ return EFI_SUCCESS;
+ }
+ }
+
+ return EFI_NOT_FOUND;
+}
+
/**
Initialize an SPI protocol instance.
@@ -265,7 +356,7 @@ PchPmTimerStallRuntimeSafe (
STATIC
BOOLEAN
WaitForSpiCycleComplete (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINTN PchSpiBar0,
IN BOOLEAN ErrorCheck
)
@@ -302,8 +393,8 @@ WaitForSpiCycleComplete (
/**
This function sends the programmed SPI command to the slave device.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] SpiRegionType The SPI Region type for flash cycle which is listed in the Descriptor
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] FlashCycleType The Flash SPI cycle type list in HSFC (Hardware Sequencing Flash Control Register) register
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@@ -317,8 +408,8 @@ WaitForSpiCycleComplete (
STATIC
EFI_STATUS
SendSpiCmd (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN FLASH_CYCLE_TYPE FlashCycleType,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -404,7 +495,7 @@ SendSpiCmd (
}
}
- Status = SpiProtocolGetRegionAddress (This, FlashRegionType, &HardwareSpiAddr, &FlashRegionSize);
+ Status = SpiProtocolGetRegionAddress (This, FlashRegionGuid, &HardwareSpiAddr, &FlashRegionSize);
if (EFI_ERROR (Status)) {
goto SendSpiCmdEnd;
}
@@ -615,8 +706,8 @@ SendSpiCmd (
/**
Read data from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[out] Buffer The Pointer to caller-allocated buffer containing the dada received.
@@ -629,8 +720,8 @@ SendSpiCmd (
EFI_STATUS
EFIAPI
SpiProtocolFlashRead (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
OUT UINT8 *Buffer
@@ -643,7 +734,7 @@ SpiProtocolFlashRead (
//
Status = SendSpiCmd (
This,
- FlashRegionType,
+ FlashRegionGuid,
FlashCycleRead,
Address,
ByteCount,
@@ -655,8 +746,8 @@ SpiProtocolFlashRead (
/**
Write data to the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[in] Buffer Pointer to caller-allocated buffer containing the data sent during the SPI cycle.
@@ -668,8 +759,8 @@ SpiProtocolFlashRead (
EFI_STATUS
EFIAPI
SpiProtocolFlashWrite (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
IN UINT8 *Buffer
@@ -682,7 +773,7 @@ SpiProtocolFlashWrite (
//
Status = SendSpiCmd (
This,
- FlashRegionType,
+ FlashRegionGuid,
FlashCycleWrite,
Address,
ByteCount,
@@ -694,8 +785,8 @@ SpiProtocolFlashWrite (
/**
Erase some area on the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@@ -706,8 +797,8 @@ SpiProtocolFlashWrite (
EFI_STATUS
EFIAPI
SpiProtocolFlashErase (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount
)
@@ -719,7 +810,7 @@ SpiProtocolFlashErase (
//
Status = SendSpiCmd (
This,
- FlashRegionType,
+ FlashRegionGuid,
FlashCycleErase,
Address,
ByteCount,
@@ -731,7 +822,7 @@ SpiProtocolFlashErase (
/**
Read SFDP data from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] Address The starting byte address for SFDP data read.
@param[in] ByteCount Number of bytes in SFDP data portion of the SPI cycle
@@ -745,7 +836,7 @@ SpiProtocolFlashErase (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadSfdp (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -774,7 +865,7 @@ SpiProtocolFlashReadSfdp (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleReadSfdp,
FlashAddress,
ByteCount,
@@ -786,7 +877,7 @@ SpiProtocolFlashReadSfdp (
/**
Read Jedec Id from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] ByteCount Number of bytes in JedecId data portion of the SPI cycle, the data size is 3 typically
@param[out] JedecId The Pointer to caller-allocated buffer containing JEDEC ID received
@@ -799,7 +890,7 @@ SpiProtocolFlashReadSfdp (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadJedecId (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 ByteCount,
OUT UINT8 *JedecId
@@ -827,7 +918,7 @@ SpiProtocolFlashReadJedecId (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleReadJedecId,
Address,
ByteCount,
@@ -839,7 +930,7 @@ SpiProtocolFlashReadJedecId (
/**
Write the status register in the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[in] StatusValue The Pointer to caller-allocated buffer containing the value of Status register writing
@@ -850,7 +941,7 @@ SpiProtocolFlashReadJedecId (
EFI_STATUS
EFIAPI
SpiProtocolFlashWriteStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
IN UINT8 *StatusValue
)
@@ -862,7 +953,7 @@ SpiProtocolFlashWriteStatus (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleWriteStatus,
0,
ByteCount,
@@ -874,7 +965,7 @@ SpiProtocolFlashWriteStatus (
/**
Read status register in the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[out] StatusValue The Pointer to caller-allocated buffer containing the value of Status register received.
@@ -885,7 +976,7 @@ SpiProtocolFlashWriteStatus (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
OUT UINT8 *StatusValue
)
@@ -897,7 +988,7 @@ SpiProtocolFlashReadStatus (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleReadStatus,
0,
ByteCount,
@@ -909,8 +1000,8 @@ SpiProtocolFlashReadStatus (
/**
Get the SPI region base and size, based on the enum type
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for for the base address which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for the base address which corresponds to the type in the descriptor.
@param[out] BaseAddress The Flash Linear Address for the Region 'n' Base
@param[out] RegionSize The size for the Region 'n'
@@ -921,18 +1012,25 @@ SpiProtocolFlashReadStatus (
EFI_STATUS
EFIAPI
SpiProtocolGetRegionAddress (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
OUT UINT32 *BaseAddress,
OUT UINT32 *RegionSize
)
{
- SPI_INSTANCE *SpiInstance;
- UINTN PchSpiBar0;
- UINT32 ReadValue;
+ EFI_STATUS Status;
+ FLASH_REGION_TYPE FlashRegionType;
+ SPI_INSTANCE *SpiInstance;
+ UINTN PchSpiBar0;
+ UINT32 ReadValue;
SpiInstance = SPI_INSTANCE_FROM_SPIPROTOCOL (This);
+ Status = GetFlashRegionType (FlashRegionGuid, &FlashRegionType);
+ if (EFI_ERROR (Status)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
if (FlashRegionType >= FlashRegionMax) {
return EFI_INVALID_PARAMETER;
}
@@ -967,7 +1065,7 @@ SpiProtocolGetRegionAddress (
/**
Read PCH Soft Strap Values
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing PCH Soft Strap Value.
@@ -981,7 +1079,7 @@ SpiProtocolGetRegionAddress (
EFI_STATUS
EFIAPI
SpiProtocolReadPchSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -1013,7 +1111,7 @@ SpiProtocolReadPchSoftStrap (
//
Status = SendSpiCmd (
This,
- FlashRegionDescriptor,
+ &gFlashRegionDescriptorGuid,
FlashCycleRead,
StrapFlashAddr,
ByteCount,
@@ -1025,7 +1123,7 @@ SpiProtocolReadPchSoftStrap (
/**
Read CPU Soft Strap Values
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle.
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing CPU Soft Strap Value.
@@ -1039,7 +1137,7 @@ SpiProtocolReadPchSoftStrap (
EFI_STATUS
EFIAPI
SpiProtocolReadCpuSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -1071,7 +1169,7 @@ SpiProtocolReadCpuSoftStrap (
//
Status = SendSpiCmd (
This,
- FlashRegionDescriptor,
+ &gFlashRegionDescriptorGuid,
FlashCycleRead,
StrapFlashAddr,
ByteCount,
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Private/Library/PchSpiCommonLib.h b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Private/Library/PchSpiCommonLib.h
index 0a973a77a381..3b1720c69434 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Private/Library/PchSpiCommonLib.h
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Private/Library/PchSpiCommonLib.h
@@ -9,7 +9,7 @@
#ifndef _PCH_SPI_COMMON_LIB_H_
#define _PCH_SPI_COMMON_LIB_H_
-#include <Protocol/Spi.h>
+#include <Protocol/Spi2.h>
//
// Maximum time allowed while waiting the SPI cycle to complete
@@ -50,7 +50,7 @@ typedef enum {
typedef struct {
UINT32 Signature;
EFI_HANDLE Handle;
- PCH_SPI_PROTOCOL SpiProtocol;
+ PCH_SPI2_PROTOCOL SpiProtocol;
UINT16 PchAcpiBase;
UINT64 PchSpiBase;
UINT8 ReadPermission;
@@ -147,8 +147,8 @@ IsSpiFlashWriteGranted (
/**
Read data from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[out] Buffer The Pointer to caller-allocated buffer containing the dada received.
@@ -161,8 +161,8 @@ IsSpiFlashWriteGranted (
EFI_STATUS
EFIAPI
SpiProtocolFlashRead (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
OUT UINT8 *Buffer
@@ -171,8 +171,8 @@ SpiProtocolFlashRead (
/**
Write data to the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[in] Buffer Pointer to caller-allocated buffer containing the data sent during the SPI cycle.
@@ -184,8 +184,8 @@ SpiProtocolFlashRead (
EFI_STATUS
EFIAPI
SpiProtocolFlashWrite (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
IN UINT8 *Buffer
@@ -194,8 +194,8 @@ SpiProtocolFlashWrite (
/**
Erase some area on the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@@ -206,8 +206,8 @@ SpiProtocolFlashWrite (
EFI_STATUS
EFIAPI
SpiProtocolFlashErase (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount
);
@@ -215,7 +215,7 @@ SpiProtocolFlashErase (
/**
Read SFDP data from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] Address The starting byte address for SFDP data read.
@param[in] ByteCount Number of bytes in SFDP data portion of the SPI cycle
@@ -229,7 +229,7 @@ SpiProtocolFlashErase (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadSfdp (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -239,7 +239,7 @@ SpiProtocolFlashReadSfdp (
/**
Read Jedec Id from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] ByteCount Number of bytes in JedecId data portion of the SPI cycle, the data size is 3 typically
@param[out] JedecId The Pointer to caller-allocated buffer containing JEDEC ID received
@@ -252,7 +252,7 @@ SpiProtocolFlashReadSfdp (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadJedecId (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 ByteCount,
OUT UINT8 *JedecId
@@ -261,7 +261,7 @@ SpiProtocolFlashReadJedecId (
/**
Write the status register in the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[in] StatusValue The Pointer to caller-allocated buffer containing the value of Status register writing
@@ -272,7 +272,7 @@ SpiProtocolFlashReadJedecId (
EFI_STATUS
EFIAPI
SpiProtocolFlashWriteStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
IN UINT8 *StatusValue
);
@@ -280,7 +280,7 @@ SpiProtocolFlashWriteStatus (
/**
Read status register in the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[out] StatusValue The Pointer to caller-allocated buffer containing the value of Status register received.
@@ -291,7 +291,7 @@ SpiProtocolFlashWriteStatus (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
OUT UINT8 *StatusValue
);
@@ -299,8 +299,8 @@ SpiProtocolFlashReadStatus (
/**
Get the SPI region base and size, based on the enum type
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for for the base address which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for the base address which corresponds to the type in the descriptor.
@param[out] BaseAddress The Flash Linear Address for the Region 'n' Base
@param[out] RegionSize The size for the Region 'n'
@@ -311,8 +311,8 @@ SpiProtocolFlashReadStatus (
EFI_STATUS
EFIAPI
SpiProtocolGetRegionAddress (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
OUT UINT32 *BaseAddress,
OUT UINT32 *RegionSize
);
@@ -320,7 +320,7 @@ SpiProtocolGetRegionAddress (
/**
Read PCH Soft Strap Values
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing PCH Soft Strap Value.
@@ -334,7 +334,7 @@ SpiProtocolGetRegionAddress (
EFI_STATUS
EFIAPI
SpiProtocolReadPchSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -343,7 +343,7 @@ SpiProtocolReadPchSoftStrap (
/**
Read CPU Soft Strap Values
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle.
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing CPU Soft Strap Value.
@@ -357,7 +357,7 @@ SpiProtocolReadPchSoftStrap (
EFI_STATUS
EFIAPI
SpiProtocolReadCpuSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/BasePchSpiCommonLib.inf b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
index f5dc4ee0bfef..b152d2278839 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
@@ -2,6 +2,7 @@
# Component description file for the PchSpiCommonLib
#
# Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
+# Copyright (c) Microsoft Corporation.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -27,3 +28,14 @@ [LibraryClasses]
IoLib
DebugLib
PmcLib
+
+[Guids]
+ gFlashRegionDescriptorGuid
+ gFlashRegionBiosGuid
+ gFlashRegionMeGuid
+ gFlashRegionGbeGuid
+ gFlashRegionPlatformDataGuid
+ gFlashRegionDerGuid
+ gFlashRegionEcGuid
+ gFlashRegionAllGuid
+ gFlashRegionMaxGuid
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 29+ messages in thread* Re: [edk2-devel] [PATCH v6 41/52] CoffeelakeSiliconPkg/BasePchSpiCommonLib: Identify flash regions by GUID
2021-10-28 22:08 ` [PATCH v6 41/52] CoffeelakeSiliconPkg/BasePchSpiCommonLib: " Michael Kubacki
@ 2021-11-02 23:23 ` Nate DeSimone
0 siblings, 0 replies; 29+ messages in thread
From: Nate DeSimone @ 2021-11-02 23:23 UTC (permalink / raw)
To: devel@edk2.groups.io, mikuback@linux.microsoft.com
Cc: Chiu, Chasel, Chaganty, Rangasai V
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Michael Kubacki
Sent: Thursday, October 28, 2021 3:09 PM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@intel.com>; Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>
Subject: [edk2-devel] [PATCH v6 41/52] CoffeelakeSiliconPkg/BasePchSpiCommonLib: Identify flash regions by GUID
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Updates the library to identify flash regions by GUID and internally map the GUID entries to values specific to CoffeelakeSiliconPkg.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
---
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/SpiCommon.c | 192 +++++++++++++++-----
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Private/Library/PchSpiCommonLib.h | 60 +++---
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/BasePchSpiCommonLib.inf | 12 ++
3 files changed, 187 insertions(+), 77 deletions(-)
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/SpiCommon.c b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/SpiCommon.c
index bc84a4f27f1a..df9c55f2cbb1 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/SpiCommon.c
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiC
+++ ommonLib/SpiCommon.c
@@ -2,11 +2,13 @@
PCH SPI Common Driver implements the SPI Host Controller Compatibility Interface.
Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
+ Copyright (c) Microsoft Corporation.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent **/
#include <Uefi/UefiBaseType.h>
+#include <Guid/FlashRegion.h>
#include <Library/BaseLib.h>
#include <Library/IoLib.h>
#include <Library/DebugLib.h>
@@ -14,12 +16,101 @@
#include <IndustryStandard/Pci30.h>
#include <Library/PmcLib.h>
#include <Library/PciSegmentLib.h>
-#include <Protocol/Spi.h>
+#include <Protocol/Spi2.h>
#include <Private/Library/PchSpiCommonLib.h>
#include <Register/PchRegs.h>
#include <Register/PchRegsSpi.h>
#include <Register/PchRegsPmc.h>
+typedef enum {
+ FlashRegionDescriptor,
+ FlashRegionBios,
+ FlashRegionMe,
+ FlashRegionGbe,
+ FlashRegionPlatformData,
+ FlashRegionDer,
+ FlashRegionEc = 8,
+ FlashRegionAll,
+ FlashRegionMax
+} FLASH_REGION_TYPE;
+
+typedef struct {
+ EFI_GUID *Guid;
+ FLASH_REGION_TYPE Type;
+} FLASH_REGION_MAPPING;
+
+FLASH_REGION_MAPPING mFlashRegionTypes[] = {
+ {
+ &gFlashRegionDescriptorGuid,
+ FlashRegionDescriptor
+ },
+ {
+ &gFlashRegionBiosGuid,
+ FlashRegionBios
+ },
+ {
+ &gFlashRegionMeGuid,
+ FlashRegionMe
+ },
+ {
+ &gFlashRegionGbeGuid,
+ FlashRegionGbe
+ },
+ {
+ &gFlashRegionPlatformDataGuid,
+ FlashRegionPlatformData
+ },
+ {
+ &gFlashRegionDerGuid,
+ FlashRegionDer
+ },
+ {
+ &gFlashRegionEcGuid,
+ FlashRegionEc
+ },
+ {
+ &gFlashRegionAllGuid,
+ FlashRegionAll
+ },
+ {
+ &gFlashRegionMaxGuid,
+ FlashRegionMax
+ }
+};
+
+/**
+ Returns the type of a flash region given its GUID.
+
+ @param[in] FlashRegionGuid Pointer to the flash region GUID.
+ @param[out] FlashRegionType Pointer to a buffer that will be set to the flash region type value.
+
+ @retval EFI_SUCCESS The flash region type was found for the given flash region GUID.
+ @retval EFI_INVALID_PARAMETER A pointer argument passed to the function is NULL.
+ @retval EFI_NOT_FOUND The flash region type was not found for the given flash region GUID.
+
+**/
+EFI_STATUS
+GetFlashRegionType (
+ IN EFI_GUID *FlashRegionGuid,
+ OUT FLASH_REGION_TYPE *FlashRegionType
+ )
+{
+ UINTN Index;
+
+ if (FlashRegionGuid == NULL || FlashRegionType == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ for (Index = 0; Index < ARRAY_SIZE (mFlashRegionTypes); Index++) {
+ if (CompareGuid (mFlashRegionTypes[Index].Guid, FlashRegionGuid)) {
+ *FlashRegionType = mFlashRegionTypes[Index].Type;
+ return EFI_SUCCESS;
+ }
+ }
+
+ return EFI_NOT_FOUND;
+}
+
/**
Initialize an SPI protocol instance.
@@ -265,7 +356,7 @@ PchPmTimerStallRuntimeSafe ( STATIC BOOLEAN WaitForSpiCycleComplete (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINTN PchSpiBar0,
IN BOOLEAN ErrorCheck
)
@@ -302,8 +393,8 @@ WaitForSpiCycleComplete (
/**
This function sends the programmed SPI command to the slave device.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] SpiRegionType The SPI Region type for flash cycle which is listed in the Descriptor
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] FlashCycleType The Flash SPI cycle type list in HSFC (Hardware Sequencing Flash Control Register) register
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@@ -317,8 +408,8 @@ WaitForSpiCycleComplete ( STATIC EFI_STATUS SendSpiCmd (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN FLASH_CYCLE_TYPE FlashCycleType,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -404,7 +495,7 @@ SendSpiCmd (
}
}
- Status = SpiProtocolGetRegionAddress (This, FlashRegionType, &HardwareSpiAddr, &FlashRegionSize);
+ Status = SpiProtocolGetRegionAddress (This, FlashRegionGuid,
+ &HardwareSpiAddr, &FlashRegionSize);
if (EFI_ERROR (Status)) {
goto SendSpiCmdEnd;
}
@@ -615,8 +706,8 @@ SendSpiCmd (
/**
Read data from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[out] Buffer The Pointer to caller-allocated buffer containing the dada received.
@@ -629,8 +720,8 @@ SendSpiCmd (
EFI_STATUS
EFIAPI
SpiProtocolFlashRead (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
OUT UINT8 *Buffer
@@ -643,7 +734,7 @@ SpiProtocolFlashRead (
//
Status = SendSpiCmd (
This,
- FlashRegionType,
+ FlashRegionGuid,
FlashCycleRead,
Address,
ByteCount,
@@ -655,8 +746,8 @@ SpiProtocolFlashRead (
/**
Write data to the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[in] Buffer Pointer to caller-allocated buffer containing the data sent during the SPI cycle.
@@ -668,8 +759,8 @@ SpiProtocolFlashRead ( EFI_STATUS EFIAPI SpiProtocolFlashWrite (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
IN UINT8 *Buffer
@@ -682,7 +773,7 @@ SpiProtocolFlashWrite (
//
Status = SendSpiCmd (
This,
- FlashRegionType,
+ FlashRegionGuid,
FlashCycleWrite,
Address,
ByteCount,
@@ -694,8 +785,8 @@ SpiProtocolFlashWrite (
/**
Erase some area on the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@@ -706,8 +797,8 @@ SpiProtocolFlashWrite ( EFI_STATUS EFIAPI SpiProtocolFlashErase (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount
)
@@ -719,7 +810,7 @@ SpiProtocolFlashErase (
//
Status = SendSpiCmd (
This,
- FlashRegionType,
+ FlashRegionGuid,
FlashCycleErase,
Address,
ByteCount,
@@ -731,7 +822,7 @@ SpiProtocolFlashErase (
/**
Read SFDP data from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] Address The starting byte address for SFDP data read.
@param[in] ByteCount Number of bytes in SFDP data portion of the SPI cycle
@@ -745,7 +836,7 @@ SpiProtocolFlashErase ( EFI_STATUS EFIAPI SpiProtocolFlashReadSfdp (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -774,7 +865,7 @@ SpiProtocolFlashReadSfdp (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleReadSfdp,
FlashAddress,
ByteCount,
@@ -786,7 +877,7 @@ SpiProtocolFlashReadSfdp (
/**
Read Jedec Id from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] ByteCount Number of bytes in JedecId data portion of the SPI cycle, the data size is 3 typically
@param[out] JedecId The Pointer to caller-allocated buffer containing JEDEC ID received
@@ -799,7 +890,7 @@ SpiProtocolFlashReadSfdp ( EFI_STATUS EFIAPI SpiProtocolFlashReadJedecId (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 ByteCount,
OUT UINT8 *JedecId
@@ -827,7 +918,7 @@ SpiProtocolFlashReadJedecId (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleReadJedecId,
Address,
ByteCount,
@@ -839,7 +930,7 @@ SpiProtocolFlashReadJedecId (
/**
Write the status register in the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[in] StatusValue The Pointer to caller-allocated buffer containing the value of Status register writing
@@ -850,7 +941,7 @@ SpiProtocolFlashReadJedecId ( EFI_STATUS EFIAPI SpiProtocolFlashWriteStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
IN UINT8 *StatusValue
)
@@ -862,7 +953,7 @@ SpiProtocolFlashWriteStatus (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleWriteStatus,
0,
ByteCount,
@@ -874,7 +965,7 @@ SpiProtocolFlashWriteStatus (
/**
Read status register in the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[out] StatusValue The Pointer to caller-allocated buffer containing the value of Status register received.
@@ -885,7 +976,7 @@ SpiProtocolFlashWriteStatus ( EFI_STATUS EFIAPI SpiProtocolFlashReadStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
OUT UINT8 *StatusValue
)
@@ -897,7 +988,7 @@ SpiProtocolFlashReadStatus (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleReadStatus,
0,
ByteCount,
@@ -909,8 +1000,8 @@ SpiProtocolFlashReadStatus (
/**
Get the SPI region base and size, based on the enum type
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for for the base address which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for the base address which corresponds to the type in the descriptor.
@param[out] BaseAddress The Flash Linear Address for the Region 'n' Base
@param[out] RegionSize The size for the Region 'n'
@@ -921,18 +1012,25 @@ SpiProtocolFlashReadStatus ( EFI_STATUS EFIAPI SpiProtocolGetRegionAddress (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
OUT UINT32 *BaseAddress,
OUT UINT32 *RegionSize
)
{
- SPI_INSTANCE *SpiInstance;
- UINTN PchSpiBar0;
- UINT32 ReadValue;
+ EFI_STATUS Status;
+ FLASH_REGION_TYPE FlashRegionType;
+ SPI_INSTANCE *SpiInstance;
+ UINTN PchSpiBar0;
+ UINT32 ReadValue;
SpiInstance = SPI_INSTANCE_FROM_SPIPROTOCOL (This);
+ Status = GetFlashRegionType (FlashRegionGuid, &FlashRegionType); if
+ (EFI_ERROR (Status)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
if (FlashRegionType >= FlashRegionMax) {
return EFI_INVALID_PARAMETER;
}
@@ -967,7 +1065,7 @@ SpiProtocolGetRegionAddress (
/**
Read PCH Soft Strap Values
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing PCH Soft Strap Value.
@@ -981,7 +1079,7 @@ SpiProtocolGetRegionAddress ( EFI_STATUS EFIAPI SpiProtocolReadPchSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -1013,7 +1111,7 @@ SpiProtocolReadPchSoftStrap (
//
Status = SendSpiCmd (
This,
- FlashRegionDescriptor,
+ &gFlashRegionDescriptorGuid,
FlashCycleRead,
StrapFlashAddr,
ByteCount,
@@ -1025,7 +1123,7 @@ SpiProtocolReadPchSoftStrap (
/**
Read CPU Soft Strap Values
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle.
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing CPU Soft Strap Value.
@@ -1039,7 +1137,7 @@ SpiProtocolReadPchSoftStrap ( EFI_STATUS EFIAPI SpiProtocolReadCpuSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -1071,7 +1169,7 @@ SpiProtocolReadCpuSoftStrap (
//
Status = SendSpiCmd (
This,
- FlashRegionDescriptor,
+ &gFlashRegionDescriptorGuid,
FlashCycleRead,
StrapFlashAddr,
ByteCount,
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Private/Library/PchSpiCommonLib.h b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Private/Library/PchSpiCommonLib.h
index 0a973a77a381..3b1720c69434 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Private/Library/PchSpiCommonLib.h
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Private/Library/Pch
+++ SpiCommonLib.h
@@ -9,7 +9,7 @@
#ifndef _PCH_SPI_COMMON_LIB_H_
#define _PCH_SPI_COMMON_LIB_H_
-#include <Protocol/Spi.h>
+#include <Protocol/Spi2.h>
//
// Maximum time allowed while waiting the SPI cycle to complete @@ -50,7 +50,7 @@ typedef enum { typedef struct {
UINT32 Signature;
EFI_HANDLE Handle;
- PCH_SPI_PROTOCOL SpiProtocol;
+ PCH_SPI2_PROTOCOL SpiProtocol;
UINT16 PchAcpiBase;
UINT64 PchSpiBase;
UINT8 ReadPermission;
@@ -147,8 +147,8 @@ IsSpiFlashWriteGranted (
/**
Read data from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[out] Buffer The Pointer to caller-allocated buffer containing the dada received.
@@ -161,8 +161,8 @@ IsSpiFlashWriteGranted ( EFI_STATUS EFIAPI SpiProtocolFlashRead (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
OUT UINT8 *Buffer
@@ -171,8 +171,8 @@ SpiProtocolFlashRead (
/**
Write data to the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[in] Buffer Pointer to caller-allocated buffer containing the data sent during the SPI cycle.
@@ -184,8 +184,8 @@ SpiProtocolFlashRead ( EFI_STATUS EFIAPI SpiProtocolFlashWrite (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
IN UINT8 *Buffer
@@ -194,8 +194,8 @@ SpiProtocolFlashWrite (
/**
Erase some area on the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@@ -206,8 +206,8 @@ SpiProtocolFlashWrite ( EFI_STATUS EFIAPI SpiProtocolFlashErase (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount
);
@@ -215,7 +215,7 @@ SpiProtocolFlashErase (
/**
Read SFDP data from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] Address The starting byte address for SFDP data read.
@param[in] ByteCount Number of bytes in SFDP data portion of the SPI cycle
@@ -229,7 +229,7 @@ SpiProtocolFlashErase ( EFI_STATUS EFIAPI SpiProtocolFlashReadSfdp (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -239,7 +239,7 @@ SpiProtocolFlashReadSfdp (
/**
Read Jedec Id from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] ByteCount Number of bytes in JedecId data portion of the SPI cycle, the data size is 3 typically
@param[out] JedecId The Pointer to caller-allocated buffer containing JEDEC ID received
@@ -252,7 +252,7 @@ SpiProtocolFlashReadSfdp ( EFI_STATUS EFIAPI SpiProtocolFlashReadJedecId (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 ByteCount,
OUT UINT8 *JedecId
@@ -261,7 +261,7 @@ SpiProtocolFlashReadJedecId (
/**
Write the status register in the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[in] StatusValue The Pointer to caller-allocated buffer containing the value of Status register writing
@@ -272,7 +272,7 @@ SpiProtocolFlashReadJedecId ( EFI_STATUS EFIAPI SpiProtocolFlashWriteStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
IN UINT8 *StatusValue
);
@@ -280,7 +280,7 @@ SpiProtocolFlashWriteStatus (
/**
Read status register in the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[out] StatusValue The Pointer to caller-allocated buffer containing the value of Status register received.
@@ -291,7 +291,7 @@ SpiProtocolFlashWriteStatus ( EFI_STATUS EFIAPI SpiProtocolFlashReadStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
OUT UINT8 *StatusValue
);
@@ -299,8 +299,8 @@ SpiProtocolFlashReadStatus (
/**
Get the SPI region base and size, based on the enum type
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for for the base address which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for the base address which corresponds to the type in the descriptor.
@param[out] BaseAddress The Flash Linear Address for the Region 'n' Base
@param[out] RegionSize The size for the Region 'n'
@@ -311,8 +311,8 @@ SpiProtocolFlashReadStatus ( EFI_STATUS EFIAPI SpiProtocolGetRegionAddress (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
OUT UINT32 *BaseAddress,
OUT UINT32 *RegionSize
);
@@ -320,7 +320,7 @@ SpiProtocolGetRegionAddress (
/**
Read PCH Soft Strap Values
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing PCH Soft Strap Value.
@@ -334,7 +334,7 @@ SpiProtocolGetRegionAddress ( EFI_STATUS EFIAPI SpiProtocolReadPchSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -343,7 +343,7 @@ SpiProtocolReadPchSoftStrap (
/**
Read CPU Soft Strap Values
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle.
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing CPU Soft Strap Value.
@@ -357,7 +357,7 @@ SpiProtocolReadPchSoftStrap ( EFI_STATUS EFIAPI SpiProtocolReadCpuSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/BasePchSpiCommonLib.inf b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
index f5dc4ee0bfef..b152d2278839 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiC
+++ ommonLib/BasePchSpiCommonLib.inf
@@ -2,6 +2,7 @@
# Component description file for the PchSpiCommonLib # # Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
+# Copyright (c) Microsoft Corporation.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -27,3 +28,14 @@ [LibraryClasses]
IoLib
DebugLib
PmcLib
+
+[Guids]
+ gFlashRegionDescriptorGuid
+ gFlashRegionBiosGuid
+ gFlashRegionMeGuid
+ gFlashRegionGbeGuid
+ gFlashRegionPlatformDataGuid
+ gFlashRegionDerGuid
+ gFlashRegionEcGuid
+ gFlashRegionAllGuid
+ gFlashRegionMaxGuid
--
2.28.0.windows.1
-=-=-=-=-=-=
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Mute This Topic: https://groups.io/mt/86664057/1767664
Group Owner: devel+owner@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [nathaniel.l.desimone@intel.com]
-=-=-=-=-=-=
^ permalink raw reply [flat|nested] 29+ messages in thread
* [PATCH v6 42/52] CoffeelakeSiliconPkg: Update for SPI2 PPI and Protocol
2021-10-28 22:08 [PATCH v6 36/52] KabylakeSiliconPkg: Remove PCH SPI PPI and Protocol from package Michael Kubacki
` (4 preceding siblings ...)
2021-10-28 22:08 ` [PATCH v6 41/52] CoffeelakeSiliconPkg/BasePchSpiCommonLib: " Michael Kubacki
@ 2021-10-28 22:08 ` Michael Kubacki
2021-11-02 23:24 ` Nate DeSimone
2021-10-28 22:08 ` [PATCH v6 43/52] CometlakeOpenBoardPkg: Remove unnecessary gPchSpiPpiGuid reference Michael Kubacki
` (9 subsequent siblings)
15 siblings, 1 reply; 29+ messages in thread
From: Michael Kubacki @ 2021-10-28 22:08 UTC (permalink / raw)
To: devel; +Cc: Chasel Chiu, Rangasai V Chaganty, Nate DeSimone
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Updates references to the "PCH_SPI_PROTOCOL" and "PCH_SPI_PPI" to
instead refer to "PCH_SPI2_PROTOCOL" and "PCH_SPI2_PPI".
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PchSpi.c | 10 +++++-----
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpi.c | 10 +++++-----
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf | 2 +-
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf | 2 +-
4 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PchSpi.c b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PchSpi.c
index 1a5db7f24a49..543e42973ae9 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PchSpi.c
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PchSpi.c
@@ -11,7 +11,7 @@
#include <Library/MemoryAllocationLib.h>
#include <Library/PeiServicesLib.h>
#include <Library/PciSegmentLib.h>
-#include <Ppi/Spi.h>
+#include <Ppi/Spi2.h>
#include <Private/Library/PchSpiCommonLib.h>
#include <PchReservedResources.h>
#include <IndustryStandard/Pci30.h>
@@ -62,13 +62,13 @@ SpiServiceInit (
EFI_STATUS Status;
PEI_SPI_INSTANCE *PeiSpiInstance;
SPI_INSTANCE *SpiInstance;
- PCH_SPI_PPI *SpiPpi;
+ PCH_SPI2_PPI *Spi2Ppi;
Status = PeiServicesLocatePpi (
- &gPchSpiPpiGuid,
+ &gPchSpi2PpiGuid,
0,
NULL,
- (VOID **)&SpiPpi
+ (VOID **)&Spi2Ppi
);
if (Status != EFI_SUCCESS) {
@@ -90,7 +90,7 @@ SpiServiceInit (
SpiProtocolConstructor (SpiInstance);
PeiSpiInstance->PpiDescriptor.Flags = EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST;
- PeiSpiInstance->PpiDescriptor.Guid = &gPchSpiPpiGuid;
+ PeiSpiInstance->PpiDescriptor.Guid = &gPchSpi2PpiGuid;
PeiSpiInstance->PpiDescriptor.Ppi = &(SpiInstance->SpiProtocol);
///
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpi.c b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpi.c
index 458d137e4fa2..a5518a606db7 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpi.c
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpi.c
@@ -14,7 +14,7 @@
#include <Library/BaseMemoryLib.h>
#include <Library/SmmServicesTableLib.h>
#include <Library/PciSegmentLib.h>
-#include <Protocol/Spi.h>
+#include <Protocol/Spi2.h>
#include <Protocol/SmmCpu.h>
#include <Private/Library/PchSpiCommonLib.h>
#include <Private/Library/SmmPchPrivateLib.h>
@@ -45,8 +45,8 @@ GLOBAL_REMOVE_IF_UNREFERENCED UINT32 mSpiResvMmioAddr;
- Documented in System Management Mode Core Interface Specification .
- @result
- The SPI SMM driver produces @link _PCH_SPI_PROTOCOL PCH_SPI_PROTOCOL @endlink with GUID
- gPchSmmSpiProtocolGuid which is different from SPI RUNTIME driver.
+ The SPI SMM driver produces @link _PCH_SPI2_PROTOCOL PCH_SPI2_PROTOCOL @endlink with GUID
+ gPchSmmSpi2ProtocolGuid which is different from SPI RUNTIME driver.
- <b>Integration Check List</b>\n
- This driver supports Descriptor Mode only.
@@ -108,11 +108,11 @@ InstallPchSpi (
return Status;
}
///
- /// Install the SMM PCH_SPI_PROTOCOL interface
+ /// Install the SMM PCH_SPI2_PROTOCOL interface
///
Status = gSmst->SmmInstallProtocolInterface (
&(mSpiInstance->Handle),
- &gPchSmmSpiProtocolGuid,
+ &gPchSmmSpi2ProtocolGuid,
EFI_NATIVE_INTERFACE,
&(mSpiInstance->SpiProtocol)
);
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
index 4e4b456574f0..46f10368d19e 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
@@ -39,5 +39,5 @@ [Sources]
[Ppis]
-gPchSpiPpiGuid ## PRODUCES
+gPchSpi2PpiGuid ## PRODUCES
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf
index 231929151222..0fc8ea7b376a 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf
@@ -38,7 +38,7 @@ [Sources]
[Protocols]
-gPchSmmSpiProtocolGuid ## PRODUCES
+gPchSmmSpi2ProtocolGuid ## PRODUCES
gEfiSmmCpuProtocolGuid ## CONSUMES
[Depex]
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 29+ messages in thread* Re: [PATCH v6 42/52] CoffeelakeSiliconPkg: Update for SPI2 PPI and Protocol
2021-10-28 22:08 ` [PATCH v6 42/52] CoffeelakeSiliconPkg: Update for SPI2 PPI and Protocol Michael Kubacki
@ 2021-11-02 23:24 ` Nate DeSimone
0 siblings, 0 replies; 29+ messages in thread
From: Nate DeSimone @ 2021-11-02 23:24 UTC (permalink / raw)
To: mikuback@linux.microsoft.com, devel@edk2.groups.io
Cc: Chiu, Chasel, Chaganty, Rangasai V
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
-----Original Message-----
From: mikuback@linux.microsoft.com <mikuback@linux.microsoft.com>
Sent: Thursday, October 28, 2021 3:09 PM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@intel.com>; Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>
Subject: [PATCH v6 42/52] CoffeelakeSiliconPkg: Update for SPI2 PPI and Protocol
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Updates references to the "PCH_SPI_PROTOCOL" and "PCH_SPI_PPI" to instead refer to "PCH_SPI2_PROTOCOL" and "PCH_SPI2_PPI".
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PchSpi.c | 10 +++++-----
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpi.c | 10 +++++-----
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf | 2 +-
Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf | 2 +-
4 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PchSpi.c b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PchSpi.c
index 1a5db7f24a49..543e42973ae9 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PchSpi.c
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PchSpi.c
@@ -11,7 +11,7 @@
#include <Library/MemoryAllocationLib.h> #include <Library/PeiServicesLib.h> #include <Library/PciSegmentLib.h> -#include <Ppi/Spi.h>
+#include <Ppi/Spi2.h>
#include <Private/Library/PchSpiCommonLib.h>
#include <PchReservedResources.h>
#include <IndustryStandard/Pci30.h>
@@ -62,13 +62,13 @@ SpiServiceInit (
EFI_STATUS Status;
PEI_SPI_INSTANCE *PeiSpiInstance;
SPI_INSTANCE *SpiInstance;
- PCH_SPI_PPI *SpiPpi;
+ PCH_SPI2_PPI *Spi2Ppi;
Status = PeiServicesLocatePpi (
- &gPchSpiPpiGuid,
+ &gPchSpi2PpiGuid,
0,
NULL,
- (VOID **)&SpiPpi
+ (VOID **)&Spi2Ppi
);
if (Status != EFI_SUCCESS) {
@@ -90,7 +90,7 @@ SpiServiceInit (
SpiProtocolConstructor (SpiInstance);
PeiSpiInstance->PpiDescriptor.Flags = EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST;
- PeiSpiInstance->PpiDescriptor.Guid = &gPchSpiPpiGuid;
+ PeiSpiInstance->PpiDescriptor.Guid = &gPchSpi2PpiGuid;
PeiSpiInstance->PpiDescriptor.Ppi = &(SpiInstance->SpiProtocol);
///
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpi.c b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpi.c
index 458d137e4fa2..a5518a606db7 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpi.c
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpi.c
@@ -14,7 +14,7 @@
#include <Library/BaseMemoryLib.h>
#include <Library/SmmServicesTableLib.h> #include <Library/PciSegmentLib.h> -#include <Protocol/Spi.h>
+#include <Protocol/Spi2.h>
#include <Protocol/SmmCpu.h>
#include <Private/Library/PchSpiCommonLib.h>
#include <Private/Library/SmmPchPrivateLib.h>
@@ -45,8 +45,8 @@ GLOBAL_REMOVE_IF_UNREFERENCED UINT32 mSpiResvMmioAddr;
- Documented in System Management Mode Core Interface Specification .
- @result
- The SPI SMM driver produces @link _PCH_SPI_PROTOCOL PCH_SPI_PROTOCOL @endlink with GUID
- gPchSmmSpiProtocolGuid which is different from SPI RUNTIME driver.
+ The SPI SMM driver produces @link _PCH_SPI2_PROTOCOL PCH_SPI2_PROTOCOL @endlink with GUID
+ gPchSmmSpi2ProtocolGuid which is different from SPI RUNTIME driver.
- <b>Integration Check List</b>\n
- This driver supports Descriptor Mode only.
@@ -108,11 +108,11 @@ InstallPchSpi (
return Status;
}
///
- /// Install the SMM PCH_SPI_PROTOCOL interface
+ /// Install the SMM PCH_SPI2_PROTOCOL interface
///
Status = gSmst->SmmInstallProtocolInterface (
&(mSpiInstance->Handle),
- &gPchSmmSpiProtocolGuid,
+ &gPchSmmSpi2ProtocolGuid,
EFI_NATIVE_INTERFACE,
&(mSpiInstance->SpiProtocol)
);
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
index 4e4b456574f0..46f10368d19e 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib
+++ .inf
@@ -39,5 +39,5 @@ [Sources]
[Ppis]
-gPchSpiPpiGuid ## PRODUCES
+gPchSpi2PpiGuid ## PRODUCES
diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf
index 231929151222..0fc8ea7b376a 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf
@@ -38,7 +38,7 @@ [Sources]
[Protocols]
-gPchSmmSpiProtocolGuid ## PRODUCES
+gPchSmmSpi2ProtocolGuid ## PRODUCES
gEfiSmmCpuProtocolGuid ## CONSUMES
[Depex]
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH v6 43/52] CometlakeOpenBoardPkg: Remove unnecessary gPchSpiPpiGuid reference
2021-10-28 22:08 [PATCH v6 36/52] KabylakeSiliconPkg: Remove PCH SPI PPI and Protocol from package Michael Kubacki
` (5 preceding siblings ...)
2021-10-28 22:08 ` [PATCH v6 42/52] CoffeelakeSiliconPkg: Update for SPI2 PPI and Protocol Michael Kubacki
@ 2021-10-28 22:08 ` Michael Kubacki
2021-11-02 23:24 ` [edk2-devel] " Nate DeSimone
2021-10-28 22:08 ` [PATCH v6 44/52] KabylakeSiliconPkg: Identify flash regions by GUID Michael Kubacki
` (8 subsequent siblings)
15 siblings, 1 reply; 29+ messages in thread
From: Michael Kubacki @ 2021-10-28 22:08 UTC (permalink / raw)
To: devel
Cc: Chasel Chiu, Nate DeSimone, Rangasai V Chaganty,
Deepika Kethi Reddy, Kathappan Esakkithevar
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
The GUID is included in PeiPolicyUpdateLib.inf but not actually used.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Deepika Kethi Reddy <deepika.kethi.reddy@intel.com>
Cc: Kathappan Esakkithevar <kathappan.esakkithevar@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf | 1 -
1 file changed, 1 deletion(-)
diff --git a/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf b/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
index 5213253f7313..7ebaba1e6f11 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
+++ b/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
@@ -262,7 +262,6 @@ [Sources]
[Ppis]
gWdtPpiGuid ## CONSUMES
- gPchSpiPpiGuid ## CONSUMES
gSiPolicyPpiGuid ## CONSUMES
gSiPreMemPolicyPpiGuid ## CONSUMES
gPeiTbtPolicyPpiGuid ## CONSUMES
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 29+ messages in thread* Re: [edk2-devel] [PATCH v6 43/52] CometlakeOpenBoardPkg: Remove unnecessary gPchSpiPpiGuid reference
2021-10-28 22:08 ` [PATCH v6 43/52] CometlakeOpenBoardPkg: Remove unnecessary gPchSpiPpiGuid reference Michael Kubacki
@ 2021-11-02 23:24 ` Nate DeSimone
0 siblings, 0 replies; 29+ messages in thread
From: Nate DeSimone @ 2021-11-02 23:24 UTC (permalink / raw)
To: devel@edk2.groups.io, mikuback@linux.microsoft.com
Cc: Chiu, Chasel, Chaganty, Rangasai V, Kethi Reddy, Deepika,
Esakkithevar, Kathappan
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Michael Kubacki
Sent: Thursday, October 28, 2021 3:09 PM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>; Kethi Reddy, Deepika <deepika.kethi.reddy@intel.com>; Esakkithevar, Kathappan <kathappan.esakkithevar@intel.com>
Subject: [edk2-devel] [PATCH v6 43/52] CometlakeOpenBoardPkg: Remove unnecessary gPchSpiPpiGuid reference
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
The GUID is included in PeiPolicyUpdateLib.inf but not actually used.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Deepika Kethi Reddy <deepika.kethi.reddy@intel.com>
Cc: Kathappan Esakkithevar <kathappan.esakkithevar@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf | 1 -
1 file changed, 1 deletion(-)
diff --git a/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf b/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
index 5213253f7313..7ebaba1e6f11 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
+++ b/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
@@ -262,7 +262,6 @@ [Sources]
[Ppis]
gWdtPpiGuid ## CONSUMES
- gPchSpiPpiGuid ## CONSUMES
gSiPolicyPpiGuid ## CONSUMES
gSiPreMemPolicyPpiGuid ## CONSUMES
gPeiTbtPolicyPpiGuid ## CONSUMES
--
2.28.0.windows.1
-=-=-=-=-=-=
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View/Reply Online (#82863): https://edk2.groups.io/g/devel/message/82863
Mute This Topic: https://groups.io/mt/86664063/1767664
Group Owner: devel+owner@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [nathaniel.l.desimone@intel.com]
-=-=-=-=-=-=
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH v6 44/52] KabylakeSiliconPkg: Identify flash regions by GUID
2021-10-28 22:08 [PATCH v6 36/52] KabylakeSiliconPkg: Remove PCH SPI PPI and Protocol from package Michael Kubacki
` (6 preceding siblings ...)
2021-10-28 22:08 ` [PATCH v6 43/52] CometlakeOpenBoardPkg: Remove unnecessary gPchSpiPpiGuid reference Michael Kubacki
@ 2021-10-28 22:08 ` Michael Kubacki
2021-11-02 23:25 ` [edk2-devel] " Nate DeSimone
2021-10-28 22:08 ` [PATCH v6 45/52] KabylakeSiliconPkg: Update for SPI2 PPI and Protocol Michael Kubacki
` (7 subsequent siblings)
15 siblings, 1 reply; 29+ messages in thread
From: Michael Kubacki @ 2021-10-28 22:08 UTC (permalink / raw)
To: devel; +Cc: Chasel Chiu, Rangasai V Chaganty, Nate DeSimone
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Updates the code to identify flash regions by GUID and internally
map the GUID entries to values specific to KabylakeSiliconPkg.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
---
Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/SecureMemoryMapConfiguration.c | 108 ++++++++++-
Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c | 188 +++++++++++++++-----
Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.h | 2 +-
Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf | 9 +
Silicon/Intel/KabylakeSiliconPkg/Pch/IncludePrivate/Library/PchSpiCommonLib.h | 68 +++----
Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf | 11 ++
6 files changed, 297 insertions(+), 89 deletions(-)
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/SecureMemoryMapConfiguration.c b/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/SecureMemoryMapConfiguration.c
index a3c9bbebeaa9..705004853122 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/SecureMemoryMapConfiguration.c
+++ b/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/SecureMemoryMapConfiguration.c
@@ -2,11 +2,14 @@
This file contains the tests for the SecureMemoryMapConfiguration bit
Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+Copyright (c) Microsoft Corporation.<BR>
+
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include "HstiSiliconDxe.h"
+#include <Guid/FlashRegion.h>
typedef struct {
UINT64 Base;
@@ -100,6 +103,90 @@ MEMORY_RANGE mNonLockableMemoryRange[NonLockableMemoryRangeMax] = {
// 14. SPI_BAR0 (BDF 0:31:5 + 0x10)
};
+typedef enum {
+ FlashRegionDescriptor,
+ FlashRegionBios,
+ FlashRegionMe,
+ FlashRegionGbe,
+ FlashRegionPlatformData,
+ FlashRegionDer,
+ FlashRegionAll,
+ FlashRegionMax
+} FLASH_REGION_TYPE;
+
+typedef struct {
+ EFI_GUID *Guid;
+ FLASH_REGION_TYPE Type;
+} FLASH_REGION_MAPPING;
+
+FLASH_REGION_MAPPING mFlashRegionTypes[] = {
+ {
+ &gFlashRegionDescriptorGuid,
+ FlashRegionDescriptor
+ },
+ {
+ &gFlashRegionBiosGuid,
+ FlashRegionBios
+ },
+ {
+ &gFlashRegionMeGuid,
+ FlashRegionMe
+ },
+ {
+ &gFlashRegionGbeGuid,
+ FlashRegionGbe
+ },
+ {
+ &gFlashRegionPlatformDataGuid,
+ FlashRegionPlatformData
+ },
+ {
+ &gFlashRegionDerGuid,
+ FlashRegionDer
+ },
+ {
+ &gFlashRegionAllGuid,
+ FlashRegionAll
+ },
+ {
+ &gFlashRegionMaxGuid,
+ FlashRegionMax
+ }
+};
+
+/**
+ Returns the type of a flash region given its GUID.
+
+ @param[in] FlashRegionGuid Pointer to the flash region GUID.
+ @param[out] FlashRegionType Pointer to a buffer that will be set to the flash region type value.
+
+ @retval EFI_SUCCESS The flash region type was found for the given flash region GUID.
+ @retval EFI_INVALID_PARAMETER A pointer argument passed to the function is NULL.
+ @retval EFI_NOT_FOUND The flash region type was not found for the given flash region GUID.
+
+**/
+EFI_STATUS
+GetFlashRegionType (
+ IN EFI_GUID *FlashRegionGuid,
+ OUT FLASH_REGION_TYPE *FlashRegionType
+ )
+{
+ UINTN Index;
+
+ if (FlashRegionGuid == NULL || FlashRegionType == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ for (Index = 0; Index < ARRAY_SIZE (mFlashRegionTypes); Index++) {
+ if (CompareGuid (mFlashRegionTypes[Index].Guid, FlashRegionGuid)) {
+ *FlashRegionType = mFlashRegionTypes[Index].Type;
+ return EFI_SUCCESS;
+ }
+ }
+
+ return EFI_NOT_FOUND;
+}
+
/**
Check for overlaps in single range array
@@ -224,7 +311,7 @@ AcquireSpiBar0 (
{
UINT32 SpiBar0;
UINTN PchSpiBase;
-
+
//
// Init PCH spi reserved MMIO address.
//
@@ -269,8 +356,8 @@ ReleaseSpiBar0 (
/**
Get the SPI region base and size, based on the enum type
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for for the base address which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for the base address which corresponds to the type in the descriptor.
@param[out] BaseAddress The Flash Linear Address for the Region 'n' Base
@param[out] RegionSize The size for the Region 'n'
@@ -281,13 +368,20 @@ ReleaseSpiBar0 (
EFI_STATUS
EFIAPI
GetRegionAddress (
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN EFI_GUID *FlashRegionGuid,
OUT UINT32 *BaseAddress,
OUT UINT32 *RegionSize
)
{
- UINTN PchSpiBar0;
- UINT32 ReadValue;
+ EFI_STATUS Status;
+ FLASH_REGION_TYPE FlashRegionType;
+ UINTN PchSpiBar0;
+ UINT32 ReadValue;
+
+ Status = GetFlashRegionType (FlashRegionGuid, &FlashRegionType);
+ if (EFI_ERROR (Status)) {
+ return EFI_INVALID_PARAMETER;
+ }
if (FlashRegionType >= FlashRegionMax) {
return EFI_INVALID_PARAMETER;
@@ -484,7 +578,7 @@ CheckSecureMemoryMapConfiguration (
//
// Locate BIOS region size to update High bios base address
//
- GetRegionAddress (FlashRegionBios, &BaseAddress, &RegionSize);
+ GetRegionAddress (&gFlashRegionBiosGuid, &BaseAddress, &RegionSize);
DEBUG ((DEBUG_INFO, "Bios Region Size %x:\n", RegionSize));
mLockableMemoryRange[LockableMemoryRangeHighBios].Base = SIZE_4GB - RegionSize;
mLockableMemoryRange[LockableMemoryRangeLowDram].End = (MmioRead32 (MmPciBase (0,SA_MC_DEV,SA_MC_FUN) + R_SA_TOLUD) & B_SA_TOLUD_TOLUD_MASK) - 1;
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c b/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c
index 58757a8cba39..6fc8141b4681 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c
@@ -2,10 +2,13 @@
PCH SPI Common Driver implements the SPI Host Controller Compatibility Interface.
Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.<BR>
+Copyright (c) Microsoft Corporation.<BR>
+
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <Uefi/UefiBaseType.h>
+#include <Guid/FlashRegion.h>
#include <Library/IoLib.h>
#include <Library/DebugLib.h>
#include <Library/BaseMemoryLib.h>
@@ -13,9 +16,93 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <PchAccess.h>
#include <Library/PchCycleDecodingLib.h>
#include <Library/MmPciLib.h>
-#include <Protocol/Spi.h>
+#include <Protocol/Spi2.h>
#include <Library/PchSpiCommonLib.h>
+typedef enum {
+ FlashRegionDescriptor,
+ FlashRegionBios,
+ FlashRegionMe,
+ FlashRegionGbe,
+ FlashRegionPlatformData,
+ FlashRegionDer,
+ FlashRegionAll,
+ FlashRegionMax
+} FLASH_REGION_TYPE;
+
+typedef struct {
+ EFI_GUID *Guid;
+ FLASH_REGION_TYPE Type;
+} FLASH_REGION_MAPPING;
+
+FLASH_REGION_MAPPING mFlashRegionTypes[] = {
+ {
+ &gFlashRegionDescriptorGuid,
+ FlashRegionDescriptor
+ },
+ {
+ &gFlashRegionBiosGuid,
+ FlashRegionBios
+ },
+ {
+ &gFlashRegionMeGuid,
+ FlashRegionMe
+ },
+ {
+ &gFlashRegionGbeGuid,
+ FlashRegionGbe
+ },
+ {
+ &gFlashRegionPlatformDataGuid,
+ FlashRegionPlatformData
+ },
+ {
+ &gFlashRegionDerGuid,
+ FlashRegionDer
+ },
+ {
+ &gFlashRegionAllGuid,
+ FlashRegionAll
+ },
+ {
+ &gFlashRegionMaxGuid,
+ FlashRegionMax
+ }
+};
+
+/**
+ Returns the type of a flash region given its GUID.
+
+ @param[in] FlashRegionGuid Pointer to the flash region GUID.
+ @param[out] FlashRegionType Pointer to a buffer that will be set to the flash region type value.
+
+ @retval EFI_SUCCESS The flash region type was found for the given flash region GUID.
+ @retval EFI_INVALID_PARAMETER A pointer argument passed to the function is NULL.
+ @retval EFI_NOT_FOUND The flash region type was not found for the given flash region GUID.
+
+**/
+EFI_STATUS
+GetFlashRegionType (
+ IN EFI_GUID *FlashRegionGuid,
+ OUT FLASH_REGION_TYPE *FlashRegionType
+ )
+{
+ UINTN Index;
+
+ if (FlashRegionGuid == NULL || FlashRegionType == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ for (Index = 0; Index < ARRAY_SIZE (mFlashRegionTypes); Index++) {
+ if (CompareGuid (mFlashRegionTypes[Index].Guid, FlashRegionGuid)) {
+ *FlashRegionType = mFlashRegionTypes[Index].Type;
+ return EFI_SUCCESS;
+ }
+ }
+
+ return EFI_NOT_FOUND;
+}
+
/**
Initialize an SPI protocol instance.
@@ -248,8 +335,8 @@ PchPmTimerStallRuntimeSafe (
/**
Read data from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[out] Buffer The Pointer to caller-allocated buffer containing the dada received.
@@ -262,8 +349,8 @@ PchPmTimerStallRuntimeSafe (
EFI_STATUS
EFIAPI
SpiProtocolFlashRead (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
OUT UINT8 *Buffer
@@ -276,7 +363,7 @@ SpiProtocolFlashRead (
//
Status = SendSpiCmd (
This,
- FlashRegionType,
+ FlashRegionGuid,
FlashCycleRead,
Address,
ByteCount,
@@ -288,8 +375,8 @@ SpiProtocolFlashRead (
/**
Write data to the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[in] Buffer Pointer to caller-allocated buffer containing the data sent during the SPI cycle.
@@ -301,8 +388,8 @@ SpiProtocolFlashRead (
EFI_STATUS
EFIAPI
SpiProtocolFlashWrite (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
IN UINT8 *Buffer
@@ -315,7 +402,7 @@ SpiProtocolFlashWrite (
//
Status = SendSpiCmd (
This,
- FlashRegionType,
+ FlashRegionGuid,
FlashCycleWrite,
Address,
ByteCount,
@@ -327,8 +414,8 @@ SpiProtocolFlashWrite (
/**
Erase some area on the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@@ -339,8 +426,8 @@ SpiProtocolFlashWrite (
EFI_STATUS
EFIAPI
SpiProtocolFlashErase (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount
)
@@ -352,7 +439,7 @@ SpiProtocolFlashErase (
//
Status = SendSpiCmd (
This,
- FlashRegionType,
+ FlashRegionGuid,
FlashCycleErase,
Address,
ByteCount,
@@ -364,7 +451,7 @@ SpiProtocolFlashErase (
/**
Read SFDP data from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] Address The starting byte address for SFDP data read.
@param[in] ByteCount Number of bytes in SFDP data portion of the SPI cycle
@@ -378,7 +465,7 @@ SpiProtocolFlashErase (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadSfdp (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -407,7 +494,7 @@ SpiProtocolFlashReadSfdp (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleReadSfdp,
FlashAddress,
ByteCount,
@@ -419,7 +506,7 @@ SpiProtocolFlashReadSfdp (
/**
Read Jedec Id from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] ByteCount Number of bytes in JedecId data portion of the SPI cycle, the data size is 3 typically
@param[out] JedecId The Pointer to caller-allocated buffer containing JEDEC ID received
@@ -432,7 +519,7 @@ SpiProtocolFlashReadSfdp (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadJedecId (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 ByteCount,
OUT UINT8 *JedecId
@@ -460,7 +547,7 @@ SpiProtocolFlashReadJedecId (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleReadJedecId,
Address,
ByteCount,
@@ -472,7 +559,7 @@ SpiProtocolFlashReadJedecId (
/**
Write the status register in the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[in] StatusValue The Pointer to caller-allocated buffer containing the value of Status register writing
@@ -483,7 +570,7 @@ SpiProtocolFlashReadJedecId (
EFI_STATUS
EFIAPI
SpiProtocolFlashWriteStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
IN UINT8 *StatusValue
)
@@ -495,7 +582,7 @@ SpiProtocolFlashWriteStatus (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleWriteStatus,
0,
ByteCount,
@@ -507,7 +594,7 @@ SpiProtocolFlashWriteStatus (
/**
Read status register in the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[out] StatusValue The Pointer to caller-allocated buffer containing the value of Status register received.
@@ -518,7 +605,7 @@ SpiProtocolFlashWriteStatus (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
OUT UINT8 *StatusValue
)
@@ -530,7 +617,7 @@ SpiProtocolFlashReadStatus (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleReadStatus,
0,
ByteCount,
@@ -542,8 +629,8 @@ SpiProtocolFlashReadStatus (
/**
Get the SPI region base and size, based on the enum type
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for for the base address which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for the base address which corresponds to the type in the descriptor.
@param[out] BaseAddress The Flash Linear Address for the Region 'n' Base
@param[out] RegionSize The size for the Region 'n'
@@ -554,18 +641,25 @@ SpiProtocolFlashReadStatus (
EFI_STATUS
EFIAPI
SpiProtocolGetRegionAddress (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
OUT UINT32 *BaseAddress,
OUT UINT32 *RegionSize
)
{
- SPI_INSTANCE *SpiInstance;
- UINTN PchSpiBar0;
- UINT32 ReadValue;
+ EFI_STATUS Status;
+ FLASH_REGION_TYPE FlashRegionType;
+ SPI_INSTANCE *SpiInstance;
+ UINTN PchSpiBar0;
+ UINT32 ReadValue;
SpiInstance = SPI_INSTANCE_FROM_SPIPROTOCOL (This);
+ Status = GetFlashRegionType (FlashRegionGuid, &FlashRegionType);
+ if (EFI_ERROR (Status)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
if (FlashRegionType >= FlashRegionMax) {
return EFI_INVALID_PARAMETER;
}
@@ -600,7 +694,7 @@ SpiProtocolGetRegionAddress (
/**
Read PCH Soft Strap Values
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing PCH Soft Strap Value.
@@ -614,7 +708,7 @@ SpiProtocolGetRegionAddress (
EFI_STATUS
EFIAPI
SpiProtocolReadPchSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -646,7 +740,7 @@ SpiProtocolReadPchSoftStrap (
//
Status = SendSpiCmd (
This,
- FlashRegionDescriptor,
+ &gFlashRegionDescriptorGuid,
FlashCycleRead,
StrapFlashAddr,
ByteCount,
@@ -658,7 +752,7 @@ SpiProtocolReadPchSoftStrap (
/**
Read CPU Soft Strap Values
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle.
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing CPU Soft Strap Value.
@@ -672,7 +766,7 @@ SpiProtocolReadPchSoftStrap (
EFI_STATUS
EFIAPI
SpiProtocolReadCpuSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -704,7 +798,7 @@ SpiProtocolReadCpuSoftStrap (
//
Status = SendSpiCmd (
This,
- FlashRegionDescriptor,
+ &gFlashRegionDescriptorGuid,
FlashCycleRead,
StrapFlashAddr,
ByteCount,
@@ -716,8 +810,8 @@ SpiProtocolReadCpuSoftStrap (
/**
This function sends the programmed SPI command to the slave device.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] SpiRegionType The SPI Region type for flash cycle which is listed in the Descriptor
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] FlashCycleType The Flash SPI cycle type list in HSFC (Hardware Sequencing Flash Control Register) register
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@@ -730,8 +824,8 @@ SpiProtocolReadCpuSoftStrap (
**/
EFI_STATUS
SendSpiCmd (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN FLASH_CYCLE_TYPE FlashCycleType,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -795,7 +889,7 @@ SendSpiCmd (
goto SendSpiCmdEnd;
}
- Status = SpiProtocolGetRegionAddress (This, FlashRegionType, &HardwareSpiAddr, &FlashRegionSize);
+ Status = SpiProtocolGetRegionAddress (This, FlashRegionGuid, &HardwareSpiAddr, &FlashRegionSize);
if (EFI_ERROR (Status)) {
goto SendSpiCmdEnd;
}
@@ -1016,7 +1110,7 @@ SendSpiCmd (
**/
BOOLEAN
WaitForSpiCycleComplete (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINTN PchSpiBar0,
IN BOOLEAN ErrorCheck
)
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.h b/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.h
index 08094dbbc145..f0a341b0214c 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.h
+++ b/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.h
@@ -26,7 +26,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Protocol/AdapterInformation.h>
#include <Library/HstiLib.h>
#include <HstiFeatureBit.h>
-#include <Protocol/Spi.h>
+#include <Protocol/Spi2.h>
#include <Library/PchCycleDecodingLib.h>
#include <Library/HobLib.h>
#include <Library/PchPcrLib.h>
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf b/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf
index bd12fa691d40..09826cdfdf39 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf
+++ b/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf
@@ -2,6 +2,7 @@
# Component description file for Hsti Silicon Driver
#
# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) Microsoft Corporation.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -86,6 +87,14 @@ [LibraryClasses]
[Guids]
gEfiEndOfDxeEventGroupGuid
gSiMemoryPlatformDataGuid ## CONSUMES
+ gFlashRegionDescriptorGuid
+ gFlashRegionBiosGuid
+ gFlashRegionMeGuid
+ gFlashRegionGbeGuid
+ gFlashRegionPlatformDataGuid
+ gFlashRegionDerGuid
+ gFlashRegionAllGuid
+ gFlashRegionMaxGuid
[Protocols]
gEfiDxeSmmReadyToLockProtocolGuid ## CONSUMES
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/IncludePrivate/Library/PchSpiCommonLib.h b/Silicon/Intel/KabylakeSiliconPkg/Pch/IncludePrivate/Library/PchSpiCommonLib.h
index d408289ea253..0341cc546465 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/IncludePrivate/Library/PchSpiCommonLib.h
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/IncludePrivate/Library/PchSpiCommonLib.h
@@ -47,7 +47,7 @@ typedef enum {
typedef struct {
UINT32 Signature;
EFI_HANDLE Handle;
- PCH_SPI_PROTOCOL SpiProtocol;
+ PCH_SPI2_PROTOCOL SpiProtocol;
UINT16 PchAcpiBase;
UINTN PchSpiBase;
UINT8 ReadPermission;
@@ -133,8 +133,8 @@ ReleaseSpiBar0 (
/**
Read data from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[out] Buffer The Pointer to caller-allocated buffer containing the dada received.
@@ -147,8 +147,8 @@ ReleaseSpiBar0 (
EFI_STATUS
EFIAPI
SpiProtocolFlashRead (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
OUT UINT8 *Buffer
@@ -157,8 +157,8 @@ SpiProtocolFlashRead (
/**
Write data to the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[in] Buffer Pointer to caller-allocated buffer containing the data sent during the SPI cycle.
@@ -170,8 +170,8 @@ SpiProtocolFlashRead (
EFI_STATUS
EFIAPI
SpiProtocolFlashWrite (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
IN UINT8 *Buffer
@@ -180,8 +180,8 @@ SpiProtocolFlashWrite (
/**
Erase some area on the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@@ -192,8 +192,8 @@ SpiProtocolFlashWrite (
EFI_STATUS
EFIAPI
SpiProtocolFlashErase (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount
);
@@ -201,7 +201,7 @@ SpiProtocolFlashErase (
/**
Read SFDP data from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] Address The starting byte address for SFDP data read.
@param[in] ByteCount Number of bytes in SFDP data portion of the SPI cycle
@@ -215,7 +215,7 @@ SpiProtocolFlashErase (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadSfdp (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -225,7 +225,7 @@ SpiProtocolFlashReadSfdp (
/**
Read Jedec Id from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] ByteCount Number of bytes in JedecId data portion of the SPI cycle, the data size is 3 typically
@param[out] JedecId The Pointer to caller-allocated buffer containing JEDEC ID received
@@ -238,7 +238,7 @@ SpiProtocolFlashReadSfdp (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadJedecId (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 ByteCount,
OUT UINT8 *JedecId
@@ -247,7 +247,7 @@ SpiProtocolFlashReadJedecId (
/**
Write the status register in the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[in] StatusValue The Pointer to caller-allocated buffer containing the value of Status register writing
@@ -258,7 +258,7 @@ SpiProtocolFlashReadJedecId (
EFI_STATUS
EFIAPI
SpiProtocolFlashWriteStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
IN UINT8 *StatusValue
);
@@ -266,7 +266,7 @@ SpiProtocolFlashWriteStatus (
/**
Read status register in the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[out] StatusValue The Pointer to caller-allocated buffer containing the value of Status register received.
@@ -277,7 +277,7 @@ SpiProtocolFlashWriteStatus (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
OUT UINT8 *StatusValue
);
@@ -285,8 +285,8 @@ SpiProtocolFlashReadStatus (
/**
Get the SPI region base and size, based on the enum type
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for for the base address which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[out] BaseAddress The Flash Linear Address for the Region 'n' Base
@param[out] RegionSize The size for the Region 'n'
@@ -297,8 +297,8 @@ SpiProtocolFlashReadStatus (
EFI_STATUS
EFIAPI
SpiProtocolGetRegionAddress (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
OUT UINT32 *BaseAddress,
OUT UINT32 *RegionSize
);
@@ -306,7 +306,7 @@ SpiProtocolGetRegionAddress (
/**
Read PCH Soft Strap Values
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing PCH Soft Strap Value.
@@ -320,7 +320,7 @@ SpiProtocolGetRegionAddress (
EFI_STATUS
EFIAPI
SpiProtocolReadPchSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -329,7 +329,7 @@ SpiProtocolReadPchSoftStrap (
/**
Read CPU Soft Strap Values
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle.
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing CPU Soft Strap Value.
@@ -343,7 +343,7 @@ SpiProtocolReadPchSoftStrap (
EFI_STATUS
EFIAPI
SpiProtocolReadCpuSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -352,8 +352,8 @@ SpiProtocolReadCpuSoftStrap (
/**
This function sends the programmed SPI command to the slave device.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] SpiRegionType The SPI Region type for flash cycle which is listed in the Descriptor
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] FlashCycleType The Flash SPI cycle type list in HSFC (Hardware Sequencing Flash Control Register) register
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@@ -366,8 +366,8 @@ SpiProtocolReadCpuSoftStrap (
**/
EFI_STATUS
SendSpiCmd (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN FLASH_CYCLE_TYPE FlashCycleType,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -387,7 +387,7 @@ SendSpiCmd (
**/
BOOLEAN
WaitForSpiCycleComplete (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINTN PchSpiBar0,
IN BOOLEAN ErrorCheck
);
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf b/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
index 51e2d25a7f8b..67176c879de5 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
@@ -2,6 +2,7 @@
# Component description file for the PchSpiCommonLib
#
# Copyright (c) 2017 - 2020 Intel Corporation. All rights reserved.<BR>
+# Copyright (c) Microsoft Corporation.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -28,3 +29,13 @@ [LibraryClasses]
IoLib
DebugLib
PchCycleDecodingLib
+
+[Guids]
+ gFlashRegionDescriptorGuid
+ gFlashRegionBiosGuid
+ gFlashRegionMeGuid
+ gFlashRegionGbeGuid
+ gFlashRegionPlatformDataGuid
+ gFlashRegionDerGuid
+ gFlashRegionAllGuid
+ gFlashRegionMaxGuid
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 29+ messages in thread* Re: [edk2-devel] [PATCH v6 44/52] KabylakeSiliconPkg: Identify flash regions by GUID
2021-10-28 22:08 ` [PATCH v6 44/52] KabylakeSiliconPkg: Identify flash regions by GUID Michael Kubacki
@ 2021-11-02 23:25 ` Nate DeSimone
0 siblings, 0 replies; 29+ messages in thread
From: Nate DeSimone @ 2021-11-02 23:25 UTC (permalink / raw)
To: devel@edk2.groups.io, mikuback@linux.microsoft.com
Cc: Chiu, Chasel, Chaganty, Rangasai V
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Michael Kubacki
Sent: Thursday, October 28, 2021 3:09 PM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@intel.com>; Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>
Subject: [edk2-devel] [PATCH v6 44/52] KabylakeSiliconPkg: Identify flash regions by GUID
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Updates the code to identify flash regions by GUID and internally map the GUID entries to values specific to KabylakeSiliconPkg.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
---
Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/SecureMemoryMapConfiguration.c | 108 ++++++++++-
Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c | 188 +++++++++++++++-----
Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.h | 2 +-
Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf | 9 +
Silicon/Intel/KabylakeSiliconPkg/Pch/IncludePrivate/Library/PchSpiCommonLib.h | 68 +++----
Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf | 11 ++
6 files changed, 297 insertions(+), 89 deletions(-)
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/SecureMemoryMapConfiguration.c b/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/SecureMemoryMapConfiguration.c
index a3c9bbebeaa9..705004853122 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/SecureMemoryMapConfiguration.c
+++ b/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/SecureMemoryMapConfigura
+++ tion.c
@@ -2,11 +2,14 @@
This file contains the tests for the SecureMemoryMapConfiguration bit
Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+Copyright (c) Microsoft Corporation.<BR>
+
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include "HstiSiliconDxe.h"
+#include <Guid/FlashRegion.h>
typedef struct {
UINT64 Base;
@@ -100,6 +103,90 @@ MEMORY_RANGE mNonLockableMemoryRange[NonLockableMemoryRangeMax] = { // 14. SPI_BAR0 (BDF 0:31:5 + 0x10) };
+typedef enum {
+ FlashRegionDescriptor,
+ FlashRegionBios,
+ FlashRegionMe,
+ FlashRegionGbe,
+ FlashRegionPlatformData,
+ FlashRegionDer,
+ FlashRegionAll,
+ FlashRegionMax
+} FLASH_REGION_TYPE;
+
+typedef struct {
+ EFI_GUID *Guid;
+ FLASH_REGION_TYPE Type;
+} FLASH_REGION_MAPPING;
+
+FLASH_REGION_MAPPING mFlashRegionTypes[] = {
+ {
+ &gFlashRegionDescriptorGuid,
+ FlashRegionDescriptor
+ },
+ {
+ &gFlashRegionBiosGuid,
+ FlashRegionBios
+ },
+ {
+ &gFlashRegionMeGuid,
+ FlashRegionMe
+ },
+ {
+ &gFlashRegionGbeGuid,
+ FlashRegionGbe
+ },
+ {
+ &gFlashRegionPlatformDataGuid,
+ FlashRegionPlatformData
+ },
+ {
+ &gFlashRegionDerGuid,
+ FlashRegionDer
+ },
+ {
+ &gFlashRegionAllGuid,
+ FlashRegionAll
+ },
+ {
+ &gFlashRegionMaxGuid,
+ FlashRegionMax
+ }
+};
+
+/**
+ Returns the type of a flash region given its GUID.
+
+ @param[in] FlashRegionGuid Pointer to the flash region GUID.
+ @param[out] FlashRegionType Pointer to a buffer that will be set to the flash region type value.
+
+ @retval EFI_SUCCESS The flash region type was found for the given flash region GUID.
+ @retval EFI_INVALID_PARAMETER A pointer argument passed to the function is NULL.
+ @retval EFI_NOT_FOUND The flash region type was not found for the given flash region GUID.
+
+**/
+EFI_STATUS
+GetFlashRegionType (
+ IN EFI_GUID *FlashRegionGuid,
+ OUT FLASH_REGION_TYPE *FlashRegionType
+ )
+{
+ UINTN Index;
+
+ if (FlashRegionGuid == NULL || FlashRegionType == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ for (Index = 0; Index < ARRAY_SIZE (mFlashRegionTypes); Index++) {
+ if (CompareGuid (mFlashRegionTypes[Index].Guid, FlashRegionGuid)) {
+ *FlashRegionType = mFlashRegionTypes[Index].Type;
+ return EFI_SUCCESS;
+ }
+ }
+
+ return EFI_NOT_FOUND;
+}
+
/**
Check for overlaps in single range array
@@ -224,7 +311,7 @@ AcquireSpiBar0 (
{
UINT32 SpiBar0;
UINTN PchSpiBase;
-
+
//
// Init PCH spi reserved MMIO address.
//
@@ -269,8 +356,8 @@ ReleaseSpiBar0 (
/**
Get the SPI region base and size, based on the enum type
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for for the base address which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for the base address which corresponds to the type in the descriptor.
@param[out] BaseAddress The Flash Linear Address for the Region 'n' Base
@param[out] RegionSize The size for the Region 'n'
@@ -281,13 +368,20 @@ ReleaseSpiBar0 (
EFI_STATUS
EFIAPI
GetRegionAddress (
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN EFI_GUID *FlashRegionGuid,
OUT UINT32 *BaseAddress,
OUT UINT32 *RegionSize
)
{
- UINTN PchSpiBar0;
- UINT32 ReadValue;
+ EFI_STATUS Status;
+ FLASH_REGION_TYPE FlashRegionType;
+ UINTN PchSpiBar0;
+ UINT32 ReadValue;
+
+ Status = GetFlashRegionType (FlashRegionGuid, &FlashRegionType); if
+ (EFI_ERROR (Status)) {
+ return EFI_INVALID_PARAMETER;
+ }
if (FlashRegionType >= FlashRegionMax) {
return EFI_INVALID_PARAMETER;
@@ -484,7 +578,7 @@ CheckSecureMemoryMapConfiguration (
//
// Locate BIOS region size to update High bios base address
//
- GetRegionAddress (FlashRegionBios, &BaseAddress, &RegionSize);
+ GetRegionAddress (&gFlashRegionBiosGuid, &BaseAddress,
+ &RegionSize);
DEBUG ((DEBUG_INFO, "Bios Region Size %x:\n", RegionSize));
mLockableMemoryRange[LockableMemoryRangeHighBios].Base = SIZE_4GB - RegionSize;
mLockableMemoryRange[LockableMemoryRangeLowDram].End = (MmioRead32 (MmPciBase (0,SA_MC_DEV,SA_MC_FUN) + R_SA_TOLUD) & B_SA_TOLUD_TOLUD_MASK) - 1; diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c b/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c
index 58757a8cba39..6fc8141b4681 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiComm
+++ onLib/SpiCommon.c
@@ -2,10 +2,13 @@
PCH SPI Common Driver implements the SPI Host Controller Compatibility Interface.
Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.<BR>
+Copyright (c) Microsoft Corporation.<BR>
+
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <Uefi/UefiBaseType.h>
+#include <Guid/FlashRegion.h>
#include <Library/IoLib.h>
#include <Library/DebugLib.h>
#include <Library/BaseMemoryLib.h>
@@ -13,9 +16,93 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include <PchAccess.h> #include <Library/PchCycleDecodingLib.h> #include <Library/MmPciLib.h> -#include <Protocol/Spi.h>
+#include <Protocol/Spi2.h>
#include <Library/PchSpiCommonLib.h>
+typedef enum {
+ FlashRegionDescriptor,
+ FlashRegionBios,
+ FlashRegionMe,
+ FlashRegionGbe,
+ FlashRegionPlatformData,
+ FlashRegionDer,
+ FlashRegionAll,
+ FlashRegionMax
+} FLASH_REGION_TYPE;
+
+typedef struct {
+ EFI_GUID *Guid;
+ FLASH_REGION_TYPE Type;
+} FLASH_REGION_MAPPING;
+
+FLASH_REGION_MAPPING mFlashRegionTypes[] = {
+ {
+ &gFlashRegionDescriptorGuid,
+ FlashRegionDescriptor
+ },
+ {
+ &gFlashRegionBiosGuid,
+ FlashRegionBios
+ },
+ {
+ &gFlashRegionMeGuid,
+ FlashRegionMe
+ },
+ {
+ &gFlashRegionGbeGuid,
+ FlashRegionGbe
+ },
+ {
+ &gFlashRegionPlatformDataGuid,
+ FlashRegionPlatformData
+ },
+ {
+ &gFlashRegionDerGuid,
+ FlashRegionDer
+ },
+ {
+ &gFlashRegionAllGuid,
+ FlashRegionAll
+ },
+ {
+ &gFlashRegionMaxGuid,
+ FlashRegionMax
+ }
+};
+
+/**
+ Returns the type of a flash region given its GUID.
+
+ @param[in] FlashRegionGuid Pointer to the flash region GUID.
+ @param[out] FlashRegionType Pointer to a buffer that will be set to the flash region type value.
+
+ @retval EFI_SUCCESS The flash region type was found for the given flash region GUID.
+ @retval EFI_INVALID_PARAMETER A pointer argument passed to the function is NULL.
+ @retval EFI_NOT_FOUND The flash region type was not found for the given flash region GUID.
+
+**/
+EFI_STATUS
+GetFlashRegionType (
+ IN EFI_GUID *FlashRegionGuid,
+ OUT FLASH_REGION_TYPE *FlashRegionType
+ )
+{
+ UINTN Index;
+
+ if (FlashRegionGuid == NULL || FlashRegionType == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ for (Index = 0; Index < ARRAY_SIZE (mFlashRegionTypes); Index++) {
+ if (CompareGuid (mFlashRegionTypes[Index].Guid, FlashRegionGuid)) {
+ *FlashRegionType = mFlashRegionTypes[Index].Type;
+ return EFI_SUCCESS;
+ }
+ }
+
+ return EFI_NOT_FOUND;
+}
+
/**
Initialize an SPI protocol instance.
@@ -248,8 +335,8 @@ PchPmTimerStallRuntimeSafe (
/**
Read data from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[out] Buffer The Pointer to caller-allocated buffer containing the dada received.
@@ -262,8 +349,8 @@ PchPmTimerStallRuntimeSafe ( EFI_STATUS EFIAPI SpiProtocolFlashRead (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
OUT UINT8 *Buffer
@@ -276,7 +363,7 @@ SpiProtocolFlashRead (
//
Status = SendSpiCmd (
This,
- FlashRegionType,
+ FlashRegionGuid,
FlashCycleRead,
Address,
ByteCount,
@@ -288,8 +375,8 @@ SpiProtocolFlashRead (
/**
Write data to the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[in] Buffer Pointer to caller-allocated buffer containing the data sent during the SPI cycle.
@@ -301,8 +388,8 @@ SpiProtocolFlashRead ( EFI_STATUS EFIAPI SpiProtocolFlashWrite (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
IN UINT8 *Buffer
@@ -315,7 +402,7 @@ SpiProtocolFlashWrite (
//
Status = SendSpiCmd (
This,
- FlashRegionType,
+ FlashRegionGuid,
FlashCycleWrite,
Address,
ByteCount,
@@ -327,8 +414,8 @@ SpiProtocolFlashWrite (
/**
Erase some area on the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@@ -339,8 +426,8 @@ SpiProtocolFlashWrite ( EFI_STATUS EFIAPI SpiProtocolFlashErase (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount
)
@@ -352,7 +439,7 @@ SpiProtocolFlashErase (
//
Status = SendSpiCmd (
This,
- FlashRegionType,
+ FlashRegionGuid,
FlashCycleErase,
Address,
ByteCount,
@@ -364,7 +451,7 @@ SpiProtocolFlashErase (
/**
Read SFDP data from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] Address The starting byte address for SFDP data read.
@param[in] ByteCount Number of bytes in SFDP data portion of the SPI cycle
@@ -378,7 +465,7 @@ SpiProtocolFlashErase ( EFI_STATUS EFIAPI SpiProtocolFlashReadSfdp (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -407,7 +494,7 @@ SpiProtocolFlashReadSfdp (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleReadSfdp,
FlashAddress,
ByteCount,
@@ -419,7 +506,7 @@ SpiProtocolFlashReadSfdp (
/**
Read Jedec Id from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] ByteCount Number of bytes in JedecId data portion of the SPI cycle, the data size is 3 typically
@param[out] JedecId The Pointer to caller-allocated buffer containing JEDEC ID received
@@ -432,7 +519,7 @@ SpiProtocolFlashReadSfdp ( EFI_STATUS EFIAPI SpiProtocolFlashReadJedecId (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 ByteCount,
OUT UINT8 *JedecId
@@ -460,7 +547,7 @@ SpiProtocolFlashReadJedecId (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleReadJedecId,
Address,
ByteCount,
@@ -472,7 +559,7 @@ SpiProtocolFlashReadJedecId (
/**
Write the status register in the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[in] StatusValue The Pointer to caller-allocated buffer containing the value of Status register writing
@@ -483,7 +570,7 @@ SpiProtocolFlashReadJedecId ( EFI_STATUS EFIAPI SpiProtocolFlashWriteStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
IN UINT8 *StatusValue
)
@@ -495,7 +582,7 @@ SpiProtocolFlashWriteStatus (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleWriteStatus,
0,
ByteCount,
@@ -507,7 +594,7 @@ SpiProtocolFlashWriteStatus (
/**
Read status register in the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[out] StatusValue The Pointer to caller-allocated buffer containing the value of Status register received.
@@ -518,7 +605,7 @@ SpiProtocolFlashWriteStatus ( EFI_STATUS EFIAPI SpiProtocolFlashReadStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
OUT UINT8 *StatusValue
)
@@ -530,7 +617,7 @@ SpiProtocolFlashReadStatus (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleReadStatus,
0,
ByteCount,
@@ -542,8 +629,8 @@ SpiProtocolFlashReadStatus (
/**
Get the SPI region base and size, based on the enum type
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for for the base address which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for the base address which corresponds to the type in the descriptor.
@param[out] BaseAddress The Flash Linear Address for the Region 'n' Base
@param[out] RegionSize The size for the Region 'n'
@@ -554,18 +641,25 @@ SpiProtocolFlashReadStatus ( EFI_STATUS EFIAPI SpiProtocolGetRegionAddress (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
OUT UINT32 *BaseAddress,
OUT UINT32 *RegionSize
)
{
- SPI_INSTANCE *SpiInstance;
- UINTN PchSpiBar0;
- UINT32 ReadValue;
+ EFI_STATUS Status;
+ FLASH_REGION_TYPE FlashRegionType;
+ SPI_INSTANCE *SpiInstance;
+ UINTN PchSpiBar0;
+ UINT32 ReadValue;
SpiInstance = SPI_INSTANCE_FROM_SPIPROTOCOL (This);
+ Status = GetFlashRegionType (FlashRegionGuid, &FlashRegionType); if
+ (EFI_ERROR (Status)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
if (FlashRegionType >= FlashRegionMax) {
return EFI_INVALID_PARAMETER;
}
@@ -600,7 +694,7 @@ SpiProtocolGetRegionAddress (
/**
Read PCH Soft Strap Values
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing PCH Soft Strap Value.
@@ -614,7 +708,7 @@ SpiProtocolGetRegionAddress ( EFI_STATUS EFIAPI SpiProtocolReadPchSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -646,7 +740,7 @@ SpiProtocolReadPchSoftStrap (
//
Status = SendSpiCmd (
This,
- FlashRegionDescriptor,
+ &gFlashRegionDescriptorGuid,
FlashCycleRead,
StrapFlashAddr,
ByteCount,
@@ -658,7 +752,7 @@ SpiProtocolReadPchSoftStrap (
/**
Read CPU Soft Strap Values
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle.
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing CPU Soft Strap Value.
@@ -672,7 +766,7 @@ SpiProtocolReadPchSoftStrap ( EFI_STATUS EFIAPI SpiProtocolReadCpuSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -704,7 +798,7 @@ SpiProtocolReadCpuSoftStrap (
//
Status = SendSpiCmd (
This,
- FlashRegionDescriptor,
+ &gFlashRegionDescriptorGuid,
FlashCycleRead,
StrapFlashAddr,
ByteCount,
@@ -716,8 +810,8 @@ SpiProtocolReadCpuSoftStrap (
/**
This function sends the programmed SPI command to the slave device.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] SpiRegionType The SPI Region type for flash cycle which is listed in the Descriptor
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] FlashCycleType The Flash SPI cycle type list in HSFC (Hardware Sequencing Flash Control Register) register
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@@ -730,8 +824,8 @@ SpiProtocolReadCpuSoftStrap ( **/ EFI_STATUS SendSpiCmd (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN FLASH_CYCLE_TYPE FlashCycleType,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -795,7 +889,7 @@ SendSpiCmd (
goto SendSpiCmdEnd;
}
- Status = SpiProtocolGetRegionAddress (This, FlashRegionType, &HardwareSpiAddr, &FlashRegionSize);
+ Status = SpiProtocolGetRegionAddress (This, FlashRegionGuid,
+ &HardwareSpiAddr, &FlashRegionSize);
if (EFI_ERROR (Status)) {
goto SendSpiCmdEnd;
}
@@ -1016,7 +1110,7 @@ SendSpiCmd (
**/
BOOLEAN
WaitForSpiCycleComplete (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINTN PchSpiBar0,
IN BOOLEAN ErrorCheck
)
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.h b/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.h
index 08094dbbc145..f0a341b0214c 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.h
+++ b/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.h
@@ -26,7 +26,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include <Protocol/AdapterInformation.h> #include <Library/HstiLib.h> #include <HstiFeatureBit.h> -#include <Protocol/Spi.h>
+#include <Protocol/Spi2.h>
#include <Library/PchCycleDecodingLib.h> #include <Library/HobLib.h> #include <Library/PchPcrLib.h> diff --git a/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf b/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf
index bd12fa691d40..09826cdfdf39 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf
+++ b/Silicon/Intel/KabylakeSiliconPkg/Hsti/Dxe/HstiSiliconDxe.inf
@@ -2,6 +2,7 @@
# Component description file for Hsti Silicon Driver # # Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) Microsoft Corporation.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -86,6 +87,14 @@ [LibraryClasses] [Guids]
gEfiEndOfDxeEventGroupGuid
gSiMemoryPlatformDataGuid ## CONSUMES
+ gFlashRegionDescriptorGuid
+ gFlashRegionBiosGuid
+ gFlashRegionMeGuid
+ gFlashRegionGbeGuid
+ gFlashRegionPlatformDataGuid
+ gFlashRegionDerGuid
+ gFlashRegionAllGuid
+ gFlashRegionMaxGuid
[Protocols]
gEfiDxeSmmReadyToLockProtocolGuid ## CONSUMES diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/IncludePrivate/Library/PchSpiCommonLib.h b/Silicon/Intel/KabylakeSiliconPkg/Pch/IncludePrivate/Library/PchSpiCommonLib.h
index d408289ea253..0341cc546465 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/IncludePrivate/Library/PchSpiCommonLib.h
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/IncludePrivate/Library/PchSpi
+++ CommonLib.h
@@ -47,7 +47,7 @@ typedef enum {
typedef struct {
UINT32 Signature;
EFI_HANDLE Handle;
- PCH_SPI_PROTOCOL SpiProtocol;
+ PCH_SPI2_PROTOCOL SpiProtocol;
UINT16 PchAcpiBase;
UINTN PchSpiBase;
UINT8 ReadPermission;
@@ -133,8 +133,8 @@ ReleaseSpiBar0 (
/**
Read data from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[out] Buffer The Pointer to caller-allocated buffer containing the dada received.
@@ -147,8 +147,8 @@ ReleaseSpiBar0 (
EFI_STATUS
EFIAPI
SpiProtocolFlashRead (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
OUT UINT8 *Buffer
@@ -157,8 +157,8 @@ SpiProtocolFlashRead (
/**
Write data to the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[in] Buffer Pointer to caller-allocated buffer containing the data sent during the SPI cycle.
@@ -170,8 +170,8 @@ SpiProtocolFlashRead ( EFI_STATUS EFIAPI SpiProtocolFlashWrite (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
IN UINT8 *Buffer
@@ -180,8 +180,8 @@ SpiProtocolFlashWrite (
/**
Erase some area on the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@@ -192,8 +192,8 @@ SpiProtocolFlashWrite ( EFI_STATUS EFIAPI SpiProtocolFlashErase (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount
);
@@ -201,7 +201,7 @@ SpiProtocolFlashErase (
/**
Read SFDP data from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] Address The starting byte address for SFDP data read.
@param[in] ByteCount Number of bytes in SFDP data portion of the SPI cycle
@@ -215,7 +215,7 @@ SpiProtocolFlashErase ( EFI_STATUS EFIAPI SpiProtocolFlashReadSfdp (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -225,7 +225,7 @@ SpiProtocolFlashReadSfdp (
/**
Read Jedec Id from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] ByteCount Number of bytes in JedecId data portion of the SPI cycle, the data size is 3 typically
@param[out] JedecId The Pointer to caller-allocated buffer containing JEDEC ID received
@@ -238,7 +238,7 @@ SpiProtocolFlashReadSfdp ( EFI_STATUS EFIAPI SpiProtocolFlashReadJedecId (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 ByteCount,
OUT UINT8 *JedecId
@@ -247,7 +247,7 @@ SpiProtocolFlashReadJedecId (
/**
Write the status register in the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[in] StatusValue The Pointer to caller-allocated buffer containing the value of Status register writing
@@ -258,7 +258,7 @@ SpiProtocolFlashReadJedecId ( EFI_STATUS EFIAPI SpiProtocolFlashWriteStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
IN UINT8 *StatusValue
);
@@ -266,7 +266,7 @@ SpiProtocolFlashWriteStatus (
/**
Read status register in the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[out] StatusValue The Pointer to caller-allocated buffer containing the value of Status register received.
@@ -277,7 +277,7 @@ SpiProtocolFlashWriteStatus ( EFI_STATUS EFIAPI SpiProtocolFlashReadStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
OUT UINT8 *StatusValue
);
@@ -285,8 +285,8 @@ SpiProtocolFlashReadStatus (
/**
Get the SPI region base and size, based on the enum type
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for for the base address which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[out] BaseAddress The Flash Linear Address for the Region 'n' Base
@param[out] RegionSize The size for the Region 'n'
@@ -297,8 +297,8 @@ SpiProtocolFlashReadStatus ( EFI_STATUS EFIAPI SpiProtocolGetRegionAddress (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
OUT UINT32 *BaseAddress,
OUT UINT32 *RegionSize
);
@@ -306,7 +306,7 @@ SpiProtocolGetRegionAddress (
/**
Read PCH Soft Strap Values
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing PCH Soft Strap Value.
@@ -320,7 +320,7 @@ SpiProtocolGetRegionAddress ( EFI_STATUS EFIAPI SpiProtocolReadPchSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -329,7 +329,7 @@ SpiProtocolReadPchSoftStrap (
/**
Read CPU Soft Strap Values
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle.
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing CPU Soft Strap Value.
@@ -343,7 +343,7 @@ SpiProtocolReadPchSoftStrap ( EFI_STATUS EFIAPI SpiProtocolReadCpuSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -352,8 +352,8 @@ SpiProtocolReadCpuSoftStrap (
/**
This function sends the programmed SPI command to the slave device.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] SpiRegionType The SPI Region type for flash cycle which is listed in the Descriptor
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] FlashCycleType The Flash SPI cycle type list in HSFC (Hardware Sequencing Flash Control Register) register
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@@ -366,8 +366,8 @@ SpiProtocolReadCpuSoftStrap ( **/ EFI_STATUS SendSpiCmd (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN FLASH_CYCLE_TYPE FlashCycleType,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -387,7 +387,7 @@ SendSpiCmd (
**/
BOOLEAN
WaitForSpiCycleComplete (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINTN PchSpiBar0,
IN BOOLEAN ErrorCheck
);
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf b/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
index 51e2d25a7f8b..67176c879de5 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/LibraryPrivate/BasePchSpiComm
+++ onLib/BasePchSpiCommonLib.inf
@@ -2,6 +2,7 @@
# Component description file for the PchSpiCommonLib # # Copyright (c) 2017 - 2020 Intel Corporation. All rights reserved.<BR>
+# Copyright (c) Microsoft Corporation.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -28,3 +29,13 @@ [LibraryClasses]
IoLib
DebugLib
PchCycleDecodingLib
+
+[Guids]
+ gFlashRegionDescriptorGuid
+ gFlashRegionBiosGuid
+ gFlashRegionMeGuid
+ gFlashRegionGbeGuid
+ gFlashRegionPlatformDataGuid
+ gFlashRegionDerGuid
+ gFlashRegionAllGuid
+ gFlashRegionMaxGuid
--
2.28.0.windows.1
-=-=-=-=-=-=
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^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH v6 45/52] KabylakeSiliconPkg: Update for SPI2 PPI and Protocol
2021-10-28 22:08 [PATCH v6 36/52] KabylakeSiliconPkg: Remove PCH SPI PPI and Protocol from package Michael Kubacki
` (7 preceding siblings ...)
2021-10-28 22:08 ` [PATCH v6 44/52] KabylakeSiliconPkg: Identify flash regions by GUID Michael Kubacki
@ 2021-10-28 22:08 ` Michael Kubacki
2021-11-02 23:25 ` [edk2-devel] " Nate DeSimone
2021-10-28 22:08 ` [PATCH v6 46/52] KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Update for new SPI PPI API Michael Kubacki
` (6 subsequent siblings)
15 siblings, 1 reply; 29+ messages in thread
From: Michael Kubacki @ 2021-10-28 22:08 UTC (permalink / raw)
To: devel; +Cc: Chasel Chiu, Rangasai V Chaganty, Nate DeSimone
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Updates references to the "PCH_SPI_PROTOCOL" and "PCH_SPI_PPI" to
instead refer to "PCH_SPI2_PROTOCOL" and "PCH_SPI2_PPI".
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c | 10 +++++-----
Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpi.c | 8 ++++----
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf | 2 +-
Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpi.h | 2 +-
Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf | 2 +-
5 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
index c34c378de2eb..d8388f10a0d6 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
@@ -8,7 +8,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <PchReservedResources.h>
#include <IndustryStandard/Pci30.h>
-#include <Ppi/Spi.h>
+#include <Ppi/Spi2.h>
#include <Register/PchRegsLpc.h>
#include <Register/PchRegsSpi.h>
#include <Library/DebugLib.h>
@@ -65,16 +65,16 @@ SpiServiceInit (
EFI_STATUS Status;
PEI_SPI_INSTANCE *PeiSpiInstance;
SPI_INSTANCE *SpiInstance;
- PCH_SPI_PPI *SpiPpi;
+ PCH_SPI2_PPI *Spi2Ppi;
UINT16 AcpiBase;
AcpiBase = 0;
Status = PeiServicesLocatePpi (
- &gPchSpiPpiGuid,
+ &gPchSpi2PpiGuid,
0,
NULL,
- (VOID **) &SpiPpi
+ (VOID **) &Spi2Ppi
);
if (Status != EFI_SUCCESS) {
@@ -102,7 +102,7 @@ SpiServiceInit (
SpiProtocolConstructor (SpiInstance);
PeiSpiInstance->PpiDescriptor.Flags = EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST;
- PeiSpiInstance->PpiDescriptor.Guid = &gPchSpiPpiGuid;
+ PeiSpiInstance->PpiDescriptor.Guid = &gPchSpi2PpiGuid;
PeiSpiInstance->PpiDescriptor.Ppi = &(SpiInstance->SpiProtocol);
Status = PeiServicesInstallPpi (&PeiSpiInstance->PpiDescriptor);
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpi.c b/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpi.c
index 1d84d0613454..60a3ffe8ecc6 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpi.c
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpi.c
@@ -28,8 +28,8 @@ GLOBAL_REMOVE_IF_UNREFERENCED UINT32 mSpiResvMmioAddr;
- Documented in System Management Mode Core Interface Specification .
- @result
- The SPI SMM driver produces @link _PCH_SPI_PROTOCOL PCH_SPI_PROTOCOL @endlink with GUID
- gPchSmmSpiProtocolGuid which is different from SPI RUNTIME driver.
+ The SPI SMM driver produces @link _PCH_SPI2_PROTOCOL PCH_SPI2_PROTOCOL @endlink with GUID
+ gPchSmmSpi2ProtocolGuid which is different from SPI RUNTIME driver.
- <b>Integration Check List</b>\n
- This driver supports Descriptor Mode only.
@@ -91,11 +91,11 @@ InstallPchSpi (
return Status;
}
///
- /// Install the SMM PCH_SPI_PROTOCOL interface
+ /// Install the SMM PCH_SPI2_PROTOCOL interface
///
Status = gSmst->SmmInstallProtocolInterface (
&(mSpiInstance->Handle),
- &gPchSmmSpiProtocolGuid,
+ &gPchSmmSpi2ProtocolGuid,
EFI_NATIVE_INTERFACE,
&(mSpiInstance->SpiProtocol)
);
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
index c6bc1ad406c8..ba57c44e1e12 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
@@ -42,4 +42,4 @@ [Pcd]
gSiPkgTokenSpaceGuid.PcdAcpiBaseAddress ## CONSUMES
[Ppis]
- gPchSpiPpiGuid ## PRODUCES
+ gPchSpi2PpiGuid ## PRODUCES
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpi.h b/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpi.h
index 43e158b60425..46e2d35c0ee0 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpi.h
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpi.h
@@ -17,7 +17,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Library/SmmServicesTableLib.h>
#include <Library/MmPciLib.h>
#include <PchAccess.h>
-#include <Protocol/Spi.h>
+#include <Protocol/Spi2.h>
#include <Library/PchSpiCommonLib.h>
#include <Library/CpuCommonLib.h>
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf b/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf
index 819dc2439f30..85eb7b91fa3c 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf
@@ -41,7 +41,7 @@ [Sources]
[Protocols]
-gPchSmmSpiProtocolGuid ## PRODUCES
+gPchSmmSpi2ProtocolGuid ## PRODUCES
[Depex]
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 29+ messages in thread* Re: [edk2-devel] [PATCH v6 45/52] KabylakeSiliconPkg: Update for SPI2 PPI and Protocol
2021-10-28 22:08 ` [PATCH v6 45/52] KabylakeSiliconPkg: Update for SPI2 PPI and Protocol Michael Kubacki
@ 2021-11-02 23:25 ` Nate DeSimone
0 siblings, 0 replies; 29+ messages in thread
From: Nate DeSimone @ 2021-11-02 23:25 UTC (permalink / raw)
To: devel@edk2.groups.io, mikuback@linux.microsoft.com
Cc: Chiu, Chasel, Chaganty, Rangasai V
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Michael Kubacki
Sent: Thursday, October 28, 2021 3:09 PM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@intel.com>; Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>
Subject: [edk2-devel] [PATCH v6 45/52] KabylakeSiliconPkg: Update for SPI2 PPI and Protocol
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Updates references to the "PCH_SPI_PROTOCOL" and "PCH_SPI_PPI" to instead refer to "PCH_SPI2_PROTOCOL" and "PCH_SPI2_PPI".
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c | 10 +++++-----
Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpi.c | 8 ++++----
Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf | 2 +-
Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpi.h | 2 +-
Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf | 2 +-
5 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
index c34c378de2eb..d8388f10a0d6 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
@@ -8,7 +8,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <PchReservedResources.h>
#include <IndustryStandard/Pci30.h>
-#include <Ppi/Spi.h>
+#include <Ppi/Spi2.h>
#include <Register/PchRegsLpc.h>
#include <Register/PchRegsSpi.h>
#include <Library/DebugLib.h>
@@ -65,16 +65,16 @@ SpiServiceInit (
EFI_STATUS Status;
PEI_SPI_INSTANCE *PeiSpiInstance;
SPI_INSTANCE *SpiInstance;
- PCH_SPI_PPI *SpiPpi;
+ PCH_SPI2_PPI *Spi2Ppi;
UINT16 AcpiBase;
AcpiBase = 0;
Status = PeiServicesLocatePpi (
- &gPchSpiPpiGuid,
+ &gPchSpi2PpiGuid,
0,
NULL,
- (VOID **) &SpiPpi
+ (VOID **) &Spi2Ppi
);
if (Status != EFI_SUCCESS) {
@@ -102,7 +102,7 @@ SpiServiceInit (
SpiProtocolConstructor (SpiInstance);
PeiSpiInstance->PpiDescriptor.Flags = EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST;
- PeiSpiInstance->PpiDescriptor.Guid = &gPchSpiPpiGuid;
+ PeiSpiInstance->PpiDescriptor.Guid = &gPchSpi2PpiGuid;
PeiSpiInstance->PpiDescriptor.Ppi = &(SpiInstance->SpiProtocol);
Status = PeiServicesInstallPpi (&PeiSpiInstance->PpiDescriptor); diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpi.c b/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpi.c
index 1d84d0613454..60a3ffe8ecc6 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpi.c
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpi.c
@@ -28,8 +28,8 @@ GLOBAL_REMOVE_IF_UNREFERENCED UINT32 mSpiResvMmioAddr;
- Documented in System Management Mode Core Interface Specification .
- @result
- The SPI SMM driver produces @link _PCH_SPI_PROTOCOL PCH_SPI_PROTOCOL @endlink with GUID
- gPchSmmSpiProtocolGuid which is different from SPI RUNTIME driver.
+ The SPI SMM driver produces @link _PCH_SPI2_PROTOCOL PCH_SPI2_PROTOCOL @endlink with GUID
+ gPchSmmSpi2ProtocolGuid which is different from SPI RUNTIME driver.
- <b>Integration Check List</b>\n
- This driver supports Descriptor Mode only.
@@ -91,11 +91,11 @@ InstallPchSpi (
return Status;
}
///
- /// Install the SMM PCH_SPI_PROTOCOL interface
+ /// Install the SMM PCH_SPI2_PROTOCOL interface
///
Status = gSmst->SmmInstallProtocolInterface (
&(mSpiInstance->Handle),
- &gPchSmmSpiProtocolGuid,
+ &gPchSmmSpi2ProtocolGuid,
EFI_NATIVE_INTERFACE,
&(mSpiInstance->SpiProtocol)
);
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
index c6bc1ad406c8..ba57c44e1e12 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.i
+++ nf
@@ -42,4 +42,4 @@ [Pcd]
gSiPkgTokenSpaceGuid.PcdAcpiBaseAddress ## CONSUMES
[Ppis]
- gPchSpiPpiGuid ## PRODUCES
+ gPchSpi2PpiGuid ## PRODUCES
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpi.h b/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpi.h
index 43e158b60425..46e2d35c0ee0 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpi.h
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpi.h
@@ -17,7 +17,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include <Library/SmmServicesTableLib.h> #include <Library/MmPciLib.h> #include <PchAccess.h> -#include <Protocol/Spi.h>
+#include <Protocol/Spi2.h>
#include <Library/PchSpiCommonLib.h>
#include <Library/CpuCommonLib.h>
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf b/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf
index 819dc2439f30..85eb7b91fa3c 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf
@@ -41,7 +41,7 @@ [Sources]
[Protocols]
-gPchSmmSpiProtocolGuid ## PRODUCES
+gPchSmmSpi2ProtocolGuid ## PRODUCES
[Depex]
--
2.28.0.windows.1
-=-=-=-=-=-=
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^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH v6 46/52] KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Update for new SPI PPI API
2021-10-28 22:08 [PATCH v6 36/52] KabylakeSiliconPkg: Remove PCH SPI PPI and Protocol from package Michael Kubacki
` (8 preceding siblings ...)
2021-10-28 22:08 ` [PATCH v6 45/52] KabylakeSiliconPkg: Update for SPI2 PPI and Protocol Michael Kubacki
@ 2021-10-28 22:08 ` Michael Kubacki
2021-11-02 23:26 ` Nate DeSimone
2021-10-28 22:08 ` [PATCH v6 47/52] KabylakeOpenBoardPkg/KabylakeRvp3: Add PeiSerialPortlibSpiFlash to build Michael Kubacki
` (5 subsequent siblings)
15 siblings, 1 reply; 29+ messages in thread
From: Michael Kubacki @ 2021-10-28 22:08 UTC (permalink / raw)
To: devel; +Cc: Chasel Chiu, Nate DeSimone, Benjamin Doron
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Updates usage of gPchSpiPpiGuid to use the new interface that
identifies SPI flash regions by GUID.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Tested-by: Benjamin Doron <benjamin.doron00@gmail.com>
---
Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.c | 46 ++++++++++----------
Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf | 3 +-
2 files changed, 25 insertions(+), 24 deletions(-)
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.c b/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.c
index fc48bdc6fccb..17fa328add1c 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.c
+++ b/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.c
@@ -8,7 +8,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <Base.h>
-#include <Ppi/Spi.h>
+#include <Ppi/Spi2.h>
#include <Library/BaseLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/HobLib.h>
@@ -24,29 +24,29 @@ typedef struct {
/**
Returns a pointer to the PCH SPI PPI.
- @return Pointer to PCH_SPI_PPI If an instance of the PCH SPI PPI is found
+ @return Pointer to PCH_SPI2_PPI If an instance of the PCH SPI PPI is found
@return NULL If an instance of the PCH SPI PPI is not found
**/
-PCH_SPI_PPI *
+PCH_SPI2_PPI *
GetSpiPpi (
VOID
)
{
EFI_STATUS Status;
- PCH_SPI_PPI *PchSpiPpi;
+ PCH_SPI2_PPI *PchSpi2Ppi;
Status = PeiServicesLocatePpi (
- &gPchSpiPpiGuid,
+ &gPchSpi2PpiGuid,
0,
NULL,
- (VOID **) &PchSpiPpi
+ (VOID **) &PchSpi2Ppi
);
if (EFI_ERROR (Status)) {
return NULL;
}
- return PchSpiPpi;
+ return PchSpi2Ppi;
}
/**
@@ -67,7 +67,7 @@ SerialPortWrite (
EFI_STATUS Status;
EFI_HOB_GUID_TYPE *GuidHob;
SPI_FLASH_DEBUG_CONTEXT *Context;
- PCH_SPI_PPI *PchSpiPpi;
+ PCH_SPI2_PPI *PchSpi2Ppi;
UINT32 BytesWritten;
UINT32 SourceBufferOffset;
UINT32 NvMessageAreaSize;
@@ -89,19 +89,19 @@ SerialPortWrite (
if (Context == NULL || Context->CurrentWriteOffset >= NvMessageAreaSize) {
return 0;
}
- PchSpiPpi = GetSpiPpi ();
- if (PchSpiPpi == NULL) {
+ PchSpi2Ppi = GetSpiPpi ();
+ if (PchSpi2Ppi == NULL) {
return 0;
}
if ((Context->CurrentWriteOffset + NumberOfBytes) / NvMessageAreaSize > 0) {
LinearOffset = (UINT32) (FixedPcdGet32 (PcdFlashNvDebugMessageBase) - FixedPcdGet32 (PcdFlashAreaBaseAddress));
- Status = PchSpiPpi->FlashErase (
- PchSpiPpi,
- FlashRegionBios,
- LinearOffset,
- NvMessageAreaSize
- );
+ Status = PchSpi2Ppi->FlashErase (
+ PchSpi2Ppi,
+ &gFlashRegionBiosGuid,
+ LinearOffset,
+ NvMessageAreaSize
+ );
if (!EFI_ERROR (Status)) {
Context->CurrentWriteOffset = 0;
} else {
@@ -116,13 +116,13 @@ SerialPortWrite (
LinearOffset = (FixedPcdGet32 (PcdFlashNvDebugMessageBase) + Context->CurrentWriteOffset) - FixedPcdGet32 (PcdFlashAreaBaseAddress);
- Status = PchSpiPpi->FlashWrite (
- PchSpiPpi,
- FlashRegionBios,
- LinearOffset,
- BytesWritten,
- (UINT8 *) &Buffer[SourceBufferOffset]
- );
+ Status = PchSpi2Ppi->FlashWrite (
+ PchSpi2Ppi,
+ &gFlashRegionBiosGuid,
+ LinearOffset,
+ BytesWritten,
+ (UINT8 *) &Buffer[SourceBufferOffset]
+ );
if (!EFI_ERROR (Status)) {
Context->CurrentWriteOffset += BytesWritten;
return BytesWritten;
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf b/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf
index b959cd1f4612..651bf93faf62 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf
@@ -40,9 +40,10 @@ [Sources]
PeiSerialPortLibSpiFlash.c
[Ppis]
- gPchSpiPpiGuid
+ gPchSpi2PpiGuid
[Guids]
+ gFlashRegionBiosGuid
gSpiFlashDebugHobGuid
[Pcd]
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 29+ messages in thread* Re: [PATCH v6 46/52] KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Update for new SPI PPI API
2021-10-28 22:08 ` [PATCH v6 46/52] KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Update for new SPI PPI API Michael Kubacki
@ 2021-11-02 23:26 ` Nate DeSimone
0 siblings, 0 replies; 29+ messages in thread
From: Nate DeSimone @ 2021-11-02 23:26 UTC (permalink / raw)
To: mikuback@linux.microsoft.com, devel@edk2.groups.io
Cc: Chiu, Chasel, Benjamin Doron
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
-----Original Message-----
From: mikuback@linux.microsoft.com <mikuback@linux.microsoft.com>
Sent: Thursday, October 28, 2021 3:09 PM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Benjamin Doron <benjamin.doron00@gmail.com>
Subject: [PATCH v6 46/52] KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Update for new SPI PPI API
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Updates usage of gPchSpiPpiGuid to use the new interface that identifies SPI flash regions by GUID.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Tested-by: Benjamin Doron <benjamin.doron00@gmail.com>
---
Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.c | 46 ++++++++++----------
Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf | 3 +-
2 files changed, 25 insertions(+), 24 deletions(-)
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.c b/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.c
index fc48bdc6fccb..17fa328add1c 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.c
+++ b/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFla
+++ sh/PeiSerialPortLibSpiFlash.c
@@ -8,7 +8,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent **/
#include <Base.h>
-#include <Ppi/Spi.h>
+#include <Ppi/Spi2.h>
#include <Library/BaseLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/HobLib.h>
@@ -24,29 +24,29 @@ typedef struct {
/**
Returns a pointer to the PCH SPI PPI.
- @return Pointer to PCH_SPI_PPI If an instance of the PCH SPI PPI is found
+ @return Pointer to PCH_SPI2_PPI If an instance of the PCH SPI PPI is found
@return NULL If an instance of the PCH SPI PPI is not found
**/
-PCH_SPI_PPI *
+PCH_SPI2_PPI *
GetSpiPpi (
VOID
)
{
EFI_STATUS Status;
- PCH_SPI_PPI *PchSpiPpi;
+ PCH_SPI2_PPI *PchSpi2Ppi;
Status = PeiServicesLocatePpi (
- &gPchSpiPpiGuid,
+ &gPchSpi2PpiGuid,
0,
NULL,
- (VOID **) &PchSpiPpi
+ (VOID **) &PchSpi2Ppi
);
if (EFI_ERROR (Status)) {
return NULL;
}
- return PchSpiPpi;
+ return PchSpi2Ppi;
}
/**
@@ -67,7 +67,7 @@ SerialPortWrite (
EFI_STATUS Status;
EFI_HOB_GUID_TYPE *GuidHob;
SPI_FLASH_DEBUG_CONTEXT *Context;
- PCH_SPI_PPI *PchSpiPpi;
+ PCH_SPI2_PPI *PchSpi2Ppi;
UINT32 BytesWritten;
UINT32 SourceBufferOffset;
UINT32 NvMessageAreaSize;
@@ -89,19 +89,19 @@ SerialPortWrite (
if (Context == NULL || Context->CurrentWriteOffset >= NvMessageAreaSize) {
return 0;
}
- PchSpiPpi = GetSpiPpi ();
- if (PchSpiPpi == NULL) {
+ PchSpi2Ppi = GetSpiPpi ();
+ if (PchSpi2Ppi == NULL) {
return 0;
}
if ((Context->CurrentWriteOffset + NumberOfBytes) / NvMessageAreaSize > 0) {
LinearOffset = (UINT32) (FixedPcdGet32 (PcdFlashNvDebugMessageBase) - FixedPcdGet32 (PcdFlashAreaBaseAddress));
- Status = PchSpiPpi->FlashErase (
- PchSpiPpi,
- FlashRegionBios,
- LinearOffset,
- NvMessageAreaSize
- );
+ Status = PchSpi2Ppi->FlashErase (
+ PchSpi2Ppi,
+ &gFlashRegionBiosGuid,
+ LinearOffset,
+ NvMessageAreaSize
+ );
if (!EFI_ERROR (Status)) {
Context->CurrentWriteOffset = 0;
} else {
@@ -116,13 +116,13 @@ SerialPortWrite (
LinearOffset = (FixedPcdGet32 (PcdFlashNvDebugMessageBase) + Context->CurrentWriteOffset) - FixedPcdGet32 (PcdFlashAreaBaseAddress);
- Status = PchSpiPpi->FlashWrite (
- PchSpiPpi,
- FlashRegionBios,
- LinearOffset,
- BytesWritten,
- (UINT8 *) &Buffer[SourceBufferOffset]
- );
+ Status = PchSpi2Ppi->FlashWrite (
+ PchSpi2Ppi,
+ &gFlashRegionBiosGuid,
+ LinearOffset,
+ BytesWritten,
+ (UINT8 *) &Buffer[SourceBufferOffset]
+ );
if (!EFI_ERROR (Status)) {
Context->CurrentWriteOffset += BytesWritten;
return BytesWritten;
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf b/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf
index b959cd1f4612..651bf93faf62 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFla
+++ sh/PeiSerialPortLibSpiFlash.inf
@@ -40,9 +40,10 @@ [Sources]
PeiSerialPortLibSpiFlash.c
[Ppis]
- gPchSpiPpiGuid
+ gPchSpi2PpiGuid
[Guids]
+ gFlashRegionBiosGuid
gSpiFlashDebugHobGuid
[Pcd]
--
2.28.0.windows.1
^ permalink raw reply [flat|nested] 29+ messages in thread
* [PATCH v6 47/52] KabylakeOpenBoardPkg/KabylakeRvp3: Add PeiSerialPortlibSpiFlash to build
2021-10-28 22:08 [PATCH v6 36/52] KabylakeSiliconPkg: Remove PCH SPI PPI and Protocol from package Michael Kubacki
` (9 preceding siblings ...)
2021-10-28 22:08 ` [PATCH v6 46/52] KabylakeOpenBoardPkg/PeiSerialPortLibSpiFlash: Update for new SPI PPI API Michael Kubacki
@ 2021-10-28 22:08 ` Michael Kubacki
2021-11-02 23:26 ` Nate DeSimone
2021-10-28 22:08 ` [PATCH v6 48/52] SimicsIch10Pkg/BasePchSpiCommonLib: Identify flash regions by GUID Michael Kubacki
` (4 subsequent siblings)
15 siblings, 1 reply; 29+ messages in thread
From: Michael Kubacki @ 2021-10-28 22:08 UTC (permalink / raw)
To: devel; +Cc: Chasel Chiu, Nate DeSimone, Benjamin Doron
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
This library is part of KabylakeOpenBoardPkg but is currently not
built anywhere. This change adds the library to the KabylakeRvp3
build to ensure it can always build properly if not linked
elsewhere.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Tested-by: Benjamin Doron <benjamin.doron00@gmail.com>
---
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
index f7819d294036..a46d36b05635 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
@@ -394,6 +394,8 @@ [Components.IA32]
!endif
$(PLATFORM_BOARD_PACKAGE)/BiosInfo/BiosInfo.inf
+ $(PLATFORM_BOARD_PACKAGE)/Library/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf
+
#######################################
# DXE Components
#######################################
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 29+ messages in thread* Re: [PATCH v6 47/52] KabylakeOpenBoardPkg/KabylakeRvp3: Add PeiSerialPortlibSpiFlash to build
2021-10-28 22:08 ` [PATCH v6 47/52] KabylakeOpenBoardPkg/KabylakeRvp3: Add PeiSerialPortlibSpiFlash to build Michael Kubacki
@ 2021-11-02 23:26 ` Nate DeSimone
0 siblings, 0 replies; 29+ messages in thread
From: Nate DeSimone @ 2021-11-02 23:26 UTC (permalink / raw)
To: mikuback@linux.microsoft.com, devel@edk2.groups.io
Cc: Chiu, Chasel, Benjamin Doron
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
-----Original Message-----
From: mikuback@linux.microsoft.com <mikuback@linux.microsoft.com>
Sent: Thursday, October 28, 2021 3:09 PM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Benjamin Doron <benjamin.doron00@gmail.com>
Subject: [PATCH v6 47/52] KabylakeOpenBoardPkg/KabylakeRvp3: Add PeiSerialPortlibSpiFlash to build
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
This library is part of KabylakeOpenBoardPkg but is currently not built anywhere. This change adds the library to the KabylakeRvp3 build to ensure it can always build properly if not linked elsewhere.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Tested-by: Benjamin Doron <benjamin.doron00@gmail.com>
---
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
index f7819d294036..a46d36b05635 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
@@ -394,6 +394,8 @@ [Components.IA32]
!endif
$(PLATFORM_BOARD_PACKAGE)/BiosInfo/BiosInfo.inf
+
+ $(PLATFORM_BOARD_PACKAGE)/Library/PeiSerialPortLibSpiFlash/PeiSerialPo
+ rtLibSpiFlash.inf
+
#######################################
# DXE Components
#######################################
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH v6 48/52] SimicsIch10Pkg/BasePchSpiCommonLib: Identify flash regions by GUID
2021-10-28 22:08 [PATCH v6 36/52] KabylakeSiliconPkg: Remove PCH SPI PPI and Protocol from package Michael Kubacki
` (10 preceding siblings ...)
2021-10-28 22:08 ` [PATCH v6 47/52] KabylakeOpenBoardPkg/KabylakeRvp3: Add PeiSerialPortlibSpiFlash to build Michael Kubacki
@ 2021-10-28 22:08 ` Michael Kubacki
2021-11-02 23:27 ` Nate DeSimone
2021-10-28 22:08 ` [PATCH v6 49/52] SimicsIch10Pkg/PchSpiSmm: Update for SPI2 Protocol Michael Kubacki
` (3 subsequent siblings)
15 siblings, 1 reply; 29+ messages in thread
From: Michael Kubacki @ 2021-10-28 22:08 UTC (permalink / raw)
To: devel; +Cc: Agyeman Prince, Nate DeSimone
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Updates the library to identify flash regions by GUID and internally
map the GUID entries to values specific to SimicsIch10Pkg.
Cc: Agyeman Prince <prince.agyeman@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c | 187 +++++++++++++++-----
Silicon/Intel/SimicsIch10Pkg/IncludePrivate/Library/PchSpiCommonLib.h | 68 +++----
Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf | 11 ++
3 files changed, 185 insertions(+), 81 deletions(-)
diff --git a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c
index fc2a8be76b6a..22eb57cdec03 100644
--- a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c
+++ b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c
@@ -2,20 +2,106 @@
PCH SPI Common Driver implements the SPI Host Controller Compatibility Interface.
Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
+ Copyright (c) Microsoft Corporation.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <Uefi/UefiBaseType.h>
+#include <Guid/FlashRegion.h>
#include <Library/IoLib.h>
#include <Library/DebugLib.h>
#include <Library/BaseMemoryLib.h>
#include <IndustryStandard/Pci30.h>
#include <PchAccess.h>
-#include <Protocol/Spi.h>
+#include <Protocol/Spi2.h>
#include <IncludePrivate/Library/PchSpiCommonLib.h>
#include <Register/X58Ich10.h>
+typedef enum {
+ FlashRegionDescriptor,
+ FlashRegionBios,
+ FlashRegionMe,
+ FlashRegionGbe,
+ FlashRegionPlatformData,
+ FlashRegionDer,
+ FlashRegionAll,
+ FlashRegionMax
+} FLASH_REGION_TYPE;
+
+typedef struct {
+ EFI_GUID *Guid;
+ FLASH_REGION_TYPE Type;
+} FLASH_REGION_MAPPING;
+
+FLASH_REGION_MAPPING mFlashRegionTypes[] = {
+ {
+ &gFlashRegionDescriptorGuid,
+ FlashRegionDescriptor
+ },
+ {
+ &gFlashRegionBiosGuid,
+ FlashRegionBios
+ },
+ {
+ &gFlashRegionMeGuid,
+ FlashRegionMe
+ },
+ {
+ &gFlashRegionGbeGuid,
+ FlashRegionGbe
+ },
+ {
+ &gFlashRegionPlatformDataGuid,
+ FlashRegionPlatformData
+ },
+ {
+ &gFlashRegionDerGuid,
+ FlashRegionDer
+ },
+ {
+ &gFlashRegionAllGuid,
+ FlashRegionAll
+ },
+ {
+ &gFlashRegionMaxGuid,
+ FlashRegionMax
+ }
+};
+
+/**
+ Returns the type of a flash region given its GUID.
+
+ @param[in] FlashRegionGuid Pointer to the flash region GUID.
+ @param[out] FlashRegionType Pointer to a buffer that will be set to the flash region type value.
+
+ @retval EFI_SUCCESS The flash region type was found for the given flash region GUID.
+ @retval EFI_INVALID_PARAMETER A pointer argument passed to the function is NULL.
+ @retval EFI_NOT_FOUND The flash region type was not found for the given flash region GUID.
+
+**/
+EFI_STATUS
+GetFlashRegionType (
+ IN EFI_GUID *FlashRegionGuid,
+ OUT FLASH_REGION_TYPE *FlashRegionType
+ )
+{
+ UINTN Index;
+
+ if (FlashRegionGuid == NULL || FlashRegionType == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ for (Index = 0; Index < ARRAY_SIZE (mFlashRegionTypes); Index++) {
+ if (CompareGuid (mFlashRegionTypes[Index].Guid, FlashRegionGuid)) {
+ *FlashRegionType = mFlashRegionTypes[Index].Type;
+ return EFI_SUCCESS;
+ }
+ }
+
+ return EFI_NOT_FOUND;
+}
+
/**
Initialize an SPI protocol instance.
@@ -144,8 +230,8 @@ PchPmTimerStallRuntimeSafe (
/**
Read data from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[out] Buffer The Pointer to caller-allocated buffer containing the dada received.
@@ -158,8 +244,8 @@ PchPmTimerStallRuntimeSafe (
EFI_STATUS
EFIAPI
SpiProtocolFlashRead (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
OUT UINT8 *Buffer
@@ -172,7 +258,7 @@ SpiProtocolFlashRead (
//
Status = SendSpiCmd (
This,
- FlashRegionType,
+ FlashRegionGuid,
FlashCycleRead,
Address,
ByteCount,
@@ -184,8 +270,8 @@ SpiProtocolFlashRead (
/**
Write data to the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[in] Buffer Pointer to caller-allocated buffer containing the data sent during the SPI cycle.
@@ -197,8 +283,8 @@ SpiProtocolFlashRead (
EFI_STATUS
EFIAPI
SpiProtocolFlashWrite (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
IN UINT8 *Buffer
@@ -211,7 +297,7 @@ SpiProtocolFlashWrite (
//
Status = SendSpiCmd (
This,
- FlashRegionType,
+ FlashRegionGuid,
FlashCycleWrite,
Address,
ByteCount,
@@ -223,8 +309,8 @@ SpiProtocolFlashWrite (
/**
Erase some area on the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@@ -235,8 +321,8 @@ SpiProtocolFlashWrite (
EFI_STATUS
EFIAPI
SpiProtocolFlashErase (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount
)
@@ -248,7 +334,7 @@ SpiProtocolFlashErase (
//
Status = SendSpiCmd (
This,
- FlashRegionType,
+ FlashRegionGuid,
FlashCycleErase,
Address,
ByteCount,
@@ -260,7 +346,7 @@ SpiProtocolFlashErase (
/**
Read SFDP data from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] Address The starting byte address for SFDP data read.
@param[in] ByteCount Number of bytes in SFDP data portion of the SPI cycle
@@ -274,7 +360,7 @@ SpiProtocolFlashErase (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadSfdp (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -303,7 +389,7 @@ SpiProtocolFlashReadSfdp (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleReadSfdp,
FlashAddress,
ByteCount,
@@ -315,7 +401,7 @@ SpiProtocolFlashReadSfdp (
/**
Read Jedec Id from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] ByteCount Number of bytes in JedecId data portion of the SPI cycle, the data size is 3 typically
@param[out] JedecId The Pointer to caller-allocated buffer containing JEDEC ID received
@@ -328,7 +414,7 @@ SpiProtocolFlashReadSfdp (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadJedecId (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 ByteCount,
OUT UINT8 *JedecId
@@ -356,7 +442,7 @@ SpiProtocolFlashReadJedecId (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleReadJedecId,
Address,
ByteCount,
@@ -368,7 +454,7 @@ SpiProtocolFlashReadJedecId (
/**
Write the status register in the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[in] StatusValue The Pointer to caller-allocated buffer containing the value of Status register writing
@@ -379,7 +465,7 @@ SpiProtocolFlashReadJedecId (
EFI_STATUS
EFIAPI
SpiProtocolFlashWriteStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
IN UINT8 *StatusValue
)
@@ -391,7 +477,7 @@ SpiProtocolFlashWriteStatus (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleWriteStatus,
0,
ByteCount,
@@ -403,7 +489,7 @@ SpiProtocolFlashWriteStatus (
/**
Read status register in the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[out] StatusValue The Pointer to caller-allocated buffer containing the value of Status register received.
@@ -414,7 +500,7 @@ SpiProtocolFlashWriteStatus (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
OUT UINT8 *StatusValue
)
@@ -426,7 +512,7 @@ SpiProtocolFlashReadStatus (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleReadStatus,
0,
ByteCount,
@@ -438,8 +524,8 @@ SpiProtocolFlashReadStatus (
/**
Get the SPI region base and size, based on the enum type
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for for the base address which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for the base address which corresponds to the type in the descriptor.
@param[out] BaseAddress The Flash Linear Address for the Region 'n' Base
@param[out] RegionSize The size for the Region 'n'
@@ -450,18 +536,25 @@ SpiProtocolFlashReadStatus (
EFI_STATUS
EFIAPI
SpiProtocolGetRegionAddress (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
OUT UINT32 *BaseAddress,
OUT UINT32 *RegionSize
)
{
- SPI_INSTANCE *SpiInstance;
- UINTN PchSpiBar0;
- UINT32 ReadValue;
+ EFI_STATUS Status;
+ FLASH_REGION_TYPE FlashRegionType;
+ SPI_INSTANCE *SpiInstance;
+ UINTN PchSpiBar0;
+ UINT32 ReadValue;
SpiInstance = SPI_INSTANCE_FROM_SPIPROTOCOL (This);
+ Status = GetFlashRegionType (FlashRegionGuid, &FlashRegionType);
+ if (EFI_ERROR (Status)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
if (FlashRegionType >= FlashRegionMax) {
return EFI_INVALID_PARAMETER;
}
@@ -496,7 +589,7 @@ SpiProtocolGetRegionAddress (
/**
Read PCH Soft Strap Values
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing PCH Soft Strap Value.
@@ -510,7 +603,7 @@ SpiProtocolGetRegionAddress (
EFI_STATUS
EFIAPI
SpiProtocolReadPchSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -542,7 +635,7 @@ SpiProtocolReadPchSoftStrap (
//
Status = SendSpiCmd (
This,
- FlashRegionDescriptor,
+ &gFlashRegionDescriptorGuid,
FlashCycleRead,
StrapFlashAddr,
ByteCount,
@@ -554,7 +647,7 @@ SpiProtocolReadPchSoftStrap (
/**
Read CPU Soft Strap Values
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle.
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing CPU Soft Strap Value.
@@ -568,7 +661,7 @@ SpiProtocolReadPchSoftStrap (
EFI_STATUS
EFIAPI
SpiProtocolReadCpuSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -600,7 +693,7 @@ SpiProtocolReadCpuSoftStrap (
//
Status = SendSpiCmd (
This,
- FlashRegionDescriptor,
+ &gFlashRegionDescriptorGuid,
FlashCycleRead,
StrapFlashAddr,
ByteCount,
@@ -612,8 +705,8 @@ SpiProtocolReadCpuSoftStrap (
/**
This function sends the programmed SPI command to the slave device.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] SpiRegionType The SPI Region type for flash cycle which is listed in the Descriptor
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] FlashCycleType The Flash SPI cycle type list in HSFC (Hardware Sequencing Flash Control Register) register
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@@ -626,8 +719,8 @@ SpiProtocolReadCpuSoftStrap (
**/
EFI_STATUS
SendSpiCmd (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN FLASH_CYCLE_TYPE FlashCycleType,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -682,7 +775,7 @@ SendSpiCmd (
goto SendSpiCmdEnd;
}
- Status = SpiProtocolGetRegionAddress (This, FlashRegionType, &HardwareSpiAddr, &FlashRegionSize);
+ Status = SpiProtocolGetRegionAddress (This, FlashRegionGuid, &HardwareSpiAddr, &FlashRegionSize);
if (EFI_ERROR (Status)) {
goto SendSpiCmdEnd;
}
@@ -897,7 +990,7 @@ SendSpiCmd (
**/
BOOLEAN
WaitForSpiCycleComplete (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINTN PchSpiBar0,
IN BOOLEAN ErrorCheck
)
diff --git a/Silicon/Intel/SimicsIch10Pkg/IncludePrivate/Library/PchSpiCommonLib.h b/Silicon/Intel/SimicsIch10Pkg/IncludePrivate/Library/PchSpiCommonLib.h
index 2c8162ac8170..00586e9c9aef 100644
--- a/Silicon/Intel/SimicsIch10Pkg/IncludePrivate/Library/PchSpiCommonLib.h
+++ b/Silicon/Intel/SimicsIch10Pkg/IncludePrivate/Library/PchSpiCommonLib.h
@@ -48,7 +48,7 @@ typedef enum {
typedef struct {
UINT32 Signature;
EFI_HANDLE Handle;
- PCH_SPI_PROTOCOL SpiProtocol;
+ PCH_SPI2_PROTOCOL SpiProtocol;
UINT16 PchAcpiBase;
UINTN PchSpiBase;
UINT16 ReadPermission;
@@ -134,8 +134,8 @@ ReleaseSpiBar0 (
/**
Read data from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[out] Buffer The Pointer to caller-allocated buffer containing the dada received.
@@ -148,8 +148,8 @@ ReleaseSpiBar0 (
EFI_STATUS
EFIAPI
SpiProtocolFlashRead (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
OUT UINT8 *Buffer
@@ -158,8 +158,8 @@ SpiProtocolFlashRead (
/**
Write data to the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[in] Buffer Pointer to caller-allocated buffer containing the data sent during the SPI cycle.
@@ -171,8 +171,8 @@ SpiProtocolFlashRead (
EFI_STATUS
EFIAPI
SpiProtocolFlashWrite (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
IN UINT8 *Buffer
@@ -181,8 +181,8 @@ SpiProtocolFlashWrite (
/**
Erase some area on the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@@ -193,8 +193,8 @@ SpiProtocolFlashWrite (
EFI_STATUS
EFIAPI
SpiProtocolFlashErase (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount
);
@@ -202,7 +202,7 @@ SpiProtocolFlashErase (
/**
Read SFDP data from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] Address The starting byte address for SFDP data read.
@param[in] ByteCount Number of bytes in SFDP data portion of the SPI cycle
@@ -216,7 +216,7 @@ SpiProtocolFlashErase (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadSfdp (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -226,7 +226,7 @@ SpiProtocolFlashReadSfdp (
/**
Read Jedec Id from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] ByteCount Number of bytes in JedecId data portion of the SPI cycle, the data size is 3 typically
@param[out] JedecId The Pointer to caller-allocated buffer containing JEDEC ID received
@@ -239,7 +239,7 @@ SpiProtocolFlashReadSfdp (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadJedecId (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 ByteCount,
OUT UINT8 *JedecId
@@ -248,7 +248,7 @@ SpiProtocolFlashReadJedecId (
/**
Write the status register in the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[in] StatusValue The Pointer to caller-allocated buffer containing the value of Status register writing
@@ -259,7 +259,7 @@ SpiProtocolFlashReadJedecId (
EFI_STATUS
EFIAPI
SpiProtocolFlashWriteStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
IN UINT8 *StatusValue
);
@@ -267,7 +267,7 @@ SpiProtocolFlashWriteStatus (
/**
Read status register in the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[out] StatusValue The Pointer to caller-allocated buffer containing the value of Status register received.
@@ -278,7 +278,7 @@ SpiProtocolFlashWriteStatus (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
OUT UINT8 *StatusValue
);
@@ -286,8 +286,8 @@ SpiProtocolFlashReadStatus (
/**
Get the SPI region base and size, based on the enum type
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for for the base address which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for the base address which corresponds to the type in the descriptor.
@param[out] BaseAddress The Flash Linear Address for the Region 'n' Base
@param[out] RegionSize The size for the Region 'n'
@@ -298,8 +298,8 @@ SpiProtocolFlashReadStatus (
EFI_STATUS
EFIAPI
SpiProtocolGetRegionAddress (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
OUT UINT32 *BaseAddress,
OUT UINT32 *RegionSize
);
@@ -307,7 +307,7 @@ SpiProtocolGetRegionAddress (
/**
Read PCH Soft Strap Values
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing PCH Soft Strap Value.
@@ -321,7 +321,7 @@ SpiProtocolGetRegionAddress (
EFI_STATUS
EFIAPI
SpiProtocolReadPchSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -330,7 +330,7 @@ SpiProtocolReadPchSoftStrap (
/**
Read CPU Soft Strap Values
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle.
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing CPU Soft Strap Value.
@@ -344,7 +344,7 @@ SpiProtocolReadPchSoftStrap (
EFI_STATUS
EFIAPI
SpiProtocolReadCpuSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -353,8 +353,8 @@ SpiProtocolReadCpuSoftStrap (
/**
This function sends the programmed SPI command to the slave device.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] SpiRegionType The SPI Region type for flash cycle which is listed in the Descriptor
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] FlashCycleType The Flash SPI cycle type list in HSFC (Hardware Sequencing Flash Control Register) register
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@@ -367,8 +367,8 @@ SpiProtocolReadCpuSoftStrap (
**/
EFI_STATUS
SendSpiCmd (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN FLASH_CYCLE_TYPE FlashCycleType,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -388,7 +388,7 @@ SendSpiCmd (
**/
BOOLEAN
WaitForSpiCycleComplete (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINTN PchSpiBar0,
IN BOOLEAN ErrorCheck
);
diff --git a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
index b5aa13c1c56d..3a64005b5690 100644
--- a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
+++ b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
@@ -2,6 +2,7 @@
# Component description file for the PchSpiCommonLib
#
# Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
+# Copyright (c) Microsoft Corporation.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -30,3 +31,13 @@ [LibraryClasses]
[Pcd]
gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress ## CONSUMES
gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize ## CONSUMES
+
+[Guids]
+ gFlashRegionDescriptorGuid
+ gFlashRegionBiosGuid
+ gFlashRegionMeGuid
+ gFlashRegionGbeGuid
+ gFlashRegionPlatformDataGuid
+ gFlashRegionDerGuid
+ gFlashRegionAllGuid
+ gFlashRegionMaxGuid
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 29+ messages in thread* Re: [PATCH v6 48/52] SimicsIch10Pkg/BasePchSpiCommonLib: Identify flash regions by GUID
2021-10-28 22:08 ` [PATCH v6 48/52] SimicsIch10Pkg/BasePchSpiCommonLib: Identify flash regions by GUID Michael Kubacki
@ 2021-11-02 23:27 ` Nate DeSimone
0 siblings, 0 replies; 29+ messages in thread
From: Nate DeSimone @ 2021-11-02 23:27 UTC (permalink / raw)
To: mikuback@linux.microsoft.com, devel@edk2.groups.io; +Cc: Agyeman, Prince
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
-----Original Message-----
From: mikuback@linux.microsoft.com <mikuback@linux.microsoft.com>
Sent: Thursday, October 28, 2021 3:09 PM
To: devel@edk2.groups.io
Cc: Agyeman, Prince <prince.agyeman@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>
Subject: [PATCH v6 48/52] SimicsIch10Pkg/BasePchSpiCommonLib: Identify flash regions by GUID
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Updates the library to identify flash regions by GUID and internally map the GUID entries to values specific to SimicsIch10Pkg.
Cc: Agyeman Prince <prince.agyeman@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c | 187 +++++++++++++++-----
Silicon/Intel/SimicsIch10Pkg/IncludePrivate/Library/PchSpiCommonLib.h | 68 +++----
Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf | 11 ++
3 files changed, 185 insertions(+), 81 deletions(-)
diff --git a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c
index fc2a8be76b6a..22eb57cdec03 100644
--- a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/SpiCommon.c
+++ b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/Sp
+++ iCommon.c
@@ -2,20 +2,106 @@
PCH SPI Common Driver implements the SPI Host Controller Compatibility Interface.
Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
+ Copyright (c) Microsoft Corporation.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent **/
#include <Uefi/UefiBaseType.h>
+#include <Guid/FlashRegion.h>
#include <Library/IoLib.h>
#include <Library/DebugLib.h>
#include <Library/BaseMemoryLib.h>
#include <IndustryStandard/Pci30.h>
#include <PchAccess.h>
-#include <Protocol/Spi.h>
+#include <Protocol/Spi2.h>
#include <IncludePrivate/Library/PchSpiCommonLib.h>
#include <Register/X58Ich10.h>
+typedef enum {
+ FlashRegionDescriptor,
+ FlashRegionBios,
+ FlashRegionMe,
+ FlashRegionGbe,
+ FlashRegionPlatformData,
+ FlashRegionDer,
+ FlashRegionAll,
+ FlashRegionMax
+} FLASH_REGION_TYPE;
+
+typedef struct {
+ EFI_GUID *Guid;
+ FLASH_REGION_TYPE Type;
+} FLASH_REGION_MAPPING;
+
+FLASH_REGION_MAPPING mFlashRegionTypes[] = {
+ {
+ &gFlashRegionDescriptorGuid,
+ FlashRegionDescriptor
+ },
+ {
+ &gFlashRegionBiosGuid,
+ FlashRegionBios
+ },
+ {
+ &gFlashRegionMeGuid,
+ FlashRegionMe
+ },
+ {
+ &gFlashRegionGbeGuid,
+ FlashRegionGbe
+ },
+ {
+ &gFlashRegionPlatformDataGuid,
+ FlashRegionPlatformData
+ },
+ {
+ &gFlashRegionDerGuid,
+ FlashRegionDer
+ },
+ {
+ &gFlashRegionAllGuid,
+ FlashRegionAll
+ },
+ {
+ &gFlashRegionMaxGuid,
+ FlashRegionMax
+ }
+};
+
+/**
+ Returns the type of a flash region given its GUID.
+
+ @param[in] FlashRegionGuid Pointer to the flash region GUID.
+ @param[out] FlashRegionType Pointer to a buffer that will be set to the flash region type value.
+
+ @retval EFI_SUCCESS The flash region type was found for the given flash region GUID.
+ @retval EFI_INVALID_PARAMETER A pointer argument passed to the function is NULL.
+ @retval EFI_NOT_FOUND The flash region type was not found for the given flash region GUID.
+
+**/
+EFI_STATUS
+GetFlashRegionType (
+ IN EFI_GUID *FlashRegionGuid,
+ OUT FLASH_REGION_TYPE *FlashRegionType
+ )
+{
+ UINTN Index;
+
+ if (FlashRegionGuid == NULL || FlashRegionType == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ for (Index = 0; Index < ARRAY_SIZE (mFlashRegionTypes); Index++) {
+ if (CompareGuid (mFlashRegionTypes[Index].Guid, FlashRegionGuid)) {
+ *FlashRegionType = mFlashRegionTypes[Index].Type;
+ return EFI_SUCCESS;
+ }
+ }
+
+ return EFI_NOT_FOUND;
+}
+
/**
Initialize an SPI protocol instance.
@@ -144,8 +230,8 @@ PchPmTimerStallRuntimeSafe (
/**
Read data from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[out] Buffer The Pointer to caller-allocated buffer containing the dada received.
@@ -158,8 +244,8 @@ PchPmTimerStallRuntimeSafe ( EFI_STATUS EFIAPI SpiProtocolFlashRead (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
OUT UINT8 *Buffer
@@ -172,7 +258,7 @@ SpiProtocolFlashRead (
//
Status = SendSpiCmd (
This,
- FlashRegionType,
+ FlashRegionGuid,
FlashCycleRead,
Address,
ByteCount,
@@ -184,8 +270,8 @@ SpiProtocolFlashRead (
/**
Write data to the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[in] Buffer Pointer to caller-allocated buffer containing the data sent during the SPI cycle.
@@ -197,8 +283,8 @@ SpiProtocolFlashRead ( EFI_STATUS EFIAPI SpiProtocolFlashWrite (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
IN UINT8 *Buffer
@@ -211,7 +297,7 @@ SpiProtocolFlashWrite (
//
Status = SendSpiCmd (
This,
- FlashRegionType,
+ FlashRegionGuid,
FlashCycleWrite,
Address,
ByteCount,
@@ -223,8 +309,8 @@ SpiProtocolFlashWrite (
/**
Erase some area on the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@@ -235,8 +321,8 @@ SpiProtocolFlashWrite ( EFI_STATUS EFIAPI SpiProtocolFlashErase (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount
)
@@ -248,7 +334,7 @@ SpiProtocolFlashErase (
//
Status = SendSpiCmd (
This,
- FlashRegionType,
+ FlashRegionGuid,
FlashCycleErase,
Address,
ByteCount,
@@ -260,7 +346,7 @@ SpiProtocolFlashErase (
/**
Read SFDP data from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] Address The starting byte address for SFDP data read.
@param[in] ByteCount Number of bytes in SFDP data portion of the SPI cycle
@@ -274,7 +360,7 @@ SpiProtocolFlashErase ( EFI_STATUS EFIAPI SpiProtocolFlashReadSfdp (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -303,7 +389,7 @@ SpiProtocolFlashReadSfdp (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleReadSfdp,
FlashAddress,
ByteCount,
@@ -315,7 +401,7 @@ SpiProtocolFlashReadSfdp (
/**
Read Jedec Id from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] ByteCount Number of bytes in JedecId data portion of the SPI cycle, the data size is 3 typically
@param[out] JedecId The Pointer to caller-allocated buffer containing JEDEC ID received
@@ -328,7 +414,7 @@ SpiProtocolFlashReadSfdp ( EFI_STATUS EFIAPI SpiProtocolFlashReadJedecId (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 ByteCount,
OUT UINT8 *JedecId
@@ -356,7 +442,7 @@ SpiProtocolFlashReadJedecId (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleReadJedecId,
Address,
ByteCount,
@@ -368,7 +454,7 @@ SpiProtocolFlashReadJedecId (
/**
Write the status register in the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[in] StatusValue The Pointer to caller-allocated buffer containing the value of Status register writing
@@ -379,7 +465,7 @@ SpiProtocolFlashReadJedecId ( EFI_STATUS EFIAPI SpiProtocolFlashWriteStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
IN UINT8 *StatusValue
)
@@ -391,7 +477,7 @@ SpiProtocolFlashWriteStatus (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleWriteStatus,
0,
ByteCount,
@@ -403,7 +489,7 @@ SpiProtocolFlashWriteStatus (
/**
Read status register in the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[out] StatusValue The Pointer to caller-allocated buffer containing the value of Status register received.
@@ -414,7 +500,7 @@ SpiProtocolFlashWriteStatus ( EFI_STATUS EFIAPI SpiProtocolFlashReadStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
OUT UINT8 *StatusValue
)
@@ -426,7 +512,7 @@ SpiProtocolFlashReadStatus (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleReadStatus,
0,
ByteCount,
@@ -438,8 +524,8 @@ SpiProtocolFlashReadStatus (
/**
Get the SPI region base and size, based on the enum type
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for for the base address which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for the base address which corresponds to the type in the descriptor.
@param[out] BaseAddress The Flash Linear Address for the Region 'n' Base
@param[out] RegionSize The size for the Region 'n'
@@ -450,18 +536,25 @@ SpiProtocolFlashReadStatus ( EFI_STATUS EFIAPI SpiProtocolGetRegionAddress (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
OUT UINT32 *BaseAddress,
OUT UINT32 *RegionSize
)
{
- SPI_INSTANCE *SpiInstance;
- UINTN PchSpiBar0;
- UINT32 ReadValue;
+ EFI_STATUS Status;
+ FLASH_REGION_TYPE FlashRegionType;
+ SPI_INSTANCE *SpiInstance;
+ UINTN PchSpiBar0;
+ UINT32 ReadValue;
SpiInstance = SPI_INSTANCE_FROM_SPIPROTOCOL (This);
+ Status = GetFlashRegionType (FlashRegionGuid, &FlashRegionType); if
+ (EFI_ERROR (Status)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
if (FlashRegionType >= FlashRegionMax) {
return EFI_INVALID_PARAMETER;
}
@@ -496,7 +589,7 @@ SpiProtocolGetRegionAddress (
/**
Read PCH Soft Strap Values
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing PCH Soft Strap Value.
@@ -510,7 +603,7 @@ SpiProtocolGetRegionAddress ( EFI_STATUS EFIAPI SpiProtocolReadPchSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -542,7 +635,7 @@ SpiProtocolReadPchSoftStrap (
//
Status = SendSpiCmd (
This,
- FlashRegionDescriptor,
+ &gFlashRegionDescriptorGuid,
FlashCycleRead,
StrapFlashAddr,
ByteCount,
@@ -554,7 +647,7 @@ SpiProtocolReadPchSoftStrap (
/**
Read CPU Soft Strap Values
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle.
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing CPU Soft Strap Value.
@@ -568,7 +661,7 @@ SpiProtocolReadPchSoftStrap ( EFI_STATUS EFIAPI SpiProtocolReadCpuSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -600,7 +693,7 @@ SpiProtocolReadCpuSoftStrap (
//
Status = SendSpiCmd (
This,
- FlashRegionDescriptor,
+ &gFlashRegionDescriptorGuid,
FlashCycleRead,
StrapFlashAddr,
ByteCount,
@@ -612,8 +705,8 @@ SpiProtocolReadCpuSoftStrap (
/**
This function sends the programmed SPI command to the slave device.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] SpiRegionType The SPI Region type for flash cycle which is listed in the Descriptor
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] FlashCycleType The Flash SPI cycle type list in HSFC (Hardware Sequencing Flash Control Register) register
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@@ -626,8 +719,8 @@ SpiProtocolReadCpuSoftStrap ( **/ EFI_STATUS SendSpiCmd (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN FLASH_CYCLE_TYPE FlashCycleType,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -682,7 +775,7 @@ SendSpiCmd (
goto SendSpiCmdEnd;
}
- Status = SpiProtocolGetRegionAddress (This, FlashRegionType, &HardwareSpiAddr, &FlashRegionSize);
+ Status = SpiProtocolGetRegionAddress (This, FlashRegionGuid,
+ &HardwareSpiAddr, &FlashRegionSize);
if (EFI_ERROR (Status)) {
goto SendSpiCmdEnd;
}
@@ -897,7 +990,7 @@ SendSpiCmd (
**/
BOOLEAN
WaitForSpiCycleComplete (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINTN PchSpiBar0,
IN BOOLEAN ErrorCheck
)
diff --git a/Silicon/Intel/SimicsIch10Pkg/IncludePrivate/Library/PchSpiCommonLib.h b/Silicon/Intel/SimicsIch10Pkg/IncludePrivate/Library/PchSpiCommonLib.h
index 2c8162ac8170..00586e9c9aef 100644
--- a/Silicon/Intel/SimicsIch10Pkg/IncludePrivate/Library/PchSpiCommonLib.h
+++ b/Silicon/Intel/SimicsIch10Pkg/IncludePrivate/Library/PchSpiCommonLi
+++ b.h
@@ -48,7 +48,7 @@ typedef enum {
typedef struct {
UINT32 Signature;
EFI_HANDLE Handle;
- PCH_SPI_PROTOCOL SpiProtocol;
+ PCH_SPI2_PROTOCOL SpiProtocol;
UINT16 PchAcpiBase;
UINTN PchSpiBase;
UINT16 ReadPermission;
@@ -134,8 +134,8 @@ ReleaseSpiBar0 (
/**
Read data from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[out] Buffer The Pointer to caller-allocated buffer containing the dada received.
@@ -148,8 +148,8 @@ ReleaseSpiBar0 (
EFI_STATUS
EFIAPI
SpiProtocolFlashRead (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
OUT UINT8 *Buffer
@@ -158,8 +158,8 @@ SpiProtocolFlashRead (
/**
Write data to the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[in] Buffer Pointer to caller-allocated buffer containing the data sent during the SPI cycle.
@@ -171,8 +171,8 @@ SpiProtocolFlashRead ( EFI_STATUS EFIAPI SpiProtocolFlashWrite (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
IN UINT8 *Buffer
@@ -181,8 +181,8 @@ SpiProtocolFlashWrite (
/**
Erase some area on the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@@ -193,8 +193,8 @@ SpiProtocolFlashWrite ( EFI_STATUS EFIAPI SpiProtocolFlashErase (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount
);
@@ -202,7 +202,7 @@ SpiProtocolFlashErase (
/**
Read SFDP data from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] Address The starting byte address for SFDP data read.
@param[in] ByteCount Number of bytes in SFDP data portion of the SPI cycle
@@ -216,7 +216,7 @@ SpiProtocolFlashErase ( EFI_STATUS EFIAPI SpiProtocolFlashReadSfdp (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -226,7 +226,7 @@ SpiProtocolFlashReadSfdp (
/**
Read Jedec Id from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] ByteCount Number of bytes in JedecId data portion of the SPI cycle, the data size is 3 typically
@param[out] JedecId The Pointer to caller-allocated buffer containing JEDEC ID received
@@ -239,7 +239,7 @@ SpiProtocolFlashReadSfdp ( EFI_STATUS EFIAPI SpiProtocolFlashReadJedecId (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 ByteCount,
OUT UINT8 *JedecId
@@ -248,7 +248,7 @@ SpiProtocolFlashReadJedecId (
/**
Write the status register in the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[in] StatusValue The Pointer to caller-allocated buffer containing the value of Status register writing
@@ -259,7 +259,7 @@ SpiProtocolFlashReadJedecId ( EFI_STATUS EFIAPI SpiProtocolFlashWriteStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
IN UINT8 *StatusValue
);
@@ -267,7 +267,7 @@ SpiProtocolFlashWriteStatus (
/**
Read status register in the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[out] StatusValue The Pointer to caller-allocated buffer containing the value of Status register received.
@@ -278,7 +278,7 @@ SpiProtocolFlashWriteStatus ( EFI_STATUS EFIAPI SpiProtocolFlashReadStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
OUT UINT8 *StatusValue
);
@@ -286,8 +286,8 @@ SpiProtocolFlashReadStatus (
/**
Get the SPI region base and size, based on the enum type
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for for the base address which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for the base address which corresponds to the type in the descriptor.
@param[out] BaseAddress The Flash Linear Address for the Region 'n' Base
@param[out] RegionSize The size for the Region 'n'
@@ -298,8 +298,8 @@ SpiProtocolFlashReadStatus ( EFI_STATUS EFIAPI SpiProtocolGetRegionAddress (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
OUT UINT32 *BaseAddress,
OUT UINT32 *RegionSize
);
@@ -307,7 +307,7 @@ SpiProtocolGetRegionAddress (
/**
Read PCH Soft Strap Values
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing PCH Soft Strap Value.
@@ -321,7 +321,7 @@ SpiProtocolGetRegionAddress ( EFI_STATUS EFIAPI SpiProtocolReadPchSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -330,7 +330,7 @@ SpiProtocolReadPchSoftStrap (
/**
Read CPU Soft Strap Values
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle.
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing CPU Soft Strap Value.
@@ -344,7 +344,7 @@ SpiProtocolReadPchSoftStrap ( EFI_STATUS EFIAPI SpiProtocolReadCpuSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -353,8 +353,8 @@ SpiProtocolReadCpuSoftStrap (
/**
This function sends the programmed SPI command to the slave device.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] SpiRegionType The SPI Region type for flash cycle which is listed in the Descriptor
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] FlashCycleType The Flash SPI cycle type list in HSFC (Hardware Sequencing Flash Control Register) register
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@@ -367,8 +367,8 @@ SpiProtocolReadCpuSoftStrap ( **/ EFI_STATUS SendSpiCmd (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN FLASH_CYCLE_TYPE FlashCycleType,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -388,7 +388,7 @@ SendSpiCmd (
**/
BOOLEAN
WaitForSpiCycleComplete (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINTN PchSpiBar0,
IN BOOLEAN ErrorCheck
);
diff --git a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
index b5aa13c1c56d..3a64005b5690 100644
--- a/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/BasePchSpiCommonLib.inf
+++ b/Silicon/Intel/SimicsIch10Pkg/LibraryPrivate/BasePchSpiCommonLib/Ba
+++ sePchSpiCommonLib.inf
@@ -2,6 +2,7 @@
# Component description file for the PchSpiCommonLib # # Copyright (c) 2019 Intel Corporation. All rights reserved. <BR>
+# Copyright (c) Microsoft Corporation.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -30,3 +31,13 @@ [LibraryClasses] [Pcd]
gIntelSiliconPkgTokenSpaceGuid.PcdBiosAreaBaseAddress ## CONSUMES
gIntelSiliconPkgTokenSpaceGuid.PcdBiosSize ## CONSUMES
+
+[Guids]
+ gFlashRegionDescriptorGuid
+ gFlashRegionBiosGuid
+ gFlashRegionMeGuid
+ gFlashRegionGbeGuid
+ gFlashRegionPlatformDataGuid
+ gFlashRegionDerGuid
+ gFlashRegionAllGuid
+ gFlashRegionMaxGuid
--
2.28.0.windows.1
^ permalink raw reply [flat|nested] 29+ messages in thread
* [PATCH v6 49/52] SimicsIch10Pkg/PchSpiSmm: Update for SPI2 Protocol
2021-10-28 22:08 [PATCH v6 36/52] KabylakeSiliconPkg: Remove PCH SPI PPI and Protocol from package Michael Kubacki
` (11 preceding siblings ...)
2021-10-28 22:08 ` [PATCH v6 48/52] SimicsIch10Pkg/BasePchSpiCommonLib: Identify flash regions by GUID Michael Kubacki
@ 2021-10-28 22:08 ` Michael Kubacki
2021-11-02 23:27 ` Nate DeSimone
2021-10-28 22:08 ` [PATCH v6 50/52] TigerlakeSiliconPkg/BasePchSpiCommonLib: Identify flash regions by GUID Michael Kubacki
` (2 subsequent siblings)
15 siblings, 1 reply; 29+ messages in thread
From: Michael Kubacki @ 2021-10-28 22:08 UTC (permalink / raw)
To: devel; +Cc: Agyeman Prince, Nate DeSimone
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Updates references to the "PCH_SPI_PROTOCOL" to instead refer to
"PCH_SPI2_PROTOCOL".
Cc: Agyeman Prince <prince.agyeman@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c | 8 ++++----
Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.h | 2 +-
Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpiSmm.inf | 2 +-
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c b/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c
index e4a81f91316c..19f1cb92c921 100644
--- a/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c
+++ b/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c
@@ -29,8 +29,8 @@ GLOBAL_REMOVE_IF_UNREFERENCED UINT32 mSpiResvMmioAddr;
- Documented in System Management Mode Core Interface Specification .
- @result
- The SPI SMM driver produces @link _PCH_SPI_PROTOCOL PCH_SPI_PROTOCOL @endlink with GUID
- gPchSmmSpiProtocolGuid which is different from SPI RUNTIME driver.
+ The SPI SMM driver produces @link _PCH_SPI2_PROTOCOL PCH_SPI2_PROTOCOL @endlink with GUID
+ gPchSmmSpi2ProtocolGuid which is different from SPI RUNTIME driver.
- <b>Integration Check List</b>\n
- This driver supports Descriptor Mode only.
@@ -92,11 +92,11 @@ InstallPchSpi (
return Status;
}
//
- // Install the SMM PCH_SPI_PROTOCOL interface
+ // Install the SMM PCH_SPI2_PROTOCOL interface
//
Status = gSmst->SmmInstallProtocolInterface (
&(mSpiInstance->Handle),
- &gPchSmmSpiProtocolGuid,
+ &gPchSmmSpi2ProtocolGuid,
EFI_NATIVE_INTERFACE,
&(mSpiInstance->SpiProtocol)
);
diff --git a/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.h b/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.h
index 6ada9b121d92..68388319da17 100644
--- a/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.h
+++ b/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.h
@@ -17,7 +17,7 @@
#include <Library/BaseMemoryLib.h>
#include <Library/SmmServicesTableLib.h>
#include <PchAccess.h>
-#include <Protocol/Spi.h>
+#include <Protocol/Spi2.h>
#include <IncludePrivate/Library/PchSpiCommonLib.h>
#endif
diff --git a/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpiSmm.inf b/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpiSmm.inf
index 35655ed5b5aa..12a21dc57a9b 100644
--- a/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpiSmm.inf
+++ b/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpiSmm.inf
@@ -37,7 +37,7 @@ [Sources]
[Protocols]
- gPchSmmSpiProtocolGuid # PRODUCES
+ gPchSmmSpi2ProtocolGuid # PRODUCES
[Depex]
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 29+ messages in thread* Re: [PATCH v6 49/52] SimicsIch10Pkg/PchSpiSmm: Update for SPI2 Protocol
2021-10-28 22:08 ` [PATCH v6 49/52] SimicsIch10Pkg/PchSpiSmm: Update for SPI2 Protocol Michael Kubacki
@ 2021-11-02 23:27 ` Nate DeSimone
0 siblings, 0 replies; 29+ messages in thread
From: Nate DeSimone @ 2021-11-02 23:27 UTC (permalink / raw)
To: mikuback@linux.microsoft.com, devel@edk2.groups.io; +Cc: Agyeman, Prince
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
-----Original Message-----
From: mikuback@linux.microsoft.com <mikuback@linux.microsoft.com>
Sent: Thursday, October 28, 2021 3:09 PM
To: devel@edk2.groups.io
Cc: Agyeman, Prince <prince.agyeman@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>
Subject: [PATCH v6 49/52] SimicsIch10Pkg/PchSpiSmm: Update for SPI2 Protocol
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Updates references to the "PCH_SPI_PROTOCOL" to instead refer to "PCH_SPI2_PROTOCOL".
Cc: Agyeman Prince <prince.agyeman@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c | 8 ++++----
Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.h | 2 +-
Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpiSmm.inf | 2 +-
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c b/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c
index e4a81f91316c..19f1cb92c921 100644
--- a/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c
+++ b/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.c
@@ -29,8 +29,8 @@ GLOBAL_REMOVE_IF_UNREFERENCED UINT32 mSpiResvMmioAddr;
- Documented in System Management Mode Core Interface Specification .
- @result
- The SPI SMM driver produces @link _PCH_SPI_PROTOCOL PCH_SPI_PROTOCOL @endlink with GUID
- gPchSmmSpiProtocolGuid which is different from SPI RUNTIME driver.
+ The SPI SMM driver produces @link _PCH_SPI2_PROTOCOL PCH_SPI2_PROTOCOL @endlink with GUID
+ gPchSmmSpi2ProtocolGuid which is different from SPI RUNTIME driver.
- <b>Integration Check List</b>\n
- This driver supports Descriptor Mode only.
@@ -92,11 +92,11 @@ InstallPchSpi (
return Status;
}
//
- // Install the SMM PCH_SPI_PROTOCOL interface
+ // Install the SMM PCH_SPI2_PROTOCOL interface
//
Status = gSmst->SmmInstallProtocolInterface (
&(mSpiInstance->Handle),
- &gPchSmmSpiProtocolGuid,
+ &gPchSmmSpi2ProtocolGuid,
EFI_NATIVE_INTERFACE,
&(mSpiInstance->SpiProtocol)
);
diff --git a/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.h b/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.h
index 6ada9b121d92..68388319da17 100644
--- a/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.h
+++ b/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpi.h
@@ -17,7 +17,7 @@
#include <Library/BaseMemoryLib.h>
#include <Library/SmmServicesTableLib.h> #include <PchAccess.h> -#include <Protocol/Spi.h>
+#include <Protocol/Spi2.h>
#include <IncludePrivate/Library/PchSpiCommonLib.h>
#endif
diff --git a/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpiSmm.inf b/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpiSmm.inf
index 35655ed5b5aa..12a21dc57a9b 100644
--- a/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpiSmm.inf
+++ b/Silicon/Intel/SimicsIch10Pkg/Spi/Smm/PchSpiSmm.inf
@@ -37,7 +37,7 @@ [Sources]
[Protocols]
- gPchSmmSpiProtocolGuid # PRODUCES
+ gPchSmmSpi2ProtocolGuid # PRODUCES
[Depex]
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH v6 50/52] TigerlakeSiliconPkg/BasePchSpiCommonLib: Identify flash regions by GUID
2021-10-28 22:08 [PATCH v6 36/52] KabylakeSiliconPkg: Remove PCH SPI PPI and Protocol from package Michael Kubacki
` (12 preceding siblings ...)
2021-10-28 22:08 ` [PATCH v6 49/52] SimicsIch10Pkg/PchSpiSmm: Update for SPI2 Protocol Michael Kubacki
@ 2021-10-28 22:08 ` Michael Kubacki
2021-10-28 22:08 ` [PATCH v6 51/52] TigerlakeSiliconPkg/SpiSmm: Update for SPI2 Protocol Michael Kubacki
2021-10-28 22:08 ` [PATCH v6 52/52] WhiskeylakeOpenBoardPkg: Update for SPI2 PPI Michael Kubacki
15 siblings, 0 replies; 29+ messages in thread
From: Michael Kubacki @ 2021-10-28 22:08 UTC (permalink / raw)
To: devel; +Cc: Rangasai V Chaganty, Nate DeSimone, Heng Luo
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Updates the library to identify flash regions by GUID and internally
map the GUID entries to values specific to TigerlakeSiliconPkg.
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Heng Luo <heng.luo@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/SpiCommon.c | 224 +++++++++++++++-----
Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/IncludePrivate/Library/SpiCommonLib.h | 60 +++---
Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/BaseSpiCommonLib.inf | 18 +-
3 files changed, 223 insertions(+), 79 deletions(-)
diff --git a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/SpiCommon.c b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/SpiCommon.c
index 954b349e7c8a..490af6beb8ac 100644
--- a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/SpiCommon.c
+++ b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/SpiCommon.c
@@ -2,9 +2,12 @@
PCH SPI Common Driver implements the SPI Host Controller Compatibility Interface.
Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) Microsoft Corporation.<BR>
+
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <Uefi/UefiBaseType.h>
+#include <Guid/FlashRegion.h>
#include <Library/BaseLib.h>
#include <Library/IoLib.h>
#include <Library/DebugLib.h>
@@ -12,7 +15,7 @@
#include <IndustryStandard/Pci30.h>
#include <Library/PmcLib.h>
#include <Library/PciSegmentLib.h>
-#include <Protocol/Spi.h>
+#include <Protocol/Spi2.h>
#include <Library/SpiCommonLib.h>
#include <Register/PchRegs.h>
#include <Register/SpiRegs.h>
@@ -21,6 +24,125 @@
#include <Library/PchPciBdfLib.h>
#include <Library/SpiAccessLib.h>
+typedef enum {
+ FlashRegionDescriptor,
+ FlashRegionBios,
+ FlashRegionMe,
+ FlashRegionGbe,
+ FlashRegionPlatformData,
+ FlashRegionDer,
+ FlashRegionSecondaryBios,
+ FlashRegionMicrocodePatch,
+ FlashRegionEc,
+ FlashRegionDeviceExpansion,
+ FlashRegionIe,
+ FlashRegion10GbeA,
+ FlashRegion10GbeB,
+ FlashRegionAll = 16,
+ FlashRegionMax
+} FLASH_REGION_TYPE;
+
+typedef struct {
+ EFI_GUID *Guid;
+ FLASH_REGION_TYPE Type;
+} FLASH_REGION_MAPPING;
+
+FLASH_REGION_MAPPING mFlashRegionTypes[] = {
+ {
+ &gFlashRegionDescriptorGuid,
+ FlashRegionDescriptor
+ },
+ {
+ &gFlashRegionBiosGuid,
+ FlashRegionBios
+ },
+ {
+ &gFlashRegionMeGuid,
+ FlashRegionMe
+ },
+ {
+ &gFlashRegionGbeGuid,
+ FlashRegionGbe
+ },
+ {
+ &gFlashRegionPlatformDataGuid,
+ FlashRegionPlatformData
+ },
+ {
+ &gFlashRegionDerGuid,
+ FlashRegionDer
+ },
+ {
+ &gFlashRegionSecondaryBiosGuid,
+ FlashRegionSecondaryBios
+ },
+ {
+ &gFlashRegionMicrocodePatchGuid,
+ FlashRegionMicrocodePatch
+ },
+ {
+ &gFlashRegionEcGuid,
+ FlashRegionEc
+ },
+ {
+ &gFlashRegionDeviceExpansionGuid,
+ FlashRegionDeviceExpansion
+ },
+ {
+ &gFlashRegionIeGuid,
+ FlashRegionIe
+ },
+ {
+ &gFlashRegion10GbeAGuid,
+ FlashRegion10GbeA
+ },
+ {
+ &gFlashRegion10GbeBGuid,
+ FlashRegion10GbeB
+ },
+ {
+ &gFlashRegionAllGuid,
+ FlashRegionAll
+ },
+ {
+ &gFlashRegionMaxGuid,
+ FlashRegionMax
+ }
+};
+
+/**
+ Returns the type of a flash region given its GUID.
+
+ @param[in] FlashRegionGuid Pointer to the flash region GUID.
+ @param[out] FlashRegionType Pointer to a buffer that will be set to the flash region type value.
+
+ @retval EFI_SUCCESS The flash region type was found for the given flash region GUID.
+ @retval EFI_INVALID_PARAMETER A pointer argument passed to the function is NULL.
+ @retval EFI_NOT_FOUND The flash region type was not found for the given flash region GUID.
+
+**/
+EFI_STATUS
+GetFlashRegionType (
+ IN EFI_GUID *FlashRegionGuid,
+ OUT FLASH_REGION_TYPE *FlashRegionType
+ )
+{
+ UINTN Index;
+
+ if (FlashRegionGuid == NULL || FlashRegionType == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ for (Index = 0; Index < ARRAY_SIZE (mFlashRegionTypes); Index++) {
+ if (CompareGuid (mFlashRegionTypes[Index].Guid, FlashRegionGuid)) {
+ *FlashRegionType = mFlashRegionTypes[Index].Type;
+ return EFI_SUCCESS;
+ }
+ }
+
+ return EFI_NOT_FOUND;
+}
+
/**
Initialize an SPI protocol instance.
@@ -179,7 +301,7 @@ SpiProtocolConstructor (
ASSERT (SpiInstance->CpuStrapBaseAddr != 0);
if (SpiInstance->CpuStrapBaseAddr != 0x300) {
- Status = SpiProtocolFlashRead (&(SpiInstance->SpiProtocol), FlashRegionAll, R_FLASH_UMAP1, sizeof (Data32), (UINT8 *) (&Data32));
+ Status = SpiProtocolFlashRead (&(SpiInstance->SpiProtocol), &gFlashRegionAllGuid, R_FLASH_UMAP1, sizeof (Data32), (UINT8 *) (&Data32));
ASSERT_EFI_ERROR (Status);
Mdtba = (UINT16)(((Data32 & B_FLASH_UMAP1_MDTBA) >> N_FLASH_UMAP1_MDTBA) << N_FLASH_UMAP1_MDTBA_REPR);
DEBUG ((DEBUG_INFO, "Mdtba : %0x\n", Mdtba));
@@ -274,7 +396,7 @@ PchPmTimerStallRuntimeSafe (
STATIC
BOOLEAN
WaitForSpiCycleComplete (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINTN PchSpiBar0,
IN BOOLEAN ErrorCheck
)
@@ -311,8 +433,8 @@ WaitForSpiCycleComplete (
/**
This function sends the programmed SPI command to the slave device.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] SpiRegionType The SPI Region type for flash cycle which is listed in the Descriptor
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] FlashCycleType The Flash SPI cycle type list in HSFC (Hardware Sequencing Flash Control Register) register
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@@ -326,8 +448,8 @@ WaitForSpiCycleComplete (
STATIC
EFI_STATUS
SendSpiCmd (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN FLASH_CYCLE_TYPE FlashCycleType,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -413,7 +535,7 @@ SendSpiCmd (
}
}
- Status = SpiProtocolGetRegionAddress (This, FlashRegionType, &HardwareSpiAddr, &FlashRegionSize);
+ Status = SpiProtocolGetRegionAddress (This, FlashRegionGuid, &HardwareSpiAddr, &FlashRegionSize);
if (EFI_ERROR (Status)) {
goto SendSpiCmdEnd;
}
@@ -625,8 +747,8 @@ SendSpiCmd (
/**
Read data from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[out] Buffer The Pointer to caller-allocated buffer containing the dada received.
@@ -639,8 +761,8 @@ SendSpiCmd (
EFI_STATUS
EFIAPI
SpiProtocolFlashRead (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
OUT UINT8 *Buffer
@@ -653,7 +775,7 @@ SpiProtocolFlashRead (
//
Status = SendSpiCmd (
This,
- FlashRegionType,
+ FlashRegionGuid,
FlashCycleRead,
Address,
ByteCount,
@@ -665,8 +787,8 @@ SpiProtocolFlashRead (
/**
Write data to the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[in] Buffer Pointer to caller-allocated buffer containing the data sent during the SPI cycle.
@@ -678,8 +800,8 @@ SpiProtocolFlashRead (
EFI_STATUS
EFIAPI
SpiProtocolFlashWrite (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
IN UINT8 *Buffer
@@ -692,7 +814,7 @@ SpiProtocolFlashWrite (
//
Status = SendSpiCmd (
This,
- FlashRegionType,
+ FlashRegionGuid,
FlashCycleWrite,
Address,
ByteCount,
@@ -704,8 +826,8 @@ SpiProtocolFlashWrite (
/**
Erase some area on the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@@ -716,8 +838,8 @@ SpiProtocolFlashWrite (
EFI_STATUS
EFIAPI
SpiProtocolFlashErase (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount
)
@@ -729,7 +851,7 @@ SpiProtocolFlashErase (
//
Status = SendSpiCmd (
This,
- FlashRegionType,
+ FlashRegionGuid,
FlashCycleErase,
Address,
ByteCount,
@@ -741,7 +863,7 @@ SpiProtocolFlashErase (
/**
Read SFDP data from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] Address The starting byte address for SFDP data read.
@param[in] ByteCount Number of bytes in SFDP data portion of the SPI cycle
@@ -756,7 +878,7 @@ SpiProtocolFlashErase (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadSfdp (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -790,7 +912,7 @@ SpiProtocolFlashReadSfdp (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleReadSfdp,
FlashAddress,
ByteCount,
@@ -802,7 +924,7 @@ SpiProtocolFlashReadSfdp (
/**
Read Jedec Id from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] ByteCount Number of bytes in JedecId data portion of the SPI cycle, the data size is 3 typically
@param[out] JedecId The Pointer to caller-allocated buffer containing JEDEC ID received
@@ -816,7 +938,7 @@ SpiProtocolFlashReadSfdp (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadJedecId (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 ByteCount,
OUT UINT8 *JedecId
@@ -849,7 +971,7 @@ SpiProtocolFlashReadJedecId (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleReadJedecId,
Address,
ByteCount,
@@ -861,7 +983,7 @@ SpiProtocolFlashReadJedecId (
/**
Write the status register in the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[in] StatusValue The Pointer to caller-allocated buffer containing the value of Status register writing
@@ -873,7 +995,7 @@ SpiProtocolFlashReadJedecId (
EFI_STATUS
EFIAPI
SpiProtocolFlashWriteStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
IN UINT8 *StatusValue
)
@@ -890,7 +1012,7 @@ SpiProtocolFlashWriteStatus (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleWriteStatus,
0,
ByteCount,
@@ -902,7 +1024,7 @@ SpiProtocolFlashWriteStatus (
/**
Read status register in the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[out] StatusValue The Pointer to caller-allocated buffer containing the value of Status register received.
@@ -914,7 +1036,7 @@ SpiProtocolFlashWriteStatus (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
OUT UINT8 *StatusValue
)
@@ -931,7 +1053,7 @@ SpiProtocolFlashReadStatus (
//
Status = SendSpiCmd (
This,
- FlashRegionAll,
+ &gFlashRegionAllGuid,
FlashCycleReadStatus,
0,
ByteCount,
@@ -943,8 +1065,8 @@ SpiProtocolFlashReadStatus (
/**
Get the SPI region base and size, based on the enum type
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for for the base address which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for the base address which corresponds to the type in the descriptor.
@param[out] BaseAddress The Flash Linear Address for the Region 'n' Base
@param[out] RegionSize The size for the Region 'n'
@@ -955,18 +1077,24 @@ SpiProtocolFlashReadStatus (
EFI_STATUS
EFIAPI
SpiProtocolGetRegionAddress (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
OUT UINT32 *BaseAddress,
OUT UINT32 *RegionSize
)
{
- SPI_INSTANCE *SpiInstance;
- UINTN PchSpiBar0;
- UINT32 ReadValue;
+ EFI_STATUS Status;
+ FLASH_REGION_TYPE FlashRegionType;
+ SPI_INSTANCE *SpiInstance;
+ UINTN PchSpiBar0;
+ UINT32 ReadValue;
SpiInstance = SPI_INSTANCE_FROM_SPIPROTOCOL (This);
+ Status = GetFlashRegionType (FlashRegionGuid, &FlashRegionType);
+ if (EFI_ERROR (Status)) {
+ return EFI_INVALID_PARAMETER;
+ }
if (FlashRegionType >= FlashRegionMax) {
return EFI_INVALID_PARAMETER;
}
@@ -1001,7 +1129,7 @@ SpiProtocolGetRegionAddress (
/**
Read PCH Soft Strap Values
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing PCH Soft Strap Value.
@@ -1015,7 +1143,7 @@ SpiProtocolGetRegionAddress (
EFI_STATUS
EFIAPI
SpiProtocolReadPchSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -1047,7 +1175,7 @@ SpiProtocolReadPchSoftStrap (
//
Status = SendSpiCmd (
This,
- FlashRegionDescriptor,
+ &gFlashRegionDescriptorGuid,
FlashCycleRead,
StrapFlashAddr,
ByteCount,
@@ -1059,7 +1187,7 @@ SpiProtocolReadPchSoftStrap (
/**
Read CPU Soft Strap Values
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle.
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing CPU Soft Strap Value.
@@ -1073,7 +1201,7 @@ SpiProtocolReadPchSoftStrap (
EFI_STATUS
EFIAPI
SpiProtocolReadCpuSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -1105,7 +1233,7 @@ SpiProtocolReadCpuSoftStrap (
//
Status = SendSpiCmd (
This,
- FlashRegionDescriptor,
+ &gFlashRegionDescriptorGuid,
FlashCycleRead,
StrapFlashAddr,
ByteCount,
diff --git a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/IncludePrivate/Library/SpiCommonLib.h b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/IncludePrivate/Library/SpiCommonLib.h
index 3290f7712280..41b2018367bb 100644
--- a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/IncludePrivate/Library/SpiCommonLib.h
+++ b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/IncludePrivate/Library/SpiCommonLib.h
@@ -7,7 +7,7 @@
#ifndef _SPI_COMMON_LIB_H_
#define _SPI_COMMON_LIB_H_
-#include <Protocol/Spi.h>
+#include <Protocol/Spi2.h>
//
// Maximum time allowed while waiting the SPI cycle to complete
@@ -48,7 +48,7 @@ typedef enum {
typedef struct {
UINT32 Signature;
EFI_HANDLE Handle;
- PCH_SPI_PROTOCOL SpiProtocol;
+ PCH_SPI2_PROTOCOL SpiProtocol;
UINT16 PchAcpiBase;
UINT64 PchSpiBase;
UINT8 ReadPermission;
@@ -145,8 +145,8 @@ IsSpiFlashWriteGranted (
/**
Read data from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[out] Buffer The Pointer to caller-allocated buffer containing the dada received.
@@ -159,8 +159,8 @@ IsSpiFlashWriteGranted (
EFI_STATUS
EFIAPI
SpiProtocolFlashRead (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
OUT UINT8 *Buffer
@@ -169,8 +169,8 @@ SpiProtocolFlashRead (
/**
Write data to the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@param[in] Buffer Pointer to caller-allocated buffer containing the data sent during the SPI cycle.
@@ -182,8 +182,8 @@ SpiProtocolFlashRead (
EFI_STATUS
EFIAPI
SpiProtocolFlashWrite (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount,
IN UINT8 *Buffer
@@ -192,8 +192,8 @@ SpiProtocolFlashWrite (
/**
Erase some area on the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for flash cycle which corresponds to the type in the descriptor.
@param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions.
@param[in] ByteCount Number of bytes in the data portion of the SPI cycle.
@@ -204,8 +204,8 @@ SpiProtocolFlashWrite (
EFI_STATUS
EFIAPI
SpiProtocolFlashErase (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
IN UINT32 Address,
IN UINT32 ByteCount
);
@@ -213,7 +213,7 @@ SpiProtocolFlashErase (
/**
Read SFDP data from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] Address The starting byte address for SFDP data read.
@param[in] ByteCount Number of bytes in SFDP data portion of the SPI cycle
@@ -227,7 +227,7 @@ SpiProtocolFlashErase (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadSfdp (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 Address,
IN UINT32 ByteCount,
@@ -237,7 +237,7 @@ SpiProtocolFlashReadSfdp (
/**
Read Jedec Id from the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ComponentNumber The Componen Number for chip select
@param[in] ByteCount Number of bytes in JedecId data portion of the SPI cycle, the data size is 3 typically
@param[out] JedecId The Pointer to caller-allocated buffer containing JEDEC ID received
@@ -250,7 +250,7 @@ SpiProtocolFlashReadSfdp (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadJedecId (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT8 ComponentNumber,
IN UINT32 ByteCount,
OUT UINT8 *JedecId
@@ -259,7 +259,7 @@ SpiProtocolFlashReadJedecId (
/**
Write the status register in the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[in] StatusValue The Pointer to caller-allocated buffer containing the value of Status register writing
@@ -270,7 +270,7 @@ SpiProtocolFlashReadJedecId (
EFI_STATUS
EFIAPI
SpiProtocolFlashWriteStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
IN UINT8 *StatusValue
);
@@ -278,7 +278,7 @@ SpiProtocolFlashWriteStatus (
/**
Read status register in the flash part.
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically
@param[out] StatusValue The Pointer to caller-allocated buffer containing the value of Status register received.
@@ -289,7 +289,7 @@ SpiProtocolFlashWriteStatus (
EFI_STATUS
EFIAPI
SpiProtocolFlashReadStatus (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 ByteCount,
OUT UINT8 *StatusValue
);
@@ -297,8 +297,8 @@ SpiProtocolFlashReadStatus (
/**
Get the SPI region base and size, based on the enum type
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
- @param[in] FlashRegionType The Flash Region type for for the base address which is listed in the Descriptor.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
+ @param[in] FlashRegionGuid The Flash Region GUID for the base address which corresponds to the type in the descriptor.
@param[out] BaseAddress The Flash Linear Address for the Region 'n' Base
@param[out] RegionSize The size for the Region 'n'
@@ -309,8 +309,8 @@ SpiProtocolFlashReadStatus (
EFI_STATUS
EFIAPI
SpiProtocolGetRegionAddress (
- IN PCH_SPI_PROTOCOL *This,
- IN FLASH_REGION_TYPE FlashRegionType,
+ IN PCH_SPI2_PROTOCOL *This,
+ IN EFI_GUID *FlashRegionGuid,
OUT UINT32 *BaseAddress,
OUT UINT32 *RegionSize
);
@@ -318,7 +318,7 @@ SpiProtocolGetRegionAddress (
/**
Read PCH Soft Strap Values
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing PCH Soft Strap Value.
@@ -332,7 +332,7 @@ SpiProtocolGetRegionAddress (
EFI_STATUS
EFIAPI
SpiProtocolReadPchSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
@@ -341,7 +341,7 @@ SpiProtocolReadPchSoftStrap (
/**
Read CPU Soft Strap Values
- @param[in] This Pointer to the PCH_SPI_PROTOCOL instance.
+ @param[in] This Pointer to the PCH_SPI2_PROTOCOL instance.
@param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUSBA.
@param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle.
@param[out] SoftStrapValue The Pointer to caller-allocated buffer containing CPU Soft Strap Value.
@@ -355,7 +355,7 @@ SpiProtocolReadPchSoftStrap (
EFI_STATUS
EFIAPI
SpiProtocolReadCpuSoftStrap (
- IN PCH_SPI_PROTOCOL *This,
+ IN PCH_SPI2_PROTOCOL *This,
IN UINT32 SoftStrapAddr,
IN UINT32 ByteCount,
OUT VOID *SoftStrapValue
diff --git a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/BaseSpiCommonLib.inf b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/BaseSpiCommonLib.inf
index 2686dff41e25..4981276e13e8 100644
--- a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/BaseSpiCommonLib.inf
+++ b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/LibraryPrivate/BaseSpiCommonLib/BaseSpiCommonLib.inf
@@ -2,6 +2,7 @@
# Component description file for the PchSpiCommonLib
#
# Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) Microsoft Corporation.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -29,4 +30,19 @@ [LibraryClasses]
PchPciBdfLib
SpiAccessLib
-[Pcd]
+[Guids]
+ gFlashRegionDescriptorGuid
+ gFlashRegionBiosGuid
+ gFlashRegionMeGuid
+ gFlashRegionGbeGuid
+ gFlashRegionPlatformDataGuid
+ gFlashRegionDerGuid
+ gFlashRegionSecondaryBiosGuid
+ gFlashRegionMicrocodePatchGuid
+ gFlashRegionEcGuid
+ gFlashRegionDeviceExpansionGuid
+ gFlashRegionIeGuid
+ gFlashRegion10GbeAGuid
+ gFlashRegion10GbeBGuid
+ gFlashRegionAllGuid
+ gFlashRegionMaxGuid
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 29+ messages in thread* [PATCH v6 51/52] TigerlakeSiliconPkg/SpiSmm: Update for SPI2 Protocol
2021-10-28 22:08 [PATCH v6 36/52] KabylakeSiliconPkg: Remove PCH SPI PPI and Protocol from package Michael Kubacki
` (13 preceding siblings ...)
2021-10-28 22:08 ` [PATCH v6 50/52] TigerlakeSiliconPkg/BasePchSpiCommonLib: Identify flash regions by GUID Michael Kubacki
@ 2021-10-28 22:08 ` Michael Kubacki
2021-10-29 3:05 ` [edk2-devel] " Heng Luo
2021-11-02 23:28 ` Nate DeSimone
2021-10-28 22:08 ` [PATCH v6 52/52] WhiskeylakeOpenBoardPkg: Update for SPI2 PPI Michael Kubacki
15 siblings, 2 replies; 29+ messages in thread
From: Michael Kubacki @ 2021-10-28 22:08 UTC (permalink / raw)
To: devel; +Cc: Rangasai V Chaganty, Nate DeSimone, Heng Luo
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Updates references to the "PCH_SPI_PROTOCOL" to instead refer to
"PCH_SPI2_PROTOCOL".
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Heng Luo <heng.luo@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/Spi.c | 10 +++++-----
Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf | 2 +-
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/Spi.c b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/Spi.c
index 419eddaff38d..a55cb37c4faa 100644
--- a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/Spi.c
+++ b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/Spi.c
@@ -13,7 +13,7 @@
#include <Library/BaseMemoryLib.h>
#include <Library/SmmServicesTableLib.h>
#include <Library/PciSegmentLib.h>
-#include <Protocol/Spi.h>
+#include <Protocol/Spi2.h>
#include <Protocol/SmmCpu.h>
#include <Library/SpiCommonLib.h>
#include <PchReservedResources.h>
@@ -45,8 +45,8 @@ GLOBAL_REMOVE_IF_UNREFERENCED UINT32 mSpiResvMmioAddr;
- Documented in System Management Mode Core Interface Specification .
- @result
- The SPI SMM driver produces @link _PCH_SPI_PROTOCOL PCH_SPI_PROTOCOL @endlink with GUID
- gPchSmmSpiProtocolGuid which is different from SPI RUNTIME driver.
+ The SPI SMM driver produces @link _PCH_SPI2_PROTOCOL PCH_SPI2_PROTOCOL @endlink with GUID
+ gPchSmmSpi2ProtocolGuid which is different from SPI RUNTIME driver.
- <b>Integration Check List</b>\n
- This driver supports Descriptor Mode only.
@@ -108,11 +108,11 @@ InstallPchSpi (
return Status;
}
///
- /// Install the SMM PCH_SPI_PROTOCOL interface
+ /// Install the SMM PCH_SPI2_PROTOCOL interface
///
Status = gSmst->SmmInstallProtocolInterface (
&(mSpiInstance->Handle),
- &gPchSmmSpiProtocolGuid,
+ &gPchSmmSpi2ProtocolGuid,
EFI_NATIVE_INTERFACE,
&(mSpiInstance->SpiProtocol)
);
diff --git a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf
index f64b84880b31..40feab02d3ef 100644
--- a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf
+++ b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf
@@ -39,7 +39,7 @@ [Sources]
[Protocols]
-gPchSmmSpiProtocolGuid ## PRODUCES
+gPchSmmSpi2ProtocolGuid ## PRODUCES
gEfiSmmCpuProtocolGuid ## CONSUMES
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 29+ messages in thread* Re: [edk2-devel] [PATCH v6 51/52] TigerlakeSiliconPkg/SpiSmm: Update for SPI2 Protocol
2021-10-28 22:08 ` [PATCH v6 51/52] TigerlakeSiliconPkg/SpiSmm: Update for SPI2 Protocol Michael Kubacki
@ 2021-10-29 3:05 ` Heng Luo
2021-11-02 23:28 ` Nate DeSimone
1 sibling, 0 replies; 29+ messages in thread
From: Heng Luo @ 2021-10-29 3:05 UTC (permalink / raw)
To: devel@edk2.groups.io, mikuback@linux.microsoft.com
Cc: Chaganty, Rangasai V, Desimone, Nathaniel L
Reviewed-by: Heng Luo <heng.luo@intel.com>
> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Michael
> Kubacki
> Sent: Friday, October 29, 2021 6:09 AM
> To: devel@edk2.groups.io
> Cc: Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>; Desimone,
> Nathaniel L <nathaniel.l.desimone@intel.com>; Luo, Heng <heng.luo@intel.com>
> Subject: [edk2-devel] [PATCH v6 51/52] TigerlakeSiliconPkg/SpiSmm: Update for
> SPI2 Protocol
>
> From: Michael Kubacki <michael.kubacki@microsoft.com>
>
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
>
> Updates references to the "PCH_SPI_PROTOCOL" to instead refer to
> "PCH_SPI2_PROTOCOL".
>
> Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
> Cc: Heng Luo <heng.luo@intel.com>
> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
> ---
> Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/Spi.c | 10 +++++-----
> Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf | 2 +-
> 2 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/Spi.c
> b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/Spi.c
> index 419eddaff38d..a55cb37c4faa 100644
> --- a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/Spi.c
> +++ b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/Spi.c
> @@ -13,7 +13,7 @@
> #include <Library/BaseMemoryLib.h>
> #include <Library/SmmServicesTableLib.h> #include <Library/PciSegmentLib.h>
> -#include <Protocol/Spi.h>
> +#include <Protocol/Spi2.h>
> #include <Protocol/SmmCpu.h>
> #include <Library/SpiCommonLib.h>
> #include <PchReservedResources.h>
> @@ -45,8 +45,8 @@ GLOBAL_REMOVE_IF_UNREFERENCED UINT32
> mSpiResvMmioAddr;
> - Documented in System Management Mode Core Interface Specification .
>
> - @result
> - The SPI SMM driver produces @link _PCH_SPI_PROTOCOL
> PCH_SPI_PROTOCOL @endlink with GUID
> - gPchSmmSpiProtocolGuid which is different from SPI RUNTIME driver.
> + The SPI SMM driver produces @link _PCH_SPI2_PROTOCOL
> PCH_SPI2_PROTOCOL @endlink with GUID
> + gPchSmmSpi2ProtocolGuid which is different from SPI RUNTIME driver.
>
> - <b>Integration Check List</b>\n
> - This driver supports Descriptor Mode only.
> @@ -108,11 +108,11 @@ InstallPchSpi (
> return Status;
> }
> ///
> - /// Install the SMM PCH_SPI_PROTOCOL interface
> + /// Install the SMM PCH_SPI2_PROTOCOL interface
> ///
> Status = gSmst->SmmInstallProtocolInterface (
> &(mSpiInstance->Handle),
> - &gPchSmmSpiProtocolGuid,
> + &gPchSmmSpi2ProtocolGuid,
> EFI_NATIVE_INTERFACE,
> &(mSpiInstance->SpiProtocol)
> );
> diff --git a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf
> b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf
> index f64b84880b31..40feab02d3ef 100644
> --- a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf
> +++ b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf
> @@ -39,7 +39,7 @@ [Sources]
>
>
> [Protocols]
> -gPchSmmSpiProtocolGuid ## PRODUCES
> +gPchSmmSpi2ProtocolGuid ## PRODUCES
> gEfiSmmCpuProtocolGuid ## CONSUMES
>
>
> --
> 2.28.0.windows.1
>
>
>
> -=-=-=-=-=-=
> Groups.io Links: You receive all messages sent to this group.
> View/Reply Online (#82871): https://edk2.groups.io/g/devel/message/82871
> Mute This Topic: https://groups.io/mt/86664084/3906523
> Group Owner: devel+owner@edk2.groups.io
> Unsubscribe: https://edk2.groups.io/g/devel/unsub [heng.luo@intel.com]
> -=-=-=-=-=-=
>
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [edk2-devel] [PATCH v6 51/52] TigerlakeSiliconPkg/SpiSmm: Update for SPI2 Protocol
2021-10-28 22:08 ` [PATCH v6 51/52] TigerlakeSiliconPkg/SpiSmm: Update for SPI2 Protocol Michael Kubacki
2021-10-29 3:05 ` [edk2-devel] " Heng Luo
@ 2021-11-02 23:28 ` Nate DeSimone
1 sibling, 0 replies; 29+ messages in thread
From: Nate DeSimone @ 2021-11-02 23:28 UTC (permalink / raw)
To: devel@edk2.groups.io, mikuback@linux.microsoft.com
Cc: Chaganty, Rangasai V, Luo, Heng
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Michael Kubacki
Sent: Thursday, October 28, 2021 3:09 PM
To: devel@edk2.groups.io
Cc: Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Luo, Heng <heng.luo@intel.com>
Subject: [edk2-devel] [PATCH v6 51/52] TigerlakeSiliconPkg/SpiSmm: Update for SPI2 Protocol
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Updates references to the "PCH_SPI_PROTOCOL" to instead refer to "PCH_SPI2_PROTOCOL".
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Heng Luo <heng.luo@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/Spi.c | 10 +++++-----
Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf | 2 +-
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/Spi.c b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/Spi.c
index 419eddaff38d..a55cb37c4faa 100644
--- a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/Spi.c
+++ b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/Spi.c
@@ -13,7 +13,7 @@
#include <Library/BaseMemoryLib.h>
#include <Library/SmmServicesTableLib.h> #include <Library/PciSegmentLib.h> -#include <Protocol/Spi.h>
+#include <Protocol/Spi2.h>
#include <Protocol/SmmCpu.h>
#include <Library/SpiCommonLib.h>
#include <PchReservedResources.h>
@@ -45,8 +45,8 @@ GLOBAL_REMOVE_IF_UNREFERENCED UINT32 mSpiResvMmioAddr;
- Documented in System Management Mode Core Interface Specification .
- @result
- The SPI SMM driver produces @link _PCH_SPI_PROTOCOL PCH_SPI_PROTOCOL @endlink with GUID
- gPchSmmSpiProtocolGuid which is different from SPI RUNTIME driver.
+ The SPI SMM driver produces @link _PCH_SPI2_PROTOCOL PCH_SPI2_PROTOCOL @endlink with GUID
+ gPchSmmSpi2ProtocolGuid which is different from SPI RUNTIME driver.
- <b>Integration Check List</b>\n
- This driver supports Descriptor Mode only.
@@ -108,11 +108,11 @@ InstallPchSpi (
return Status;
}
///
- /// Install the SMM PCH_SPI_PROTOCOL interface
+ /// Install the SMM PCH_SPI2_PROTOCOL interface
///
Status = gSmst->SmmInstallProtocolInterface (
&(mSpiInstance->Handle),
- &gPchSmmSpiProtocolGuid,
+ &gPchSmmSpi2ProtocolGuid,
EFI_NATIVE_INTERFACE,
&(mSpiInstance->SpiProtocol)
);
diff --git a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf
index f64b84880b31..40feab02d3ef 100644
--- a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf
+++ b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Spi/Smm/SpiSmm.inf
@@ -39,7 +39,7 @@ [Sources]
[Protocols]
-gPchSmmSpiProtocolGuid ## PRODUCES
+gPchSmmSpi2ProtocolGuid ## PRODUCES
gEfiSmmCpuProtocolGuid ## CONSUMES
--
2.28.0.windows.1
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^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH v6 52/52] WhiskeylakeOpenBoardPkg: Update for SPI2 PPI
2021-10-28 22:08 [PATCH v6 36/52] KabylakeSiliconPkg: Remove PCH SPI PPI and Protocol from package Michael Kubacki
` (14 preceding siblings ...)
2021-10-28 22:08 ` [PATCH v6 51/52] TigerlakeSiliconPkg/SpiSmm: Update for SPI2 Protocol Michael Kubacki
@ 2021-10-28 22:08 ` Michael Kubacki
2021-11-02 23:29 ` [edk2-devel] " Nate DeSimone
15 siblings, 1 reply; 29+ messages in thread
From: Michael Kubacki @ 2021-10-28 22:08 UTC (permalink / raw)
To: devel
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Makes changes needed to use SPI2 PPI instead of the previous
SPI PPI.
M: Chasel Chiu <chasel.chiu@intel.com>
M: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf b/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
index b36dc2b4097c..e44cf5f02ac7 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
@@ -266,7 +266,7 @@ [Sources]
[Ppis]
gWdtPpiGuid ## CONSUMES
- gPchSpiPpiGuid ## CONSUMES
+ gPchSpi2PpiGuid ## CONSUMES
gSiPolicyPpiGuid ## CONSUMES
gSiPreMemPolicyPpiGuid ## CONSUMES
gPeiTbtPolicyPpiGuid ## CONSUMES
--
2.28.0.windows.1
^ permalink raw reply related [flat|nested] 29+ messages in thread* Re: [edk2-devel] [PATCH v6 52/52] WhiskeylakeOpenBoardPkg: Update for SPI2 PPI
2021-10-28 22:08 ` [PATCH v6 52/52] WhiskeylakeOpenBoardPkg: Update for SPI2 PPI Michael Kubacki
@ 2021-11-02 23:29 ` Nate DeSimone
0 siblings, 0 replies; 29+ messages in thread
From: Nate DeSimone @ 2021-11-02 23:29 UTC (permalink / raw)
To: devel@edk2.groups.io, mikuback@linux.microsoft.com
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Michael Kubacki
Sent: Thursday, October 28, 2021 3:09 PM
To: devel@edk2.groups.io
Subject: [edk2-devel] [PATCH v6 52/52] WhiskeylakeOpenBoardPkg: Update for SPI2 PPI
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307
Makes changes needed to use SPI2 PPI instead of the previous SPI PPI.
M: Chasel Chiu <chasel.chiu@intel.com>
M: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
---
Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf b/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
index b36dc2b4097c..e44cf5f02ac7 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpd
+++ ateLib/PeiPolicyUpdateLib.inf
@@ -266,7 +266,7 @@ [Sources]
[Ppis]
gWdtPpiGuid ## CONSUMES
- gPchSpiPpiGuid ## CONSUMES
+ gPchSpi2PpiGuid ## CONSUMES
gSiPolicyPpiGuid ## CONSUMES
gSiPreMemPolicyPpiGuid ## CONSUMES
gPeiTbtPolicyPpiGuid ## CONSUMES
--
2.28.0.windows.1
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^ permalink raw reply [flat|nested] 29+ messages in thread