From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wm1-f48.google.com (mail-wm1-f48.google.com [209.85.128.48]) by mx.groups.io with SMTP id smtpd.web10.47857.1635788223983168598 for ; Mon, 01 Nov 2021 10:37:04 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@nuviainc-com.20210112.gappssmtp.com header.s=20210112 header.b=JiB2Jm3X; spf=pass (domain: nuviainc.com, ip: 209.85.128.48, mailfrom: leif@nuviainc.com) Received: by mail-wm1-f48.google.com with SMTP id c71-20020a1c9a4a000000b0032cdcc8cbafso434298wme.3 for ; Mon, 01 Nov 2021 10:37:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nuviainc-com.20210112.gappssmtp.com; s=20210112; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=lPgZ7wuJQsE4b2MGS3ZFZ7o/we4sWvfMgtjw93hC2vY=; b=JiB2Jm3Xc4BOsyAt4o4eWiSDZaLdSHXiHceWAg+Oeki2QokkhODNi4y/9YHh9Xvcc4 15Qoku+g/gzVjaYFHZTAyZNO7+Z9coQA5rN/Ym6NWCwkAf5qHWArlDMRxl1oSkniXNZ+ Qpl+aTu3v/tpUsAi980rSQFXKxDD884AsD9u9dYGAk/zb+azd6iP3NO3jPvip1mzbhqj 2Gie+OoeDPnpkiR++02EtIwInBL4p+ogAxqnqqFiMPOM06lMw9jmso/PCjHVug09Gksu u2GqSyH6+vgi4OeFzY0wvR+y6uiOs6btWg45kWCzFNKDowCnkBxsNvdCQZpvymlA+A3r UwPg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=lPgZ7wuJQsE4b2MGS3ZFZ7o/we4sWvfMgtjw93hC2vY=; b=ntcKKO3xJxgh4pgyTDgZrszQZhgaY3vOf9nlOV60/6D168rnZ99kbUg6t70YeSCgmG FLFAqP4/lUxWVn3ixHnVGzh/dPMnrYj0z4GnI2D9AlUK2xI2CrcR0kYK+qtrDQI2sPUr PBWYvGw6yqA3rk4gRFlQAG6C2PNr2tKXpHF4I1XWLHvd6owC8B9t3MwGdGhTuuA0fz8z 8wrJTOCCia5ZKSJ26mRrI4FTrpBYTGHMzizy/jzi1BBcvSO3Z9cyHceujX3vj/G+33Ml Xqa1/U5WeIN/2gBwrvbeiPysV007A2ABGaXsd5nxgFJ04bj9k54DqrWROyNaXAp6mAn0 Ufvw== X-Gm-Message-State: AOAM530tc+/U6r5OzKeszmvjtAWwOcV3Yb2G+ehuoAmdWxBzYYsBehWI Amho86UilX0ujHott103uhX6BQ== X-Google-Smtp-Source: ABdhPJys5AT7R0f2DtM2Br9In8dunH48x1TuQcCKyvA4x8FRl5dtCVkvrLB50M8JxH+UZlMZizyaQw== X-Received: by 2002:a1c:1fcf:: with SMTP id f198mr374967wmf.66.1635788222555; Mon, 01 Nov 2021 10:37:02 -0700 (PDT) Return-Path: Received: from leviathan (cpc92314-cmbg19-2-0-cust559.5-4.cable.virginm.net. [82.11.186.48]) by smtp.gmail.com with ESMTPSA id l4sm7600101wrv.94.2021.11.01.10.37.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 Nov 2021 10:37:02 -0700 (PDT) Date: Mon, 1 Nov 2021 17:37:00 +0000 From: "Leif Lindholm" To: Shashi Mallela Cc: ardb+tianocore@kernel.org, graeme@nuviainc.com, devel@edk2.groups.io, Ard Biesheuvel Subject: Re: [PATCH] Silicon/Qemu/Sbsa: Enable Always-On capability for PE timers Message-ID: <20211101173700.ukcogcmn4lfozm23@leviathan> References: <20211028010756.27425-1-shashi.mallela@linaro.org> MIME-Version: 1.0 In-Reply-To: <20211028010756.27425-1-shashi.mallela@linaro.org> Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Hi Shashi, The build fails after applying this patch. Please resubmit after you have fixed *and* tested it. / Leif On Wed, Oct 27, 2021 at 21:07:56 -0400, Shashi Mallela wrote: > Setting the Always-on Capability bit in GTDT table for > system PE timers in sbsa platform.This is also required > for ACS sbsa level 3 test compliancy. > > Cc: Leif Lindholm > Cc: Ard Biesheuvel > Cc: Graeme Gregory > Signed-off-by: Shashi Mallela > --- > Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc b/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc > index 14733a37183d..27db6da61704 100644 > --- a/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc > +++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc > @@ -28,8 +28,11 @@ > #define GTDT_TIMER_LEVEL_TRIGGERED 0 > #define GTDT_TIMER_ACTIVE_LOW EFI_ACPI_6_3_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY > #define GTDT_TIMER_ACTIVE_HIGH 0 > +#define GTDT_TIMER_ALWAYS_ON EFI_ACPI_6_3_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY > > -#define GTDT_GTIMER_FLAGS (GTDT_TIMER_ACTIVE_LOW | GTDT_TIMER_LEVEL_TRIGGERED) > +#define GTDT_GTIMER_FLAGS (GTDT_TIMER_ACTIVE_LOW | > + GTDT_TIMER_LEVEL_TRIGGERED | > + GTDT_TIMER_ALWAYS_ON) > > #define SBSA_PLATFORM_WATCHDOG_COUNT 1 > #define SBSA_PLATFORM_TIMER_COUNT (SBSA_PLATFORM_WATCHDOG_COUNT) > -- > 2.27.0 >