* [PATCH v2 1/1] Silicon/Qemu/Sbsa: Enable Always-On capability for PE timers
@ 2021-11-01 17:54 Marcin Juszkiewicz
2021-11-01 18:43 ` Leif Lindholm
0 siblings, 1 reply; 2+ messages in thread
From: Marcin Juszkiewicz @ 2021-11-01 17:54 UTC (permalink / raw)
To: devel
Cc: Shashi Mallela, Leif Lindholm, Ard Biesheuvel, Graeme Gregory,
Marcin Juszkiewicz
From: Shashi Mallela <shashi.mallela@linaro.org>
Setting the Always-on Capability bit in GTDT table for
system PE timers in sbsa platform.This is also required
for ACS sbsa level 3 test compliancy.
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Cc: Graeme Gregory <graeme@nuviainc.com>
Signed-off-by: Shashi Mallela <shashi.mallela@linaro.org>
[fixed compilation error]
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Tested-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
---
Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc b/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc
index 14733a37183d..ba145aff6413 100644
--- a/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc
+++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc
@@ -28,8 +28,11 @@
#define GTDT_TIMER_LEVEL_TRIGGERED 0
#define GTDT_TIMER_ACTIVE_LOW EFI_ACPI_6_3_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY
#define GTDT_TIMER_ACTIVE_HIGH 0
+#define GTDT_TIMER_ALWAYS_ON EFI_ACPI_6_3_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY
-#define GTDT_GTIMER_FLAGS (GTDT_TIMER_ACTIVE_LOW | GTDT_TIMER_LEVEL_TRIGGERED)
+#define GTDT_GTIMER_FLAGS (GTDT_TIMER_ACTIVE_LOW | \
+ GTDT_TIMER_LEVEL_TRIGGERED | \
+ GTDT_TIMER_ALWAYS_ON)
#define SBSA_PLATFORM_WATCHDOG_COUNT 1
#define SBSA_PLATFORM_TIMER_COUNT (SBSA_PLATFORM_WATCHDOG_COUNT)
--
2.32.0
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH v2 1/1] Silicon/Qemu/Sbsa: Enable Always-On capability for PE timers
2021-11-01 17:54 [PATCH v2 1/1] Silicon/Qemu/Sbsa: Enable Always-On capability for PE timers Marcin Juszkiewicz
@ 2021-11-01 18:43 ` Leif Lindholm
0 siblings, 0 replies; 2+ messages in thread
From: Leif Lindholm @ 2021-11-01 18:43 UTC (permalink / raw)
To: Marcin Juszkiewicz; +Cc: devel, Shashi Mallela, Ard Biesheuvel, Graeme Gregory
On Mon, Nov 01, 2021 at 18:54:57 +0100, Marcin Juszkiewicz wrote:
> From: Shashi Mallela <shashi.mallela@linaro.org>
>
> Setting the Always-on Capability bit in GTDT table for
> system PE timers in sbsa platform.This is also required
> for ACS sbsa level 3 test compliancy.
>
> Cc: Leif Lindholm <leif@nuviainc.com>
> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
> Cc: Graeme Gregory <graeme@nuviainc.com>
> Signed-off-by: Shashi Mallela <shashi.mallela@linaro.org>
>
> [fixed compilation error]
>
> Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
> Tested-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Acked-by: Leif Lindholm <leif@nuviainc.com>
Pushed as f5fe24c4efea - thanks!
> ---
> Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc b/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc
> index 14733a37183d..ba145aff6413 100644
> --- a/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc
> +++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc
> @@ -28,8 +28,11 @@
> #define GTDT_TIMER_LEVEL_TRIGGERED 0
> #define GTDT_TIMER_ACTIVE_LOW EFI_ACPI_6_3_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY
> #define GTDT_TIMER_ACTIVE_HIGH 0
> +#define GTDT_TIMER_ALWAYS_ON EFI_ACPI_6_3_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY
>
> -#define GTDT_GTIMER_FLAGS (GTDT_TIMER_ACTIVE_LOW | GTDT_TIMER_LEVEL_TRIGGERED)
> +#define GTDT_GTIMER_FLAGS (GTDT_TIMER_ACTIVE_LOW | \
> + GTDT_TIMER_LEVEL_TRIGGERED | \
> + GTDT_TIMER_ALWAYS_ON)
>
> #define SBSA_PLATFORM_WATCHDOG_COUNT 1
> #define SBSA_PLATFORM_TIMER_COUNT (SBSA_PLATFORM_WATCHDOG_COUNT)
> --
> 2.32.0
>
^ permalink raw reply [flat|nested] 2+ messages in thread
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