From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from muminek.juszkiewicz.com.pl (muminek.juszkiewicz.com.pl [213.251.184.221]) by mx.groups.io with SMTP id smtpd.web08.48362.1635789306356066397 for ; Mon, 01 Nov 2021 10:55:06 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=softfail (domain: linaro.org, ip: 213.251.184.221, mailfrom: marcin.juszkiewicz@linaro.org) Received: from localhost (localhost [127.0.0.1]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTP id 590B92606C9; Mon, 1 Nov 2021 18:55:03 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at juszkiewicz.com.pl Received: from muminek.juszkiewicz.com.pl ([127.0.0.1]) by localhost (muminek.juszkiewicz.com.pl [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 3h2dSqjCkPmO; Mon, 1 Nov 2021 18:55:00 +0100 (CET) Received: from puchatek.lan (83.11.24.83.ipv4.supernova.orange.pl [83.11.24.83]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTPSA id 67D3426009E; Mon, 1 Nov 2021 18:55:00 +0100 (CET) From: "Marcin Juszkiewicz" To: devel@edk2.groups.io Cc: Shashi Mallela , Leif Lindholm , Ard Biesheuvel , Graeme Gregory , Marcin Juszkiewicz Subject: [PATCH v2 1/1] Silicon/Qemu/Sbsa: Enable Always-On capability for PE timers Date: Mon, 1 Nov 2021 18:54:57 +0100 Message-Id: <20211101175457.891151-1-marcin.juszkiewicz@linaro.org> X-Mailer: git-send-email 2.32.0 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Shashi Mallela Setting the Always-on Capability bit in GTDT table for system PE timers in sbsa platform.This is also required for ACS sbsa level 3 test compliancy. Cc: Leif Lindholm Cc: Ard Biesheuvel Cc: Graeme Gregory Signed-off-by: Shashi Mallela [fixed compilation error] Signed-off-by: Marcin Juszkiewicz Tested-by: Marcin Juszkiewicz --- Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc b/Silicon/Qemu/Sbsa= Qemu/AcpiTables/Gtdt.aslc index 14733a37183d..ba145aff6413 100644 --- a/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc +++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc @@ -28,8 +28,11 @@ #define GTDT_TIMER_LEVEL_TRIGGERED 0=0D #define GTDT_TIMER_ACTIVE_LOW EFI_ACPI_6_3_GTDT_TIMER_FLAG_TIMER_INT= ERRUPT_POLARITY=0D #define GTDT_TIMER_ACTIVE_HIGH 0=0D +#define GTDT_TIMER_ALWAYS_ON EFI_ACPI_6_3_GTDT_TIMER_FLAG_ALWAYS_ON= _CAPABILITY=0D =0D -#define GTDT_GTIMER_FLAGS (GTDT_TIMER_ACTIVE_LOW | GTDT_TIMER_LE= VEL_TRIGGERED)=0D +#define GTDT_GTIMER_FLAGS (GTDT_TIMER_ACTIVE_LOW | \=0D + GTDT_TIMER_LEVEL_TRIGGERED | \=0D + GTDT_TIMER_ALWAYS_ON)=0D =0D #define SBSA_PLATFORM_WATCHDOG_COUNT 1=0D #define SBSA_PLATFORM_TIMER_COUNT (SBSA_PLATFORM_WATCHDOG_COUNT)=0D --=20 2.32.0