* [PATCH v1 0/3] IntelSiliconPkg: Remove v1 PCH SPI PPI and Protocol
@ 2021-11-03 14:44 Michael Kubacki
2021-11-03 14:44 ` [PATCH v1 1/3] CometlakeOpenBoardPkg/PeiPolicyUpdateLib: Remove unneeded SPI header Michael Kubacki
` (5 more replies)
0 siblings, 6 replies; 7+ messages in thread
From: Michael Kubacki @ 2021-11-03 14:44 UTC (permalink / raw)
To: devel
Cc: Chasel Chiu, Nate DeSimone, Rangasai V Chaganty,
Deepika Kethi Reddy, Kathappan Esakkithevar, Ray Ni, Isaac Oram
From: Michael Kubacki <michael.kubacki@microsoft.com>
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3717
V2 of the PCH SPI PPI and PCH SPI Protocol were recently added to
IntelSiliconPkg. This change removes the v1 definitions.
V2 is intended to better support multiple silicon generations which
aligns with the goals of IntelSiliconPkg.
Minor changes are also made in board packages that have stale
references to the SPI PPI and Protocol.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Deepika Kethi Reddy <deepika.kethi.reddy@intel.com>
Cc: Kathappan Esakkithevar <kathappan.esakkithevar@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Michael Kubacki (3):
CometlakeOpenBoardPkg/PeiPolicyUpdateLib: Remove unneeded SPI header
WhiskeylakeOpenBoardPkg/PeiPolicyUpdateLib: Remove unneeded SPI header
IntelSiliconPkg: Remove SPI v1 PPI and Protocol definitions
Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPchPolicyUpdate.c | 1 -
Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPchPolicyUpdate.c | 1 -
Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf | 1 -
Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h | 25 --
Silicon/Intel/IntelSiliconPkg/Include/Protocol/Spi.h | 301 --------------------
Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 7 -
6 files changed, 336 deletions(-)
delete mode 100644 Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h
delete mode 100644 Silicon/Intel/IntelSiliconPkg/Include/Protocol/Spi.h
--
2.28.0.windows.1
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH v1 1/3] CometlakeOpenBoardPkg/PeiPolicyUpdateLib: Remove unneeded SPI header 2021-11-03 14:44 [PATCH v1 0/3] IntelSiliconPkg: Remove v1 PCH SPI PPI and Protocol Michael Kubacki @ 2021-11-03 14:44 ` Michael Kubacki 2021-11-03 14:44 ` [PATCH v1 2/3] WhiskeylakeOpenBoardPkg/PeiPolicyUpdateLib: " Michael Kubacki ` (4 subsequent siblings) 5 siblings, 0 replies; 7+ messages in thread From: Michael Kubacki @ 2021-11-03 14:44 UTC (permalink / raw) To: devel Cc: Chasel Chiu, Nate DeSimone, Rangasai V Chaganty, Deepika Kethi Reddy, Kathappan Esakkithevar From: Michael Kubacki <michael.kubacki@microsoft.com> This contents of the header file are not referenced in this source file. Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com> Cc: Deepika Kethi Reddy <deepika.kethi.reddy@intel.com> Cc: Kathappan Esakkithevar <kathappan.esakkithevar@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> --- Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPchPolicyUpdate.c | 1 - 1 file changed, 1 deletion(-) diff --git a/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPchPolicyUpdate.c b/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPchPolicyUpdate.c index 4a8ffa7226da..76de6e90c728 100644 --- a/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPchPolicyUpdate.c +++ b/Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPchPolicyUpdate.c @@ -17,7 +17,6 @@ #include <Library/PchPcrLib.h> #include <Library/PchSerialIoLib.h> #include <Library/PchPcieRpLib.h> -#include <Ppi/Spi.h> #include <GpioConfig.h> #include <Library/DebugLib.h> #include <Library/PchGbeLib.h> -- 2.28.0.windows.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v1 2/3] WhiskeylakeOpenBoardPkg/PeiPolicyUpdateLib: Remove unneeded SPI header 2021-11-03 14:44 [PATCH v1 0/3] IntelSiliconPkg: Remove v1 PCH SPI PPI and Protocol Michael Kubacki 2021-11-03 14:44 ` [PATCH v1 1/3] CometlakeOpenBoardPkg/PeiPolicyUpdateLib: Remove unneeded SPI header Michael Kubacki @ 2021-11-03 14:44 ` Michael Kubacki 2021-11-03 14:44 ` [PATCH v1 3/3] IntelSiliconPkg: Remove SPI v1 PPI and Protocol definitions Michael Kubacki ` (3 subsequent siblings) 5 siblings, 0 replies; 7+ messages in thread From: Michael Kubacki @ 2021-11-03 14:44 UTC (permalink / raw) To: devel; +Cc: Chasel Chiu, Nate DeSimone From: Michael Kubacki <michael.kubacki@microsoft.com> This contents of the header file are not referenced in this source file. Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> --- Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPchPolicyUpdate.c | 1 - Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf | 1 - 2 files changed, 2 deletions(-) diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPchPolicyUpdate.c b/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPchPolicyUpdate.c index ebce9b271a2d..049ca6a604bd 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPchPolicyUpdate.c +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPchPolicyUpdate.c @@ -17,7 +17,6 @@ #include <Library/PchPcrLib.h> #include <Library/PchSerialIoLib.h> #include <Library/PchPcieRpLib.h> -#include <Ppi/Spi.h> #include <GpioConfig.h> #include <Library/DebugLib.h> #include <Library/PchGbeLib.h> diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf b/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf index e44cf5f02ac7..af5d4dfeb7ca 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf @@ -266,7 +266,6 @@ [Sources] [Ppis] gWdtPpiGuid ## CONSUMES - gPchSpi2PpiGuid ## CONSUMES gSiPolicyPpiGuid ## CONSUMES gSiPreMemPolicyPpiGuid ## CONSUMES gPeiTbtPolicyPpiGuid ## CONSUMES -- 2.28.0.windows.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v1 3/3] IntelSiliconPkg: Remove SPI v1 PPI and Protocol definitions 2021-11-03 14:44 [PATCH v1 0/3] IntelSiliconPkg: Remove v1 PCH SPI PPI and Protocol Michael Kubacki 2021-11-03 14:44 ` [PATCH v1 1/3] CometlakeOpenBoardPkg/PeiPolicyUpdateLib: Remove unneeded SPI header Michael Kubacki 2021-11-03 14:44 ` [PATCH v1 2/3] WhiskeylakeOpenBoardPkg/PeiPolicyUpdateLib: " Michael Kubacki @ 2021-11-03 14:44 ` Michael Kubacki 2021-11-03 17:57 ` [edk2-devel] [PATCH v1 0/3] IntelSiliconPkg: Remove v1 PCH SPI PPI and Protocol Nate DeSimone ` (2 subsequent siblings) 5 siblings, 0 replies; 7+ messages in thread From: Michael Kubacki @ 2021-11-03 14:44 UTC (permalink / raw) To: devel; +Cc: Ray Ni, Rangasai V Chaganty, Nate DeSimone, Isaac Oram From: Michael Kubacki <michael.kubacki@microsoft.com> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3717 V2 of the PCH SPI PPI and PCH SPI Protocol were recently added to IntelSiliconPkg. This change removes the v1 definitions. V2 is intended to better support multiple silicon generations which aligns with the goals of IntelSiliconPkg. Cc: Ray Ni <ray.ni@intel.com> Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Isaac Oram <isaac.w.oram@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> --- Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h | 25 -- Silicon/Intel/IntelSiliconPkg/Include/Protocol/Spi.h | 301 -------------------- Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 7 - 3 files changed, 333 deletions(-) diff --git a/Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h b/Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h deleted file mode 100644 index b2410bd17300..000000000000 --- a/Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h +++ /dev/null @@ -1,25 +0,0 @@ -/** @file - This file defines the PCH SPI PPI which implements the - Intel(R) PCH SPI Host Controller Compatibility Interface. - - Copyright (c) 2019, Intel Corporation. All rights reserved.<BR> - SPDX-License-Identifier: BSD-2-Clause-Patent -**/ -#ifndef _PCH_SPI_PPI_H_ -#define _PCH_SPI_PPI_H_ - -#include <Protocol/Spi.h> - -// -// Extern the GUID for PPI users. -// -extern EFI_GUID gPchSpiPpiGuid; - -/** - Reuse the PCH_SPI_PROTOCOL definitions - This is possible becaues the PPI implementation does not rely on a PeiService pointer, - as it uses EDKII Glue Lib to do IO accesses -**/ -typedef PCH_SPI_PROTOCOL PCH_SPI_PPI; - -#endif diff --git a/Silicon/Intel/IntelSiliconPkg/Include/Protocol/Spi.h b/Silicon/Intel/IntelSiliconPkg/Include/Protocol/Spi.h deleted file mode 100644 index c13dc5a5f5f5..000000000000 --- a/Silicon/Intel/IntelSiliconPkg/Include/Protocol/Spi.h +++ /dev/null @@ -1,301 +0,0 @@ -/** @file - This file defines the PCH SPI Protocol which implements the - Intel(R) PCH SPI Host Controller Compatibility Interface. - - Copyright (c) 2021, Intel Corporation. All rights reserved.<BR> - SPDX-License-Identifier: BSD-2-Clause-Patent -**/ -#ifndef _PCH_SPI_PROTOCOL_H_ -#define _PCH_SPI_PROTOCOL_H_ - -// -// Extern the GUID for protocol users. -// -extern EFI_GUID gPchSpiProtocolGuid; -extern EFI_GUID gPchSmmSpiProtocolGuid; - -// -// Forward reference for ANSI C compatibility -// -typedef struct _PCH_SPI_PROTOCOL PCH_SPI_PROTOCOL; - -// -// SPI protocol data structures and definitions -// - -/** - Flash Region Type -**/ -typedef enum { - FlashRegionDescriptor, - FlashRegionBios, - FlashRegionMe, - FlashRegionGbE, - FlashRegionPlatformData, - FlashRegionDer, - FlashRegionSecondaryBios, - FlashRegionuCodePatch, - FlashRegionEC, - FlashRegionDeviceExpansion2, - FlashRegionIE, - FlashRegion10Gbe_A, - FlashRegion10Gbe_B, - FlashRegion13, - FlashRegion14, - FlashRegion15, - FlashRegionAll, - FlashRegionMax -} FLASH_REGION_TYPE; -// -// Protocol member functions -// - -/** - Read data from the flash part. - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor. - @param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions. - @param[in] ByteCount Number of bytes in the data portion of the SPI cycle. - @param[out] Buffer The Pointer to caller-allocated buffer containing the dada received. - It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read. - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_FLASH_READ) ( - IN PCH_SPI_PROTOCOL *This, - IN FLASH_REGION_TYPE FlashRegionType, - IN UINT32 Address, - IN UINT32 ByteCount, - OUT UINT8 *Buffer - ); - -/** - Write data to the flash part. Remark: Erase may be needed before write to the flash part. - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor. - @param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions. - @param[in] ByteCount Number of bytes in the data portion of the SPI cycle. - @param[in] Buffer Pointer to caller-allocated buffer containing the data sent during the SPI cycle. - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_FLASH_WRITE) ( - IN PCH_SPI_PROTOCOL *This, - IN FLASH_REGION_TYPE FlashRegionType, - IN UINT32 Address, - IN UINT32 ByteCount, - IN UINT8 *Buffer - ); - -/** - Erase some area on the flash part. - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] FlashRegionType The Flash Region type for flash cycle which is listed in the Descriptor. - @param[in] Address The Flash Linear Address must fall within a region for which BIOS has access permissions. - @param[in] ByteCount Number of bytes in the data portion of the SPI cycle. - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_FLASH_ERASE) ( - IN PCH_SPI_PROTOCOL *This, - IN FLASH_REGION_TYPE FlashRegionType, - IN UINT32 Address, - IN UINT32 ByteCount - ); - -/** - Read SFDP data from the flash part. - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] ComponentNumber The Componen Number for chip select - @param[in] Address The starting byte address for SFDP data read. - @param[in] ByteCount Number of bytes in SFDP data portion of the SPI cycle - @param[out] SfdpData The Pointer to caller-allocated buffer containing the SFDP data received - It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_FLASH_READ_SFDP) ( - IN PCH_SPI_PROTOCOL *This, - IN UINT8 ComponentNumber, - IN UINT32 Address, - IN UINT32 ByteCount, - OUT UINT8 *SfdpData - ); - -/** - Read Jedec Id from the flash part. - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] ComponentNumber The Componen Number for chip select - @param[in] ByteCount Number of bytes in JedecId data portion of the SPI cycle, the data size is 3 typically - @param[out] JedecId The Pointer to caller-allocated buffer containing JEDEC ID received - It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read. - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_FLASH_READ_JEDEC_ID) ( - IN PCH_SPI_PROTOCOL *This, - IN UINT8 ComponentNumber, - IN UINT32 ByteCount, - OUT UINT8 *JedecId - ); - -/** - Write the status register in the flash part. - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically - @param[in] StatusValue The Pointer to caller-allocated buffer containing the value of Status register writing - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_FLASH_WRITE_STATUS) ( - IN PCH_SPI_PROTOCOL *This, - IN UINT32 ByteCount, - IN UINT8 *StatusValue - ); - -/** - Read status register in the flash part. - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] ByteCount Number of bytes in Status data portion of the SPI cycle, the data size is 1 typically - @param[out] StatusValue The Pointer to caller-allocated buffer containing the value of Status register received. - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_FLASH_READ_STATUS) ( - IN PCH_SPI_PROTOCOL *This, - IN UINT32 ByteCount, - OUT UINT8 *StatusValue - ); - -/** - Get the SPI region base and size, based on the enum type - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] FlashRegionType The Flash Region type for for the base address which is listed in the Descriptor. - @param[out] BaseAddress The Flash Linear Address for the Region 'n' Base - @param[out] RegionSize The size for the Region 'n' - - @retval EFI_SUCCESS Read success - @retval EFI_INVALID_PARAMETER Invalid region type given - @retval EFI_DEVICE_ERROR The region is not used -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_GET_REGION_ADDRESS) ( - IN PCH_SPI_PROTOCOL *This, - IN FLASH_REGION_TYPE FlashRegionType, - OUT UINT32 *BaseAddress, - OUT UINT32 *RegionSize - ); - -/** - Read PCH Soft Strap Values - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA. - @param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle - @param[out] SoftStrapValue The Pointer to caller-allocated buffer containing PCH Soft Strap Value. - If the value of ByteCount is 0, the data type of SoftStrapValue should be UINT16 and SoftStrapValue will be PCH Soft Strap Length - It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read. - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_READ_PCH_SOFTSTRAP) ( - IN PCH_SPI_PROTOCOL *This, - IN UINT32 SoftStrapAddr, - IN UINT32 ByteCount, - OUT VOID *SoftStrapValue - ); - -/** - Read CPU Soft Strap Values - - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. - @param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUSBA. - @param[in] ByteCount Number of bytes in SoftStrap data portion of the SPI cycle. - @param[out] SoftStrapValue The Pointer to caller-allocated buffer containing CPU Soft Strap Value. - If the value of ByteCount is 0, the data type of SoftStrapValue should be UINT16 and SoftStrapValue will be PCH Soft Strap Length - It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read. - - @retval EFI_SUCCESS Command succeed. - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. -**/ -typedef -EFI_STATUS -(EFIAPI *PCH_SPI_READ_CPU_SOFTSTRAP) ( - IN PCH_SPI_PROTOCOL *This, - IN UINT32 SoftStrapAddr, - IN UINT32 ByteCount, - OUT VOID *SoftStrapValue - ); - -/** - These protocols/PPI allows a platform module to perform SPI operations through the - Intel PCH SPI Host Controller Interface. -**/ -struct _PCH_SPI_PROTOCOL { - /** - This member specifies the revision of this structure. This field is used to - indicate backwards compatible changes to the protocol. - **/ - UINT8 Revision; - PCH_SPI_FLASH_READ FlashRead; ///< Read data from the flash part. - PCH_SPI_FLASH_WRITE FlashWrite; ///< Write data to the flash part. Remark: Erase may be needed before write to the flash part. - PCH_SPI_FLASH_ERASE FlashErase; ///< Erase some area on the flash part. - PCH_SPI_FLASH_READ_SFDP FlashReadSfdp; ///< Read SFDP data from the flash part. - PCH_SPI_FLASH_READ_JEDEC_ID FlashReadJedecId; ///< Read Jedec Id from the flash part. - PCH_SPI_FLASH_WRITE_STATUS FlashWriteStatus; ///< Write the status register in the flash part. - PCH_SPI_FLASH_READ_STATUS FlashReadStatus; ///< Read status register in the flash part. - PCH_SPI_GET_REGION_ADDRESS GetRegionAddress; ///< Get the SPI region base and size - PCH_SPI_READ_PCH_SOFTSTRAP ReadPchSoftStrap; ///< Read PCH Soft Strap Values - PCH_SPI_READ_CPU_SOFTSTRAP ReadCpuSoftStrap; ///< Read CPU Soft Strap Values -}; - -/** - PCH SPI PPI/PROTOCOL revision number - - Revision 1: Initial version -**/ -#define PCH_SPI_SERVICES_REVISION 1 - -#endif diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec index 1704f9e02541..f950c3d1c72b 100644 --- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec +++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec @@ -93,9 +93,6 @@ [Guids] gFlashRegionMaxGuid = { 0x74c2e3c1, 0x8faa, 0x4659, {0xa7, 0xbb, 0x87, 0x1f, 0xbb, 0x61, 0xd3, 0xb4 } } [Ppis] - ## Include/Ppi/Spi.h - gPchSpiPpiGuid = { 0x104c7177, 0xc2e6, 0x44f0, { 0xae, 0xe3, 0x9d, 0x0d, 0x9a, 0x52, 0xca, 0xdf } } - ## Include/Ppi/Spi2.h gPchSpi2PpiGuid = { 0x63c40580, 0x10c4, 0x4a8e, { 0xb4, 0x16, 0x86, 0x85, 0x25, 0x7e, 0xce, 0x04 } } @@ -105,10 +102,6 @@ [Ppis] [Protocols] ## Protocols that provide services for the Intel(R) PCH SPI Host Controller Compatibility Interface - # Include/Protocol/Spi.h - gPchSpiProtocolGuid = { 0xe007dec0, 0xccc3, 0x4c90, { 0x9c, 0xd0, 0xef, 0x99, 0x38, 0x83, 0x28, 0xcf } } - gPchSmmSpiProtocolGuid = { 0x4840e48e, 0xc264, 0x4fef, { 0xb9, 0x34, 0x14, 0x84, 0x0c, 0x95, 0xd8, 0x3f } } - # Include/Protocol/Spi2.h gPchSpi2ProtocolGuid = { 0x3a99abd1, 0x096c, 0x4399, { 0xb1, 0x68, 0x52, 0xaa, 0x52, 0x64, 0xce, 0x70 } } gPchSmmSpi2ProtocolGuid = { 0x2d1c0c43, 0x20d3, 0x40ae, { 0x99, 0x07, 0x2d, 0xf0, 0xe7, 0x91, 0x21, 0xa5 } } -- 2.28.0.windows.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [edk2-devel] [PATCH v1 0/3] IntelSiliconPkg: Remove v1 PCH SPI PPI and Protocol 2021-11-03 14:44 [PATCH v1 0/3] IntelSiliconPkg: Remove v1 PCH SPI PPI and Protocol Michael Kubacki ` (2 preceding siblings ...) 2021-11-03 14:44 ` [PATCH v1 3/3] IntelSiliconPkg: Remove SPI v1 PPI and Protocol definitions Michael Kubacki @ 2021-11-03 17:57 ` Nate DeSimone 2021-11-03 18:22 ` Chaganty, Rangasai V 2021-12-02 0:19 ` [edk2-devel] " Nate DeSimone 5 siblings, 0 replies; 7+ messages in thread From: Nate DeSimone @ 2021-11-03 17:57 UTC (permalink / raw) To: devel@edk2.groups.io, mikuback@linux.microsoft.com Cc: Chiu, Chasel, Chaganty, Rangasai V, Kethi Reddy, Deepika, Esakkithevar, Kathappan, Ni, Ray, Oram, Isaac W For the series... Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com> > -----Original Message----- > From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Michael > Kubacki > Sent: Wednesday, November 3, 2021 7:45 AM > To: devel@edk2.groups.io > Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L > <nathaniel.l.desimone@intel.com>; Chaganty, Rangasai V > <rangasai.v.chaganty@intel.com>; Kethi Reddy, Deepika > <deepika.kethi.reddy@intel.com>; Esakkithevar, Kathappan > <kathappan.esakkithevar@intel.com>; Ni, Ray <ray.ni@intel.com>; Oram, Isaac > W <isaac.w.oram@intel.com> > Subject: [edk2-devel] [PATCH v1 0/3] IntelSiliconPkg: Remove v1 PCH SPI PPI > and Protocol > > From: Michael Kubacki <michael.kubacki@microsoft.com> > > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3717 > > V2 of the PCH SPI PPI and PCH SPI Protocol were recently added to > IntelSiliconPkg. This change removes the v1 definitions. > > V2 is intended to better support multiple silicon generations which aligns with > the goals of IntelSiliconPkg. > > Minor changes are also made in board packages that have stale references to > the SPI PPI and Protocol. > > Cc: Chasel Chiu <chasel.chiu@intel.com> > Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> > Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com> > Cc: Deepika Kethi Reddy <deepika.kethi.reddy@intel.com> > Cc: Kathappan Esakkithevar <kathappan.esakkithevar@intel.com> > Cc: Ray Ni <ray.ni@intel.com> > Cc: Isaac Oram <isaac.w.oram@intel.com> > Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> > > Michael Kubacki (3): > CometlakeOpenBoardPkg/PeiPolicyUpdateLib: Remove unneeded SPI header > WhiskeylakeOpenBoardPkg/PeiPolicyUpdateLib: Remove unneeded SPI header > IntelSiliconPkg: Remove SPI v1 PPI and Protocol definitions > > > Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/Pei > PchPolicyUpdate.c | 1 - > > Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/P > eiPchPolicyUpdate.c | 1 - > > Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/P > eiPolicyUpdateLib.inf | 1 - > Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h | > 25 -- > Silicon/Intel/IntelSiliconPkg/Include/Protocol/Spi.h | > 301 -------------------- > Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 7 > - > 6 files changed, 336 deletions(-) > delete mode 100644 Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h > delete mode 100644 Silicon/Intel/IntelSiliconPkg/Include/Protocol/Spi.h > > -- > 2.28.0.windows.1 > > > > -=-=-=-=-=-= > Groups.io Links: You receive all messages sent to this group. > View/Reply Online (#83259): https://edk2.groups.io/g/devel/message/83259 > Mute This Topic: https://groups.io/mt/86792794/1767664 > Group Owner: devel+owner@edk2.groups.io > Unsubscribe: https://edk2.groups.io/g/devel/unsub > [nathaniel.l.desimone@intel.com] > -=-=-=-=-=-= > ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v1 0/3] IntelSiliconPkg: Remove v1 PCH SPI PPI and Protocol 2021-11-03 14:44 [PATCH v1 0/3] IntelSiliconPkg: Remove v1 PCH SPI PPI and Protocol Michael Kubacki ` (3 preceding siblings ...) 2021-11-03 17:57 ` [edk2-devel] [PATCH v1 0/3] IntelSiliconPkg: Remove v1 PCH SPI PPI and Protocol Nate DeSimone @ 2021-11-03 18:22 ` Chaganty, Rangasai V 2021-12-02 0:19 ` [edk2-devel] " Nate DeSimone 5 siblings, 0 replies; 7+ messages in thread From: Chaganty, Rangasai V @ 2021-11-03 18:22 UTC (permalink / raw) To: mikuback@linux.microsoft.com, devel@edk2.groups.io Cc: Chiu, Chasel, Desimone, Nathaniel L, Kethi Reddy, Deepika, Esakkithevar, Kathappan, Ni, Ray, Oram, Isaac W For the series, Reviewed-by: Sai Chaganty <rangasai.v.chaganty@intel.com> -----Original Message----- From: mikuback@linux.microsoft.com <mikuback@linux.microsoft.com> Sent: Wednesday, November 03, 2021 7:45 AM To: devel@edk2.groups.io Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>; Kethi Reddy, Deepika <deepika.kethi.reddy@intel.com>; Esakkithevar, Kathappan <kathappan.esakkithevar@intel.com>; Ni, Ray <ray.ni@intel.com>; Oram, Isaac W <isaac.w.oram@intel.com> Subject: [PATCH v1 0/3] IntelSiliconPkg: Remove v1 PCH SPI PPI and Protocol From: Michael Kubacki <michael.kubacki@microsoft.com> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3717 V2 of the PCH SPI PPI and PCH SPI Protocol were recently added to IntelSiliconPkg. This change removes the v1 definitions. V2 is intended to better support multiple silicon generations which aligns with the goals of IntelSiliconPkg. Minor changes are also made in board packages that have stale references to the SPI PPI and Protocol. Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com> Cc: Deepika Kethi Reddy <deepika.kethi.reddy@intel.com> Cc: Kathappan Esakkithevar <kathappan.esakkithevar@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Isaac Oram <isaac.w.oram@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Michael Kubacki (3): CometlakeOpenBoardPkg/PeiPolicyUpdateLib: Remove unneeded SPI header WhiskeylakeOpenBoardPkg/PeiPolicyUpdateLib: Remove unneeded SPI header IntelSiliconPkg: Remove SPI v1 PPI and Protocol definitions Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPchPolicyUpdate.c | 1 - Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPchPolicyUpdate.c | 1 - Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf | 1 - Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h | 25 -- Silicon/Intel/IntelSiliconPkg/Include/Protocol/Spi.h | 301 -------------------- Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 7 - 6 files changed, 336 deletions(-) delete mode 100644 Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h delete mode 100644 Silicon/Intel/IntelSiliconPkg/Include/Protocol/Spi.h -- 2.28.0.windows.1 ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [edk2-devel] [PATCH v1 0/3] IntelSiliconPkg: Remove v1 PCH SPI PPI and Protocol 2021-11-03 14:44 [PATCH v1 0/3] IntelSiliconPkg: Remove v1 PCH SPI PPI and Protocol Michael Kubacki ` (4 preceding siblings ...) 2021-11-03 18:22 ` Chaganty, Rangasai V @ 2021-12-02 0:19 ` Nate DeSimone 5 siblings, 0 replies; 7+ messages in thread From: Nate DeSimone @ 2021-12-02 0:19 UTC (permalink / raw) To: devel@edk2.groups.io, mikuback@linux.microsoft.com Cc: Chiu, Chasel, Chaganty, Rangasai V, Kethi Reddy, Deepika, Esakkithevar, Kathappan, Ni, Ray, Oram, Isaac W The series has been pushed as 5e6b853~..3fd4e12 -----Original Message----- From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Michael Kubacki Sent: Wednesday, November 3, 2021 7:45 AM To: devel@edk2.groups.io Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>; Kethi Reddy, Deepika <deepika.kethi.reddy@intel.com>; Esakkithevar, Kathappan <Kathappan.Esakkithevar@intel.com>; Ni, Ray <ray.ni@intel.com>; Oram, Isaac W <isaac.w.oram@intel.com> Subject: [edk2-devel] [PATCH v1 0/3] IntelSiliconPkg: Remove v1 PCH SPI PPI and Protocol From: Michael Kubacki <michael.kubacki@microsoft.com> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3717 V2 of the PCH SPI PPI and PCH SPI Protocol were recently added to IntelSiliconPkg. This change removes the v1 definitions. V2 is intended to better support multiple silicon generations which aligns with the goals of IntelSiliconPkg. Minor changes are also made in board packages that have stale references to the SPI PPI and Protocol. Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com> Cc: Deepika Kethi Reddy <deepika.kethi.reddy@intel.com> Cc: Kathappan Esakkithevar <kathappan.esakkithevar@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Isaac Oram <isaac.w.oram@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Michael Kubacki (3): CometlakeOpenBoardPkg/PeiPolicyUpdateLib: Remove unneeded SPI header WhiskeylakeOpenBoardPkg/PeiPolicyUpdateLib: Remove unneeded SPI header IntelSiliconPkg: Remove SPI v1 PPI and Protocol definitions Platform/Intel/CometlakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPchPolicyUpdate.c | 1 - Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPchPolicyUpdate.c | 1 - Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf | 1 - Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h | 25 -- Silicon/Intel/IntelSiliconPkg/Include/Protocol/Spi.h | 301 -------------------- Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 7 - 6 files changed, 336 deletions(-) delete mode 100644 Silicon/Intel/IntelSiliconPkg/Include/Ppi/Spi.h delete mode 100644 Silicon/Intel/IntelSiliconPkg/Include/Protocol/Spi.h -- 2.28.0.windows.1 -=-=-=-=-=-= Groups.io Links: You receive all messages sent to this group. View/Reply Online (#83259): https://edk2.groups.io/g/devel/message/83259 Mute This Topic: https://groups.io/mt/86792794/1767664 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [nathaniel.l.desimone@intel.com] -=-=-=-=-=-= ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2021-12-02 0:19 UTC | newest] Thread overview: 7+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2021-11-03 14:44 [PATCH v1 0/3] IntelSiliconPkg: Remove v1 PCH SPI PPI and Protocol Michael Kubacki 2021-11-03 14:44 ` [PATCH v1 1/3] CometlakeOpenBoardPkg/PeiPolicyUpdateLib: Remove unneeded SPI header Michael Kubacki 2021-11-03 14:44 ` [PATCH v1 2/3] WhiskeylakeOpenBoardPkg/PeiPolicyUpdateLib: " Michael Kubacki 2021-11-03 14:44 ` [PATCH v1 3/3] IntelSiliconPkg: Remove SPI v1 PPI and Protocol definitions Michael Kubacki 2021-11-03 17:57 ` [edk2-devel] [PATCH v1 0/3] IntelSiliconPkg: Remove v1 PCH SPI PPI and Protocol Nate DeSimone 2021-11-03 18:22 ` Chaganty, Rangasai V 2021-12-02 0:19 ` [edk2-devel] " Nate DeSimone
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