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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Nov 2021 14:22:04.2651 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1171ceb6-5483-4bd7-1317-08d9a067a3f9 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DB5EUR03FT063.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB6PR0801MB1813 Content-Type: text/plain This patch adds missing documentation for few of the functions and fixes few formatting changes. Signed-off-by: Khasim Syed Mohammed --- .../Library/PlatformLib/PlatformLib.c | 46 +++++++++++++++++-- 1 file changed, 41 insertions(+), 5 deletions(-) diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c index f722080e56..c0effd37f3 100644 --- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c +++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c @@ -1,9 +1,9 @@ /** @file -* -* Copyright (c) 2018-2020, ARM Limited. All rights reserved. -* -* SPDX-License-Identifier: BSD-2-Clause-Patent -* + + Copyright (c) 2018-2021, ARM Limited. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + **/ #include @@ -17,6 +17,12 @@ STATIC ARM_CORE_INFO mCoreInfoTable[] = { { 0x1, 0x1 } // Cluster 1, Core 1 }; +/** + Return the current Boot Mode. + + @return The boot reason on the platform. + +**/ EFI_BOOT_MODE ArmPlatformGetBootMode ( VOID @@ -25,6 +31,16 @@ ArmPlatformGetBootMode ( return BOOT_WITH_FULL_CONFIGURATION; } +/** + Initialize controllers that must be setup in the normal world. + + This function is called by the ArmPlatformPkg/Pei or + ArmPlatformPkg/Pei/PlatformPeim in the PEI phase. + + @param[in] MpId Processor ID + @retval RETURN_SUCCESS + +**/ RETURN_STATUS ArmPlatformInitialize ( IN UINTN MpId @@ -33,6 +49,17 @@ ArmPlatformInitialize ( return RETURN_SUCCESS; } +/** + Populate the Platform core information. + + This function populates the ARM_MP_CORE_INFO_PPI with information + about the cores. + + @param[out] CoreCount Number of cores + @param[out] ArmCoreTable Table containing information about the cores + @retval EFI_SUCCESS + +**/ EFI_STATUS PrePeiCoreGetMpCoreInfo ( OUT UINTN *CoreCount, @@ -56,6 +83,15 @@ EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = { } }; +/** + Return the Platform specific PPIs + + This function exposes the N1Sdp Specific PPIs. + + @param[out] PpiListSize Size in Bytes of the Platform PPI List + @param[out] PpiList Platform PPI List + +**/ VOID ArmPlatformGetPlatformPpiList ( OUT UINTN *PpiListSize, -- 2.17.1