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[82.11.186.48]) by smtp.gmail.com with ESMTPSA id z8sm8996504wrh.54.2021.11.05.12.28.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Nov 2021 12:28:23 -0700 (PDT) Date: Fri, 5 Nov 2021 19:28:21 +0000 From: "Leif Lindholm" To: devel@edk2.groups.io, cheptsov@ispras.ru Cc: Jiewen Yao , Eric Dong , Michael Kinney , Jian J Wang , Jeff Fan , Mikhail Krichanov , Marvin =?utf-8?Q?H=C3=A4user?= Subject: Re: [edk2-devel] [PATCH] UefiCpuPkg: Fix CPU stack guard support by aligning GDT buffer Message-ID: <20211105192821.s2itdxh5t6azp4z6@leviathan> References: <20210920141347.25161-1-cheptsov@ispras.ru> MIME-Version: 1.0 In-Reply-To: <20210920141347.25161-1-cheptsov@ispras.ru> Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit UefiCpuPkg maintainers - please respond. Meanwhile, Vitaly, could you please provide a commit message? The BZ link is needed, but it's not a substitute. / Leif On Mon, Sep 20, 2021 at 17:13:47 +0300, Vitaly Cheptsov wrote: > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3639 > > > > Cc: Jiewen Yao > > Cc: Eric Dong > > Cc: Michael Kinney > > Cc: Jian J Wang > > Cc: Jeff Fan > > Cc: Mikhail Krichanov > > Cc: Marvin Häuser > > Signed-off-by: Vitaly Cheptsov > > --- > > .../Library/CpuExceptionHandlerLib/DxeException.c | 12 +++++++----- > > 1 file changed, 7 insertions(+), 5 deletions(-) > > > > diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c > > index fd59f09ecd..12874811e1 100644 > > --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c > > +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c > > @@ -22,7 +22,7 @@ EXCEPTION_HANDLER_DATA mExceptionHandlerData; > > > > UINT8 mNewStack[CPU_STACK_SWITCH_EXCEPTION_NUMBER * > > CPU_KNOWN_GOOD_STACK_SIZE]; > > -UINT8 mNewGdt[CPU_TSS_GDT_SIZE]; > > +UINT8 mNewGdt[CPU_TSS_GDT_SIZE + IA32_GDT_ALIGNMENT]; > > > > /** > > Common exception handler. > > @@ -238,6 +238,7 @@ InitializeCpuExceptionHandlersEx ( > > CPU_EXCEPTION_INIT_DATA EssData; > > IA32_DESCRIPTOR Idtr; > > IA32_DESCRIPTOR Gdtr; > > + UINT8 *Gdt; > > > > // > > // To avoid repeat initialization of default handlers, the caller should pass > > @@ -259,6 +260,7 @@ InitializeCpuExceptionHandlersEx ( > > if (PcdGetBool (PcdCpuStackGuard)) { > > if (InitData == NULL) { > > SetMem (mNewGdt, sizeof (mNewGdt), 0); > > + Gdt = ALIGN_POINTER (mNewGdt, IA32_GDT_ALIGNMENT); > > > > AsmReadIdtr (&Idtr); > > AsmReadGdtr (&Gdtr); > > @@ -270,11 +272,11 @@ InitializeCpuExceptionHandlersEx ( > > EssData.X64.StackSwitchExceptionNumber = CPU_STACK_SWITCH_EXCEPTION_NUMBER; > > EssData.X64.IdtTable = (VOID *)Idtr.Base; > > EssData.X64.IdtTableSize = Idtr.Limit + 1; > > - EssData.X64.GdtTable = mNewGdt; > > - EssData.X64.GdtTableSize = sizeof (mNewGdt); > > - EssData.X64.ExceptionTssDesc = mNewGdt + Gdtr.Limit + 1; > > + EssData.X64.GdtTable = Gdt; > > + EssData.X64.GdtTableSize = CPU_TSS_GDT_SIZE; > > + EssData.X64.ExceptionTssDesc = Gdt + Gdtr.Limit + 1; > > EssData.X64.ExceptionTssDescSize = CPU_TSS_DESC_SIZE; > > - EssData.X64.ExceptionTss = mNewGdt + Gdtr.Limit + 1 + CPU_TSS_DESC_SIZE; > > + EssData.X64.ExceptionTss = Gdt + Gdtr.Limit + 1 + CPU_TSS_DESC_SIZE; > > EssData.X64.ExceptionTssSize = CPU_TSS_SIZE; > > > > InitData = &EssData; > > -- > > 2.30.1 (Apple Git-130) > > > > > > > >