* [edk2-platforms][PATCH v1 1/2] Platform/RaspberryPi: Add support for PWM1 in ACPI @ 2021-11-05 20:34 Mario Bălănică 2021-11-05 20:34 ` [edk2-platforms][PATCH v1 2/2] Platform/RaspberryPi: Add analog audio device " Mario Bălănică 2021-11-15 22:59 ` [edk2-devel] [edk2-platforms][PATCH v1 1/2] Platform/RaspberryPi: Add support for PWM1 " Jeremy Linton 0 siblings, 2 replies; 4+ messages in thread From: Mario Bălănică @ 2021-11-05 20:34 UTC (permalink / raw) To: devel Cc: ardb+tianocore, leif, pete, samer.el-haj-mahmoud, jeremy.linton, sunny.wang Also fix PWM0 on the Raspberry Pi 4, but we can't expose both yet. Signed-off-by: Mario Bălănică <mariobalanica02@gmail.com> --- Platform/RaspberryPi/AcpiTables/AcpiTables.h | 10 ++- Platform/RaspberryPi/AcpiTables/Dsdt.asl | 34 ++++++--- Platform/RaspberryPi/AcpiTables/GpuDevs.asl | 78 ++++++++++++++++---- Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h | 13 ++++ Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Pwm.h | 26 +++---- 5 files changed, 122 insertions(+), 39 deletions(-) diff --git a/Platform/RaspberryPi/AcpiTables/AcpiTables.h b/Platform/RaspberryPi/AcpiTables/AcpiTables.h index 37e2a6bdf409..05da967803af 100644 --- a/Platform/RaspberryPi/AcpiTables/AcpiTables.h +++ b/Platform/RaspberryPi/AcpiTables/AcpiTables.h @@ -24,6 +24,11 @@ CreateDwordField (^BufName, ^MemName._BAS, VarName) \ Add (BCM2836_SOC_REGISTERS, Offset, VarName) +// Same as above, but without the base address. +#define MEMORY32SET(BufName, MemName, VarName, Address) \ + CreateDwordField (^BufName, ^MemName._BAS, VarName) \ + Store(Address, VarName) + #define EFI_ACPI_OEM_ID {'R','P','I','F','D','N'} #if (RPI_MODEL == 3) #define EFI_ACPI_OEM_TABLE_ID SIGNATURE_64 ('R','P','I','3',' ',' ',' ',' ') @@ -113,7 +118,7 @@ typedef struct //------------------------------------------------------------------------ #if (RPI_MODEL == 3) #define BCM2836_V3D_BUS_INTERRUPT 0x2A -#define BCM2836_DMA_INTERRUPT 0x3B +#define BCM2836_DMA5_INTERRUPT 0x35 #define BCM2836_SPI1_INTERRUPT 0x3D #define BCM2836_SPI2_INTERRUPT 0x3D #define BCM2836_HVS_INTERRUPT 0x41 @@ -138,7 +143,8 @@ typedef struct #define BCM2836_PL011_UART_INTERRUPT 0x59 #elif (RPI_MODEL == 4) #define BCM2836_V3D_BUS_INTERRUPT 0x2A -#define BCM2836_DMA_INTERRUPT 0x3B +#define BCM2836_DMA0_INTERRUPT 0x70 +#define BCM2836_DMA5_INTERRUPT 0x75 #define BCM2836_SPI1_INTERRUPT 0x7D #define BCM2836_SPI2_INTERRUPT 0x7D #define BCM2836_HVS_INTERRUPT 0x41 diff --git a/Platform/RaspberryPi/AcpiTables/Dsdt.asl b/Platform/RaspberryPi/AcpiTables/Dsdt.asl index b594d50bdf8e..fbc0049e6beb 100644 --- a/Platform/RaspberryPi/AcpiTables/Dsdt.asl +++ b/Platform/RaspberryPi/AcpiTables/Dsdt.asl @@ -139,15 +139,22 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 2, "RPIFDN", "RPI", 2) QWORDMEMORYBUF(14) QWORDMEMORYBUF(15) // QWORDMEMORYBUF(16) +#if (RPI_MODEL == 3) QWORDMEMORYBUF(17) QWORDMEMORYBUF(18) QWORDMEMORYBUF(19) QWORDMEMORYBUF(20) +#elif (RPI_MODEL == 4) QWORDMEMORYBUF(21) QWORDMEMORYBUF(22) QWORDMEMORYBUF(23) QWORDMEMORYBUF(24) +#endif QWORDMEMORYBUF(25) + QWORDMEMORYBUF(26) + QWORDMEMORYBUF(27) + QWORDMEMORYBUF(28) + QWORDMEMORYBUF(29) }) // USB @@ -181,19 +188,28 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 2, "RPIFDN", "RPI", 2) // QWORDMEMORYSET(16, BCM2836_SPI2_OFFSET, BCM2836_SPI2_LENGTH) // PWM - QWORDMEMORYSET(17, BCM2836_PWM_DMA_OFFSET, BCM2836_PWM_DMA_LENGTH) - QWORDMEMORYSET(18, BCM2836_PWM_CTRL_OFFSET, BCM2836_PWM_CTRL_LENGTH) - QWORDBUSMEMORYSET(19, BCM2836_PWM_BUS_BASE_ADDRESS, BCM2836_PWM_BUS_LENGTH) - QWORDBUSMEMORYSET(20, BCM2836_PWM_CTRL_UNCACHED_BASE_ADDRESS, BCM2836_PWM_CTRL_UNCACHED_LENGTH) - QWORDMEMORYSET(21, BCM2836_PWM_CLK_OFFSET, BCM2836_PWM_CLK_LENGTH) +#if (RPI_MODEL == 3) + QWORDMEMORYSET(17, BCM2836_DMA5_OFFSET, BCM2836_DMA_CHANNEL_LENGTH) + QWORDMEMORYSET(18, BCM2836_PWM0_CTRL_OFFSET, BCM2836_PWM_CTRL_LENGTH) + QWORDBUSMEMORYSET(19, BCM2836_PWM0_CTRL_BUS_BASE_ADDRESS, BCM2836_PWM_CTRL_LENGTH) + QWORDBUSMEMORYSET(20, BCM2836_DMA_DEVICE_OFFSET, 1) +#elif (RPI_MODEL == 4) + QWORDMEMORYSET(21, BCM2836_DMA0_OFFSET, BCM2836_DMA_CHANNEL_LENGTH) + QWORDMEMORYSET(22, BCM2836_PWM1_CTRL_OFFSET, BCM2836_PWM_CTRL_LENGTH) + QWORDBUSMEMORYSET(23, BCM2836_PWM1_CTRL_BUS_BASE_ADDRESS, BCM2836_PWM_CTRL_LENGTH) + QWORDBUSMEMORYSET(24, BCM2836_DMA_DEVICE_OFFSET, 1) +#endif + + // PWM Clock Manager Control + QWORDMEMORYSET(25, BCM2836_CM_PWM_CLOCK_CTRL_OFFSET, BCM2836_CM_PERIPHERAL_CLOCK_LENGTH) // UART - QWORDMEMORYSET(22, BCM2836_PL011_UART_OFFSET, BCM2836_PL011_UART_LENGTH) - QWORDMEMORYSET(23, BCM2836_MINI_UART_OFFSET, BCM2836_MINI_UART_LENGTH) + QWORDMEMORYSET(26, BCM2836_PL011_UART_OFFSET, BCM2836_PL011_UART_LENGTH) + QWORDMEMORYSET(27, BCM2836_MINI_UART_OFFSET, BCM2836_MINI_UART_LENGTH) // SDC - QWORDMEMORYSET(24, MMCHS1_OFFSET, MMCHS1_LENGTH) - QWORDMEMORYSET(25, SDHOST_OFFSET, SDHOST_LENGTH) + QWORDMEMORYSET(28, MMCHS1_OFFSET, MMCHS1_LENGTH) + QWORDMEMORYSET(29, SDHOST_OFFSET, SDHOST_LENGTH) Return (RBUF) } diff --git a/Platform/RaspberryPi/AcpiTables/GpuDevs.asl b/Platform/RaspberryPi/AcpiTables/GpuDevs.asl index 9750dc25c07c..b499620e089a 100644 --- a/Platform/RaspberryPi/AcpiTables/GpuDevs.asl +++ b/Platform/RaspberryPi/AcpiTables/GpuDevs.asl @@ -354,12 +354,20 @@ Device (SPI1) // } // } -// PWM Driver +// PWM devices +// +// TO-DOs (that also require changes in the Windows drivers): +// - drop bus addresses from _CRS and use _DMA instead +// - the Clock Manager should probably have its own device definition since it's +// shared between both controllers +// - expose both devices on the Raspberry Pi 4 +// +#if (RPI_MODEL == 3) Device (PWM0) { Name (_HID, "BCM2844") Name (_CID, "BCM2844") - Name (_UID, 0) + Name (_UID, 0x0) Name (_CCA, 0x0) Method (_STA) { @@ -367,30 +375,70 @@ Device (PWM0) } Name (RBUF, ResourceTemplate () { - // DMA channel 11 control - MEMORY32FIXED (ReadWrite, 0, BCM2836_PWM_DMA_LENGTH, RM01) + // DMA channel control + MEMORY32FIXED (ReadWrite, 0, BCM2836_DMA_CHANNEL_LENGTH, RM01) // PWM control MEMORY32FIXED (ReadWrite, 0, BCM2836_PWM_CTRL_LENGTH, RM02) // PWM control bus - MEMORY32FIXED (ReadWrite, BCM2836_PWM_BUS_BASE_ADDRESS, BCM2836_PWM_BUS_LENGTH, ) - // PWM control uncached - MEMORY32FIXED (ReadWrite, BCM2836_PWM_CTRL_UNCACHED_BASE_ADDRESS, BCM2836_PWM_CTRL_UNCACHED_LENGTH, ) + MEMORY32FIXED (ReadWrite, 0, BCM2836_PWM_CTRL_LENGTH, RM03) + // Uncached base address + MEMORY32FIXED (ReadWrite, BCM2836_DMA_DEVICE_OFFSET, 1, ) // PWM clock control - MEMORY32FIXED (ReadWrite, 0, BCM2836_PWM_CLK_LENGTH, RM03) - // Interrupt DMA channel 11 - Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { BCM2836_DMA_INTERRUPT } - // DMA channel 11, DREQ 5 for PWM - FixedDMA (5, 11, Width32Bit, ) + MEMORY32FIXED (ReadWrite, 0, BCM2836_CM_PERIPHERAL_CLOCK_LENGTH, RM04) + // DMA channel interrupt + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { BCM2836_DMA5_INTERRUPT } + // DREQ 5, DMA channel 5 + FixedDMA (5, 5, Width32Bit, ) }) Method (_CRS, 0x0, Serialized) { - MEMORY32SETBASE (RBUF, RM01, RB01, BCM2836_PWM_DMA_OFFSET) - MEMORY32SETBASE (RBUF, RM02, RB02, BCM2836_PWM_CTRL_OFFSET) - MEMORY32SETBASE (RBUF, RM03, RB03, BCM2836_PWM_CLK_OFFSET) + MEMORY32SETBASE (RBUF, RM01, RB01, BCM2836_DMA5_OFFSET) + MEMORY32SETBASE (RBUF, RM02, RB02, BCM2836_PWM0_CTRL_OFFSET) + MEMORY32SET (RBUF, RM03, RB03, BCM2836_PWM0_CTRL_BUS_BASE_ADDRESS) + MEMORY32SETBASE (RBUF, RM04, RB04, BCM2836_CM_PWM_CLOCK_CTRL_OFFSET) Return (^RBUF) } } +#elif (RPI_MODEL == 4) +Device (PWM1) +{ + Name (_HID, "BCM2844") + Name (_CID, "BCM2844") + Name (_UID, 0x1) + Name (_CCA, 0x0) + Method (_STA) + { + Return (0xf) + } + Name (RBUF, ResourceTemplate () + { + // DMA channel control + MEMORY32FIXED (ReadWrite, 0, BCM2836_DMA_CHANNEL_LENGTH, RM01) + // PWM control + MEMORY32FIXED (ReadWrite, 0, BCM2836_PWM_CTRL_LENGTH, RM02) + // PWM control bus + MEMORY32FIXED (ReadWrite, 0, BCM2836_PWM_CTRL_LENGTH, RM03) + // Uncached base address + MEMORY32FIXED (ReadWrite, BCM2836_DMA_DEVICE_OFFSET, 1, ) + // PWM clock control + MEMORY32FIXED (ReadWrite, 0, BCM2836_CM_PERIPHERAL_CLOCK_LENGTH, RM04) + // DMA channel interrupt + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { BCM2836_DMA0_INTERRUPT } + // DREQ 1, DMA channel 0 + FixedDMA (1, 0, Width32Bit, ) + }) + + Method (_CRS, 0x0, Serialized) + { + MEMORY32SETBASE (RBUF, RM01, RB01, BCM2836_DMA0_OFFSET) + MEMORY32SETBASE (RBUF, RM02, RB02, BCM2836_PWM1_CTRL_OFFSET) + MEMORY32SET (RBUF, RM03, RB03, BCM2836_PWM1_CTRL_BUS_BASE_ADDRESS) + MEMORY32SETBASE (RBUF, RM04, RB04, BCM2836_CM_PWM_CLOCK_CTRL_OFFSET) + Return (^RBUF) + } +} +#endif include ("Uart.asl") include ("Rhpx.asl") diff --git a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h index a930c64af379..126ee52c5ab2 100644 --- a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h +++ b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h @@ -17,6 +17,11 @@ #define BCM2836_SOC_REGISTERS (FixedPcdGet64 (PcdBcm283xRegistersAddress)) #define BCM2836_SOC_REGISTER_LENGTH 0x02000000 +/* + * VC memory view + */ +#define BCM2836_SOC_BUS_REGISTERS 0x7E000000 + /* * Offset between the CPU's view and the VC's view of system memory. */ @@ -53,6 +58,8 @@ #define BCM2836_CM_EMMC_CLOCK_CONTROL 0x01c0 #define BCM2836_CM_EMMC_CLOCK_DIVISOR 0x01c4 +#define BCM2836_CM_PERIPHERAL_CLOCK_LENGTH 0x00000008 + /* mailbox interface constants */ #define BCM2836_MBOX_OFFSET 0x0000b880 #define BCM2836_MBOX_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_MBOX_OFFSET) @@ -113,6 +120,12 @@ #define BCM2836_DMA0_OFFSET 0x00007000 #define BCM2836_DMA0_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_DMA0_OFFSET) +#define BCM2836_DMA1_OFFSET 0x00007100 +#define BCM2836_DMA1_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_DMA1_OFFSET) + +#define BCM2836_DMA5_OFFSET 0x00007500 +#define BCM2836_DMA5_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_DMA5_OFFSET) + #define BCM2836_DMA15_OFFSET 0x00E05000 #define BCM2836_DMA15_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_DMA15_OFFSET) diff --git a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Pwm.h b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Pwm.h index ce17724b7c21..8fd1cf66d062 100644 --- a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Pwm.h +++ b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Pwm.h @@ -13,22 +13,22 @@ /* PWM controller constants */ -#define BCM2836_PWM_DMA_OFFSET 0x00007B00 -#define BCM2836_PWM_DMA_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_PWM_DMA_OFFSET) -#define BCM2836_PWM_DMA_LENGTH 0x00000100 +// +// PWM0 +// +#define BCM2836_PWM0_CTRL_OFFSET 0x0020C000 +#define BCM2836_PWM0_CTRL_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_PWM0_CTRL_OFFSET) +#define BCM2836_PWM0_CTRL_BUS_BASE_ADDRESS (BCM2836_SOC_BUS_REGISTERS + BCM2836_PWM0_CTRL_OFFSET) -#define BCM2836_PWM_CLK_OFFSET 0x001010A0 -#define BCM2836_PWM_CLK_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_PWM_CLK_OFFSET) -#define BCM2836_PWM_CLK_LENGTH 0x00000008 +// +// PWM1 (only on BCM2711) +// +#define BCM2836_PWM1_CTRL_OFFSET 0x0020C800 +#define BCM2836_PWM1_CTRL_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_PWM1_CTRL_OFFSET) +#define BCM2836_PWM1_CTRL_BUS_BASE_ADDRESS (BCM2836_SOC_BUS_REGISTERS + BCM2836_PWM1_CTRL_OFFSET) -#define BCM2836_PWM_CTRL_OFFSET 0x0020C000 -#define BCM2836_PWM_CTRL_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_PWM_CTRL_OFFSET) #define BCM2836_PWM_CTRL_LENGTH 0x00000028 -#define BCM2836_PWM_BUS_BASE_ADDRESS 0x7E20C000 -#define BCM2836_PWM_BUS_LENGTH 0x00000028 - -#define BCM2836_PWM_CTRL_UNCACHED_BASE_ADDRESS 0xFF20C000 -#define BCM2836_PWM_CTRL_UNCACHED_LENGTH 0x00000028 +#define BCM2836_CM_PWM_CLOCK_CTRL_OFFSET (BCM2836_CM_OFFSET + BCM2836_CM_PWM_CLOCK_CONTROL) #endif /* __BCM2836_PWM_H__ */ -- 2.29.2.windows.2 ^ permalink raw reply related [flat|nested] 4+ messages in thread
* [edk2-platforms][PATCH v1 2/2] Platform/RaspberryPi: Add analog audio device in ACPI 2021-11-05 20:34 [edk2-platforms][PATCH v1 1/2] Platform/RaspberryPi: Add support for PWM1 in ACPI Mario Bălănică @ 2021-11-05 20:34 ` Mario Bălănică 2021-11-15 22:59 ` [edk2-devel] [edk2-platforms][PATCH v1 1/2] Platform/RaspberryPi: Add support for PWM1 " Jeremy Linton 1 sibling, 0 replies; 4+ messages in thread From: Mario Bălănică @ 2021-11-05 20:34 UTC (permalink / raw) To: devel Cc: ardb+tianocore, leif, pete, samer.el-haj-mahmoud, jeremy.linton, sunny.wang The Windows audio driver now binds to this device. Signed-off-by: Mario Bălănică <mariobalanica02@gmail.com> --- Platform/RaspberryPi/AcpiTables/GpuDevs.asl | 28 ++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/Platform/RaspberryPi/AcpiTables/GpuDevs.asl b/Platform/RaspberryPi/AcpiTables/GpuDevs.asl index b499620e089a..734547e5a806 100644 --- a/Platform/RaspberryPi/AcpiTables/GpuDevs.asl +++ b/Platform/RaspberryPi/AcpiTables/GpuDevs.asl @@ -440,6 +440,34 @@ Device (PWM1) } #endif +// Analog Audio (PWM-driven) +Device (AAUD) +{ + Name (_HID, "RPI73EA") +#if (RPI_MODEL == 3) + Name (_DEP, Package() { \_SB.GDV0.PWM0 }) +#elif (RPI_MODEL == 4) + Name (_DEP, Package() { \_SB.GDV0.PWM1 }) +#endif + Method (_STA) + { + Return (0xf) + } + Name (_DSD, Package () { + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package () { + Package () { "pwm-clock-source", "plld" }, +#if (RPI_MODEL == 3) + Package () { "pwm-clock-source-frequency", 500000000 }, + Package () { "pwm-clock-max-frequency", 125000000 }, // higher may work, but it's untested +#elif (RPI_MODEL == 4) + Package () { "pwm-clock-source-frequency", 750000000 }, + Package () { "pwm-clock-max-frequency", 375000000 }, +#endif + } + }) +} + include ("Uart.asl") include ("Rhpx.asl") include ("Sdhc.asl") -- 2.29.2.windows.2 ^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [edk2-devel] [edk2-platforms][PATCH v1 1/2] Platform/RaspberryPi: Add support for PWM1 in ACPI 2021-11-05 20:34 [edk2-platforms][PATCH v1 1/2] Platform/RaspberryPi: Add support for PWM1 in ACPI Mario Bălănică 2021-11-05 20:34 ` [edk2-platforms][PATCH v1 2/2] Platform/RaspberryPi: Add analog audio device " Mario Bălănică @ 2021-11-15 22:59 ` Jeremy Linton 2021-11-16 17:30 ` Mario Bălănică 1 sibling, 1 reply; 4+ messages in thread From: Jeremy Linton @ 2021-11-15 22:59 UTC (permalink / raw) To: devel, mariobalanica02 Cc: ardb+tianocore, leif, pete, samer.el-haj-mahmoud, sunny.wang Hi, First thanks for posting this! I ended up tweaking this a bit to get it to apply, because something in my email chain mangled it more than usual. Hopefully others aren't seeing this. Anyway see below.. On 11/5/21 15:34, Mario Bălănică via groups.io wrote: > Also fix PWM0 on the Raspberry Pi 4, but we can't expose both yet. Why is that? The rpi4 needs both PWM devices to output stereo right? So with this patch is still mono? > > Signed-off-by: Mario Bălănică <mariobalanica02@gmail.com> > --- > Platform/RaspberryPi/AcpiTables/AcpiTables.h | 10 ++- > Platform/RaspberryPi/AcpiTables/Dsdt.asl | 34 ++++++--- > Platform/RaspberryPi/AcpiTables/GpuDevs.asl | 78 ++++++++++++++++---- > Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h | 13 ++++ > Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Pwm.h | 26 +++---- > 5 files changed, 122 insertions(+), 39 deletions(-) > > diff --git a/Platform/RaspberryPi/AcpiTables/AcpiTables.h b/Platform/RaspberryPi/AcpiTables/AcpiTables.h > index 37e2a6bdf409..05da967803af 100644 > --- a/Platform/RaspberryPi/AcpiTables/AcpiTables.h > +++ b/Platform/RaspberryPi/AcpiTables/AcpiTables.h > @@ -24,6 +24,11 @@ > CreateDwordField (^BufName, ^MemName._BAS, VarName) \ > > Add (BCM2836_SOC_REGISTERS, Offset, VarName) > > > > +// Same as above, but without the base address. > > +#define MEMORY32SET(BufName, MemName, VarName, Address) \ > > + CreateDwordField (^BufName, ^MemName._BAS, VarName) \ > > + Store(Address, VarName) > > + > > #define EFI_ACPI_OEM_ID {'R','P','I','F','D','N'} > > #if (RPI_MODEL == 3) > > #define EFI_ACPI_OEM_TABLE_ID SIGNATURE_64 ('R','P','I','3',' ',' ',' ',' ') > > @@ -113,7 +118,7 @@ typedef struct > //------------------------------------------------------------------------ > > #if (RPI_MODEL == 3) > > #define BCM2836_V3D_BUS_INTERRUPT 0x2A > > -#define BCM2836_DMA_INTERRUPT 0x3B > > +#define BCM2836_DMA5_INTERRUPT 0x35 > > #define BCM2836_SPI1_INTERRUPT 0x3D > > #define BCM2836_SPI2_INTERRUPT 0x3D > > #define BCM2836_HVS_INTERRUPT 0x41 > > @@ -138,7 +143,8 @@ typedef struct > #define BCM2836_PL011_UART_INTERRUPT 0x59 > > #elif (RPI_MODEL == 4) > > #define BCM2836_V3D_BUS_INTERRUPT 0x2A > > -#define BCM2836_DMA_INTERRUPT 0x3B > > +#define BCM2836_DMA0_INTERRUPT 0x70 > > +#define BCM2836_DMA5_INTERRUPT 0x75 > > #define BCM2836_SPI1_INTERRUPT 0x7D > > #define BCM2836_SPI2_INTERRUPT 0x7D > > #define BCM2836_HVS_INTERRUPT 0x41 > > diff --git a/Platform/RaspberryPi/AcpiTables/Dsdt.asl b/Platform/RaspberryPi/AcpiTables/Dsdt.asl > index b594d50bdf8e..fbc0049e6beb 100644 > --- a/Platform/RaspberryPi/AcpiTables/Dsdt.asl > +++ b/Platform/RaspberryPi/AcpiTables/Dsdt.asl > @@ -139,15 +139,22 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 2, "RPIFDN", "RPI", 2) > QWORDMEMORYBUF(14) > > QWORDMEMORYBUF(15) > > // QWORDMEMORYBUF(16) > > +#if (RPI_MODEL == 3) > > QWORDMEMORYBUF(17) > > QWORDMEMORYBUF(18) > > QWORDMEMORYBUF(19) > > QWORDMEMORYBUF(20) > > +#elif (RPI_MODEL == 4) > > QWORDMEMORYBUF(21) > > QWORDMEMORYBUF(22) > > QWORDMEMORYBUF(23) > > QWORDMEMORYBUF(24) > > +#endif Assuming we are just aiming for mono on the rpi4, Do we need a separate set of buffers here for both the rpi3 and 4, can't the buffers be reused below? > > QWORDMEMORYBUF(25) > > + QWORDMEMORYBUF(26) > > + QWORDMEMORYBUF(27) > > + QWORDMEMORYBUF(28) > > + QWORDMEMORYBUF(29) > > }) > > > > // USB > > @@ -181,19 +188,28 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 2, "RPIFDN", "RPI", 2) > // QWORDMEMORYSET(16, BCM2836_SPI2_OFFSET, BCM2836_SPI2_LENGTH) > > > > // PWM > > - QWORDMEMORYSET(17, BCM2836_PWM_DMA_OFFSET, BCM2836_PWM_DMA_LENGTH) > > - QWORDMEMORYSET(18, BCM2836_PWM_CTRL_OFFSET, BCM2836_PWM_CTRL_LENGTH) > > - QWORDBUSMEMORYSET(19, BCM2836_PWM_BUS_BASE_ADDRESS, BCM2836_PWM_BUS_LENGTH) > > - QWORDBUSMEMORYSET(20, BCM2836_PWM_CTRL_UNCACHED_BASE_ADDRESS, BCM2836_PWM_CTRL_UNCACHED_LENGTH) > > - QWORDMEMORYSET(21, BCM2836_PWM_CLK_OFFSET, BCM2836_PWM_CLK_LENGTH) > > +#if (RPI_MODEL == 3) > > + QWORDMEMORYSET(17, BCM2836_DMA5_OFFSET, BCM2836_DMA_CHANNEL_LENGTH) > > + QWORDMEMORYSET(18, BCM2836_PWM0_CTRL_OFFSET, BCM2836_PWM_CTRL_LENGTH) > > + QWORDBUSMEMORYSET(19, BCM2836_PWM0_CTRL_BUS_BASE_ADDRESS, BCM2836_PWM_CTRL_LENGTH) > > + QWORDBUSMEMORYSET(20, BCM2836_DMA_DEVICE_OFFSET, 1) > > +#elif (RPI_MODEL == 4) > > + QWORDMEMORYSET(21, BCM2836_DMA0_OFFSET, BCM2836_DMA_CHANNEL_LENGTH) > > + QWORDMEMORYSET(22, BCM2836_PWM1_CTRL_OFFSET, BCM2836_PWM_CTRL_LENGTH) > > + QWORDBUSMEMORYSET(23, BCM2836_PWM1_CTRL_BUS_BASE_ADDRESS, BCM2836_PWM_CTRL_LENGTH) > > + QWORDBUSMEMORYSET(24, BCM2836_DMA_DEVICE_OFFSET, 1) > I would expect that the pi4 just reuses 17-30 here, or it uses both PWM channels. > +#endif > > + > > + // PWM Clock Manager Control > > + QWORDMEMORYSET(25, BCM2836_CM_PWM_CLOCK_CTRL_OFFSET, BCM2836_CM_PERIPHERAL_CLOCK_LENGTH) > > > > // UART > > - QWORDMEMORYSET(22, BCM2836_PL011_UART_OFFSET, BCM2836_PL011_UART_LENGTH) > > - QWORDMEMORYSET(23, BCM2836_MINI_UART_OFFSET, BCM2836_MINI_UART_LENGTH) > > + QWORDMEMORYSET(26, BCM2836_PL011_UART_OFFSET, BCM2836_PL011_UART_LENGTH) > > + QWORDMEMORYSET(27, BCM2836_MINI_UART_OFFSET, BCM2836_MINI_UART_LENGTH) > > > > // SDC > > - QWORDMEMORYSET(24, MMCHS1_OFFSET, MMCHS1_LENGTH) > > - QWORDMEMORYSET(25, SDHOST_OFFSET, SDHOST_LENGTH) > > + QWORDMEMORYSET(28, MMCHS1_OFFSET, MMCHS1_LENGTH) > > + QWORDMEMORYSET(29, SDHOST_OFFSET, SDHOST_LENGTH) > > > > Return (RBUF) > > } > > diff --git a/Platform/RaspberryPi/AcpiTables/GpuDevs.asl b/Platform/RaspberryPi/AcpiTables/GpuDevs.asl > index 9750dc25c07c..b499620e089a 100644 > --- a/Platform/RaspberryPi/AcpiTables/GpuDevs.asl > +++ b/Platform/RaspberryPi/AcpiTables/GpuDevs.asl > @@ -354,12 +354,20 @@ Device (SPI1) > // } > > // } > > > > -// PWM Driver > > +// PWM devices > > +// > > +// TO-DOs (that also require changes in the Windows drivers): > > +// - drop bus addresses from _CRS and use _DMA instead > > +// - the Clock Manager should probably have its own device definition since it's > > +// shared between both controllers And other things right? But we are sorta lucky here because there are two PWM related registers that aren't actually shared (although they are on the same 4k page as other devices registers). But, that said. I think there might be a better, but much more complex way to do this. So, instead of trying to _DSD the base freq/etc in the next patch we just define a _DSM() method which sets the audio/pwm rate. Maybe it takes the audio sample rate and depth, sets up the PWM divisor and returns the pwm rate. (along with errors about boundaries, or we assume the sample rate is 4 bits and bound the sample rate/etc). Also, now that i'm messing with the SPI flash which is muxed on these pins, maybe the right answer in ACPI mode is to leave the LDO disabled, and enable it in the PS0 call along with setting up the GPIO pins appropriately. Then the rutime service only has to worry about serializing access to the GPIO with the PS0/PS3 methods. Most of the rest of this code all looks fine. > > +// - expose both devices on the Raspberry Pi 4 > > +// > > +#if (RPI_MODEL == 3) > > Device (PWM0) > > { > > Name (_HID, "BCM2844") > > Name (_CID, "BCM2844") > > - Name (_UID, 0) > > + Name (_UID, 0x0) > > Name (_CCA, 0x0) > > Method (_STA) > > { > > @@ -367,30 +375,70 @@ Device (PWM0) > } > > Name (RBUF, ResourceTemplate () > > { > > - // DMA channel 11 control > > - MEMORY32FIXED (ReadWrite, 0, BCM2836_PWM_DMA_LENGTH, RM01) > > + // DMA channel control > > + MEMORY32FIXED (ReadWrite, 0, BCM2836_DMA_CHANNEL_LENGTH, RM01) > > // PWM control > > MEMORY32FIXED (ReadWrite, 0, BCM2836_PWM_CTRL_LENGTH, RM02) > > // PWM control bus > > - MEMORY32FIXED (ReadWrite, BCM2836_PWM_BUS_BASE_ADDRESS, BCM2836_PWM_BUS_LENGTH, ) > > - // PWM control uncached > > - MEMORY32FIXED (ReadWrite, BCM2836_PWM_CTRL_UNCACHED_BASE_ADDRESS, BCM2836_PWM_CTRL_UNCACHED_LENGTH, ) > > + MEMORY32FIXED (ReadWrite, 0, BCM2836_PWM_CTRL_LENGTH, RM03) > > + // Uncached base address > > + MEMORY32FIXED (ReadWrite, BCM2836_DMA_DEVICE_OFFSET, 1, ) > > // PWM clock control > > - MEMORY32FIXED (ReadWrite, 0, BCM2836_PWM_CLK_LENGTH, RM03) > > - // Interrupt DMA channel 11 > > - Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { BCM2836_DMA_INTERRUPT } > > - // DMA channel 11, DREQ 5 for PWM > > - FixedDMA (5, 11, Width32Bit, ) > > + MEMORY32FIXED (ReadWrite, 0, BCM2836_CM_PERIPHERAL_CLOCK_LENGTH, RM04) > > + // DMA channel interrupt > > + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { BCM2836_DMA5_INTERRUPT } > > + // DREQ 5, DMA channel 5 > > + FixedDMA (5, 5, Width32Bit, ) > > }) > > > > Method (_CRS, 0x0, Serialized) > > { > > - MEMORY32SETBASE (RBUF, RM01, RB01, BCM2836_PWM_DMA_OFFSET) > > - MEMORY32SETBASE (RBUF, RM02, RB02, BCM2836_PWM_CTRL_OFFSET) > > - MEMORY32SETBASE (RBUF, RM03, RB03, BCM2836_PWM_CLK_OFFSET) > > + MEMORY32SETBASE (RBUF, RM01, RB01, BCM2836_DMA5_OFFSET) > > + MEMORY32SETBASE (RBUF, RM02, RB02, BCM2836_PWM0_CTRL_OFFSET) > > + MEMORY32SET (RBUF, RM03, RB03, BCM2836_PWM0_CTRL_BUS_BASE_ADDRESS) > > + MEMORY32SETBASE (RBUF, RM04, RB04, BCM2836_CM_PWM_CLOCK_CTRL_OFFSET) > > Return (^RBUF) > > } > > } > > +#elif (RPI_MODEL == 4) > > +Device (PWM1) > > +{ > > + Name (_HID, "BCM2844") > > + Name (_CID, "BCM2844") > > + Name (_UID, 0x1) > > + Name (_CCA, 0x0) > > + Method (_STA) > > + { > > + Return (0xf) > > + } > > + Name (RBUF, ResourceTemplate () > > + { > > + // DMA channel control > > + MEMORY32FIXED (ReadWrite, 0, BCM2836_DMA_CHANNEL_LENGTH, RM01) > > + // PWM control > > + MEMORY32FIXED (ReadWrite, 0, BCM2836_PWM_CTRL_LENGTH, RM02) > > + // PWM control bus > > + MEMORY32FIXED (ReadWrite, 0, BCM2836_PWM_CTRL_LENGTH, RM03) > > + // Uncached base address > > + MEMORY32FIXED (ReadWrite, BCM2836_DMA_DEVICE_OFFSET, 1, ) > > + // PWM clock control > > + MEMORY32FIXED (ReadWrite, 0, BCM2836_CM_PERIPHERAL_CLOCK_LENGTH, RM04) > > + // DMA channel interrupt > > + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { BCM2836_DMA0_INTERRUPT } > > + // DREQ 1, DMA channel 0 > > + FixedDMA (1, 0, Width32Bit, ) > > + }) > > + > > + Method (_CRS, 0x0, Serialized) > > + { > > + MEMORY32SETBASE (RBUF, RM01, RB01, BCM2836_DMA0_OFFSET) > > + MEMORY32SETBASE (RBUF, RM02, RB02, BCM2836_PWM1_CTRL_OFFSET) > > + MEMORY32SET (RBUF, RM03, RB03, BCM2836_PWM1_CTRL_BUS_BASE_ADDRESS) > > + MEMORY32SETBASE (RBUF, RM04, RB04, BCM2836_CM_PWM_CLOCK_CTRL_OFFSET) > > + Return (^RBUF) > > + } > > +} > > +#endif > > > > include ("Uart.asl") > > include ("Rhpx.asl") > > diff --git a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h > index a930c64af379..126ee52c5ab2 100644 > --- a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h > +++ b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h > @@ -17,6 +17,11 @@ > #define BCM2836_SOC_REGISTERS (FixedPcdGet64 (PcdBcm283xRegistersAddress)) > > #define BCM2836_SOC_REGISTER_LENGTH 0x02000000 > > > > +/* > > + * VC memory view > > + */ > > +#define BCM2836_SOC_BUS_REGISTERS 0x7E000000 > > + > > /* > > * Offset between the CPU's view and the VC's view of system memory. > > */ > > @@ -53,6 +58,8 @@ > #define BCM2836_CM_EMMC_CLOCK_CONTROL 0x01c0 > > #define BCM2836_CM_EMMC_CLOCK_DIVISOR 0x01c4 > > > > +#define BCM2836_CM_PERIPHERAL_CLOCK_LENGTH 0x00000008 > > + > > /* mailbox interface constants */ > > #define BCM2836_MBOX_OFFSET 0x0000b880 > > #define BCM2836_MBOX_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_MBOX_OFFSET) > > @@ -113,6 +120,12 @@ > #define BCM2836_DMA0_OFFSET 0x00007000 > > #define BCM2836_DMA0_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_DMA0_OFFSET) > > > > +#define BCM2836_DMA1_OFFSET 0x00007100 > > +#define BCM2836_DMA1_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_DMA1_OFFSET) > > + > > +#define BCM2836_DMA5_OFFSET 0x00007500 > > +#define BCM2836_DMA5_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_DMA5_OFFSET) > > + > > #define BCM2836_DMA15_OFFSET 0x00E05000 > > #define BCM2836_DMA15_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_DMA15_OFFSET) > > > > diff --git a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Pwm.h b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Pwm.h > index ce17724b7c21..8fd1cf66d062 100644 > --- a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Pwm.h > +++ b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Pwm.h > @@ -13,22 +13,22 @@ > > > /* PWM controller constants */ > > > > -#define BCM2836_PWM_DMA_OFFSET 0x00007B00 > > -#define BCM2836_PWM_DMA_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_PWM_DMA_OFFSET) > > -#define BCM2836_PWM_DMA_LENGTH 0x00000100 > > +// > > +// PWM0 > > +// > > +#define BCM2836_PWM0_CTRL_OFFSET 0x0020C000 > > +#define BCM2836_PWM0_CTRL_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_PWM0_CTRL_OFFSET) > > +#define BCM2836_PWM0_CTRL_BUS_BASE_ADDRESS (BCM2836_SOC_BUS_REGISTERS + BCM2836_PWM0_CTRL_OFFSET) > > > > -#define BCM2836_PWM_CLK_OFFSET 0x001010A0 > > -#define BCM2836_PWM_CLK_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_PWM_CLK_OFFSET) > > -#define BCM2836_PWM_CLK_LENGTH 0x00000008 > > +// > > +// PWM1 (only on BCM2711) > > +// > > +#define BCM2836_PWM1_CTRL_OFFSET 0x0020C800 > > +#define BCM2836_PWM1_CTRL_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_PWM1_CTRL_OFFSET) > > +#define BCM2836_PWM1_CTRL_BUS_BASE_ADDRESS (BCM2836_SOC_BUS_REGISTERS + BCM2836_PWM1_CTRL_OFFSET) > > > > -#define BCM2836_PWM_CTRL_OFFSET 0x0020C000 > > -#define BCM2836_PWM_CTRL_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_PWM_CTRL_OFFSET) > > #define BCM2836_PWM_CTRL_LENGTH 0x00000028 > > > > -#define BCM2836_PWM_BUS_BASE_ADDRESS 0x7E20C000 > > -#define BCM2836_PWM_BUS_LENGTH 0x00000028 > > - > > -#define BCM2836_PWM_CTRL_UNCACHED_BASE_ADDRESS 0xFF20C000 > > -#define BCM2836_PWM_CTRL_UNCACHED_LENGTH 0x00000028 > > +#define BCM2836_CM_PWM_CLOCK_CTRL_OFFSET (BCM2836_CM_OFFSET + BCM2836_CM_PWM_CLOCK_CONTROL) > > > > #endif /* __BCM2836_PWM_H__ */ > ^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [edk2-devel] [edk2-platforms][PATCH v1 1/2] Platform/RaspberryPi: Add support for PWM1 in ACPI 2021-11-15 22:59 ` [edk2-devel] [edk2-platforms][PATCH v1 1/2] Platform/RaspberryPi: Add support for PWM1 " Jeremy Linton @ 2021-11-16 17:30 ` Mario Bălănică 0 siblings, 0 replies; 4+ messages in thread From: Mario Bălănică @ 2021-11-16 17:30 UTC (permalink / raw) To: Jeremy Linton Cc: devel, Ard Biesheuvel, Leif Lindholm, Pete Batard, Samer El-Haj-Mahmoud, Sunny Wang Hi Jeremy, > On 11/5/21 15:34, Mario Bălănică via groups.io wrote: >> >> Also fix PWM0 on the Raspberry Pi 4, but we can't expose both yet. > > Why is that? The rpi4 needs both PWM devices to output stereo right? So > with this patch is still mono? Each PWM controller has two channels, so only one controller is needed for stereo output. > Assuming we are just aiming for mono on the rpi4, Do we need a separate > set of buffers here for both the rpi3 and 4, can't the buffers be reused > below? > I would expect that the pi4 just reuses 17-30 here, or it uses both PWM > channels. Right, they could be reused, but the plan is to expose both controllers on RPi 4 in the future. We can't do it right now because of some conflicts in the Windows drivers. The Clock Manager is shared, which may cause a race condition if both devices try to change the PWM clock. > But, that said. I think there might be a better, but much more complex > way to do this. > So, instead of trying to _DSD the base freq/etc in the next patch we > just define a _DSM() method which sets the audio/pwm rate. Maybe it > takes the audio sample rate and depth, sets up the PWM divisor and > returns the pwm rate. (along with errors about boundaries, or we assume > the sample rate is 4 bits and bound the sample rate/etc). Yeah, a _DSM would be better. This way, I can also get rid of the clock handling code in the PWM driver. But then only the audio driver would be able to set the clock divisor. I guess it's not really an issue, as long as we set an initial divisor so that the PWM peripherals can be used without the audio driver being installed. Even though I don't really like having those clock values in the audio _DSD, I think it's fine until we decide on / implement a better solution. --Mario ^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2021-11-16 17:30 UTC | newest] Thread overview: 4+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2021-11-05 20:34 [edk2-platforms][PATCH v1 1/2] Platform/RaspberryPi: Add support for PWM1 in ACPI Mario Bălănică 2021-11-05 20:34 ` [edk2-platforms][PATCH v1 2/2] Platform/RaspberryPi: Add analog audio device " Mario Bălănică 2021-11-15 22:59 ` [edk2-devel] [edk2-platforms][PATCH v1 1/2] Platform/RaspberryPi: Add support for PWM1 " Jeremy Linton 2021-11-16 17:30 ` Mario Bălănică
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