From: "Gerd Hoffmann" <kraxel@redhat.com>
To: Lange Tang <lange_tang@163.com>
Cc: "devel@edk2.groups.io" <devel@edk2.groups.io>
Subject: Re: [edk2-devel] The arm virtual machine displays problems in QXL during the UEFI phase
Date: Mon, 8 Nov 2021 12:49:06 +0100 [thread overview]
Message-ID: <20211108114906.2vx22etj5enfhre3@sirius.home.kraxel.org> (raw)
In-Reply-To: <78568eaf.8a9d.17cfee2d4fd.Coremail.lange_tang@163.com>
Hi,
> From the above point of view, your speculation is right. excellent!
> In this way, if a QXL device wants to work on ARM, the io window of the bridge it is mounted on must be allocated as 00000000-00000fff [size=4K].
That doesn't solve the cache attribute issues though ...
> In my work, by modifying the qemu code, the io window of the bridge
> mounted with the qxl device is fixed to 00000000-00000fff to solve
> this problem. what do you think?
It's not qemu but tianocore who assigns bridge windows, should be
in pci scan order, i.e. lowest slot.func goes first and gets the
0000-0fff range.
take care,
Gerd
prev parent reply other threads:[~2021-11-08 11:49 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-02 12:55 The arm virtual machine displays problems in QXL during the UEFI phase Lange Tang
2021-11-02 13:35 ` [edk2-devel] " Gerd Hoffmann
2021-11-03 1:46 ` Lange Tang
2021-11-03 6:03 ` Gerd Hoffmann
2021-11-08 9:30 ` Lange Tang
2021-11-08 11:49 ` Gerd Hoffmann [this message]
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