From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from NAM11-DM6-obe.outbound.protection.outlook.com (NAM11-DM6-obe.outbound.protection.outlook.com [40.107.223.81]) by mx.groups.io with SMTP id smtpd.web10.2407.1636582521620143455 for ; Wed, 10 Nov 2021 14:15:21 -0800 Authentication-Results: mx.groups.io; dkim=fail reason="body hash did not verify" header.i=@amd.com header.s=selector1 header.b=LUkIvtfj; spf=permerror, err=parse error for token &{10 18 %{i}._ip.%{h}._ehlo.%{d}._spf.vali.email}: invalid domain name (domain: amd.com, ip: 40.107.223.81, mailfrom: brijesh.singh@amd.com) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=fSPL8yUCm9QOJVATTm/Qz0X8RMutchExtr7s1dij5nlZHLgRpcSY5RD37trq5mpZGnP9P6qmtY2ODL2Utf9tBJ0NzNaVpsix4jqDthcgtGgjyCZRJpgTObw8kWTNSJDs9EP9uLttFo4j6PyHvicr4JaHoioZ78D5kWGtCkwRMYRB75QuT3qmwrq9A9VsHvrBdTbTbSmcjebpCjN0cv71FbD8XHXfRTRdYgm4XflfXB/UMoSXWk5/AoTYHyMgIr1E7XkY5UzzXdp3IJrWXauKO7h/AN5SplcdN6yNj7k9R3xgKrQEMMGmgBVYtQMh/GrzvmHVfblSONoQDk6lqtBj0g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=19UpFsAojMNItsCb+HCNBgIG05cw1PHsY58EmIKvSfI=; b=BvE075eOXp4WjVbrnxNOaf2JVjm+KegTwqcEdCgdbwHnvBjGCKWth32kDQPPOx+u8FCn1a8rNaIj6qoieSXJdj3kE+UKnY41VuOCgSxlR93qcRsKOO/UGQEljvESJkRS2D7O1hYPlGDXIFSexmgTXuQH+fikQ/Wkod4hb1dCkH2FvXQCm1yKzZ0Y7Bm7wqcZMSh3ep59REyfrZ33z8bs5t5E4SA2qwb2tfDS1wqZeD+41JutC+tM+LOQapv1vRLD9jGK57H2AGKdMi7CzS4YjHqSX0mATlilrs9bRzssArftjft+0yOsi9thF81ojJDJ6CzqQEC/wOrOi41Ut/Oetw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=edk2.groups.io smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=19UpFsAojMNItsCb+HCNBgIG05cw1PHsY58EmIKvSfI=; b=LUkIvtfjgLx9x67azCiYAEJ4310JUk8I8O5Qqlnh0Wbhb9vYAdP7uyhVhBZB2Y/eOW7Y2IlUMfwcwS7WvZteaZ6dKG8omWvviQiCDEJ3RihazlWZTTv8wzmqlCU/8VP8CEsI5DRqq5ZLkDPjqPcOv6wzfE7oLDhlLjsS6vRcx4U= Received: from BN0PR03CA0048.namprd03.prod.outlook.com (2603:10b6:408:e7::23) by CH2PR12MB5531.namprd12.prod.outlook.com (2603:10b6:610:34::10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4669.11; Wed, 10 Nov 2021 22:15:17 +0000 Received: from BN8NAM11FT058.eop-nam11.prod.protection.outlook.com (2603:10b6:408:e7:cafe::a9) by BN0PR03CA0048.outlook.office365.com (2603:10b6:408:e7::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4669.13 via Frontend Transport; Wed, 10 Nov 2021 22:15:17 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; edk2.groups.io; dkim=none (message not signed) header.d=none;edk2.groups.io; dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; Received: from SATLEXMB04.amd.com (165.204.84.17) by BN8NAM11FT058.mail.protection.outlook.com (10.13.177.58) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.4690.15 via Frontend Transport; Wed, 10 Nov 2021 22:15:17 +0000 Received: from sbrijesh-desktop.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Wed, 10 Nov 2021 16:15:16 -0600 From: "Brijesh Singh" To: CC: James Bottomley , Min Xu , "Jiewen Yao" , Tom Lendacky , "Jordan Justen" , Ard Biesheuvel , Erdem Aktas , "Michael Roth" , Gerd Hoffmann , "Michael D Kinney" , Liming Gao , Zhiguang Liu , Ray Ni , Rahul Kumar , Eric Dong , Michael Roth , Jiewen Yao , Brijesh Singh Subject: [PATCH v12 08/32] OvmfPkg/ResetVector: use SEV-SNP-validated CPUID values Date: Wed, 10 Nov 2021 16:14:33 -0600 Message-ID: <20211110221457.2397234-9-brijesh.singh@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211110221457.2397234-1-brijesh.singh@amd.com> References: <20211110221457.2397234-1-brijesh.singh@amd.com> MIME-Version: 1.0 Return-Path: brijesh.singh@amd.com X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 32d6b62f-1d46-428f-80a6-08d9a49793ad X-MS-TrafficTypeDiagnostic: CH2PR12MB5531: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:8273; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: zx3ocz5NzfUITfxDMadvClbYgb8GvtJ4PUFCowbk5CBSDfryOJXttxjA/dgFbliUcOm9xrwn5txXaWYIgUGhTh8aaKw+xY6ouwMGZ/RlgU8R55YwmKx7fuuOwek6s6nR3IA5A10+cc2AbSjcuauy7AkKHhgGPWS7WaJXSQDBD0EwvUEYvTBkE7f0qFkCfAR0/aQ05idVJQmcjepheRomvM0JyOW9E3uoKzhm4nCdM5/w+McmDn41OerEoyw2nD3ZBL3MKTE4pmc8Ru5JKVN0Onmb1ellAoQzjPI1vBf5hDvK4vZixKh4dfGPKdZ9xCJjptK/4CzyOP99aRebgZ2c7Avdbn4/pSHMKPEojIAs9xD6KwmS4It1VYkA/opSwun95wXXGzKvn1PXQnHJsDE22irBFcshMomX4qvaH7mNWEfHUCv2gPSAcGYs+C7LZlhrLPwdURPg89rDtMEEuBYlOCiPSqRLog2HAxUnY4blasPlVM88xaKwTMHvXDG95vKZuPno6KSIPZcmtEjHwGMPjXeAiUYdDzIEUYAS4pos7BTYU2fLTuEZfrppAs122Ohp6eiBG64SvoTXlOkQ7I82K2CwJJ7BVMU1xBJRwhu4kQgTq1a8MMsujGOV5sLLpoy/CTcmyaWKb/gUs1GNRJRZagru15U8w41uXCHPm2tTafL5Nilz9RFeFagLqp2Mqfbj2chvjnbJrsOgbeGpY8YpCPyQUE4jnHF8oCCdAuE8c8U= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(4636009)(36840700001)(46966006)(508600001)(15650500001)(2906002)(70206006)(7696005)(356005)(4326008)(8936002)(8676002)(5660300002)(54906003)(70586007)(36860700001)(36756003)(6666004)(47076005)(1076003)(82310400003)(26005)(44832011)(186003)(16526019)(7416002)(336012)(83380400001)(19627235002)(86362001)(81166007)(2616005)(426003)(316002)(6916009)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Nov 2021 22:15:17.3834 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 32d6b62f-1d46-428f-80a6-08d9a49793ad X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT058.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB5531 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain From: Michael Roth CPUID instructions are issued during early boot to do things like probe for SEV support. Currently these are handled by a minimal #VC handler that uses the MSR-based GHCB protocol to fetch the CPUID values from the hypervisor. When SEV-SNP is enabled, use the firmware-validated CPUID values from the CPUID page instead [1]. [1]: SEV SNP Firmware ABI Specification, Rev. 0.8, 8.13.2.6 Cc: Michael Roth Cc: James Bottomley Cc: Min Xu Cc: Jiewen Yao Cc: Tom Lendacky Cc: Jordan Justen Cc: Ard Biesheuvel Cc: Erdem Aktas Cc: Gerd Hoffmann Acked-by: Jiewen Yao Acked-by: Gerd Hoffmann Signed-off-by: Michael Roth Signed-off-by: Brijesh Singh --- OvmfPkg/ResetVector/Ia32/AmdSev.asm | 80 +++++++++++++++++++++++++++-- 1 file changed, 75 insertions(+), 5 deletions(-) diff --git a/OvmfPkg/ResetVector/Ia32/AmdSev.asm b/OvmfPkg/ResetVector/Ia32= /AmdSev.asm index 48d9178168b0..1f827da3b929 100644 --- a/OvmfPkg/ResetVector/Ia32/AmdSev.asm +++ b/OvmfPkg/ResetVector/Ia32/AmdSev.asm @@ -34,6 +34,18 @@ BITS 32 %define GHCB_CPUID_REGISTER_SHIFT 30 %define CPUID_INSN_LEN 2 =20 +; #VC handler offsets/sizes for accessing SNP CPUID page +; +%define SNP_CPUID_ENTRY_SZ 48 +%define SNP_CPUID_COUNT 0 +%define SNP_CPUID_ENTRY 16 +%define SNP_CPUID_ENTRY_EAX_IN 0 +%define SNP_CPUID_ENTRY_ECX_IN 4 +%define SNP_CPUID_ENTRY_EAX 24 +%define SNP_CPUID_ENTRY_EBX 28 +%define SNP_CPUID_ENTRY_ECX 32 +%define SNP_CPUID_ENTRY_EDX 36 + =20 %define SEV_GHCB_MSR 0xc0010130 %define SEV_STATUS_MSR 0xc0010131 @@ -335,11 +347,61 @@ SevEsIdtNotCpuid: TerminateVmgExit TERM_VC_NOT_CPUID iret =20 - ; - ; Total stack usage for the #VC handler is 44 bytes: - ; - 12 bytes for the exception IRET (after popping error code) - ; - 32 bytes for the local variables. - ; +; Use the SNP CPUID page to handle the cpuid lookup +; +; Modified: EAX, EBX, ECX, EDX +; +; Relies on the stack setup/usage in #VC handler: +; +; On entry, +; [esp + VC_CPUID_FUNCTION] contains EAX input to cpuid instruction +; +; On return, stores corresponding results of CPUID lookup in: +; [esp + VC_CPUID_RESULT_EAX] +; [esp + VC_CPUID_RESULT_EBX] +; [esp + VC_CPUID_RESULT_ECX] +; [esp + VC_CPUID_RESULT_EDX] +; +SnpCpuidLookup: + mov eax, [esp + VC_CPUID_FUNCTION] + mov ebx, [CPUID_BASE + SNP_CPUID_COUNT] + mov ecx, CPUID_BASE + SNP_CPUID_ENTRY + ; Zero these out now so we can simply return if lookup fails + mov dword[esp + VC_CPUID_RESULT_EAX], 0 + mov dword[esp + VC_CPUID_RESULT_EBX], 0 + mov dword[esp + VC_CPUID_RESULT_ECX], 0 + mov dword[esp + VC_CPUID_RESULT_EDX], 0 + +SnpCpuidCheckEntry: + cmp ebx, 0 + je VmmDoneSnpCpuid + cmp dword[ecx + SNP_CPUID_ENTRY_EAX_IN], eax + jne SnpCpuidCheckEntryNext + ; As with SEV-ES handler we assume requested CPUID sub-leaf/index is 0 + cmp dword[ecx + SNP_CPUID_ENTRY_ECX_IN], 0 + je SnpCpuidEntryFound + +SnpCpuidCheckEntryNext: + dec ebx + add ecx, SNP_CPUID_ENTRY_SZ + jmp SnpCpuidCheckEntry + +SnpCpuidEntryFound: + mov eax, [ecx + SNP_CPUID_ENTRY_EAX] + mov [esp + VC_CPUID_RESULT_EAX], eax + mov eax, [ecx + SNP_CPUID_ENTRY_EBX] + mov [esp + VC_CPUID_RESULT_EBX], eax + mov eax, [ecx + SNP_CPUID_ENTRY_EDX] + mov [esp + VC_CPUID_RESULT_ECX], eax + mov eax, [ecx + SNP_CPUID_ENTRY_ECX] + mov [esp + VC_CPUID_RESULT_EDX], eax + jmp VmmDoneSnpCpuid + +; +; Total stack usage for the #VC handler is 44 bytes: +; - 12 bytes for the exception IRET (after popping error code) +; - 32 bytes for the local variables. +; SevEsIdtVmmComm: ; ; If we're here, then we are an SEV-ES guest and this @@ -367,6 +429,13 @@ SevEsIdtVmmComm: ; Save the CPUID function being requested mov [esp + VC_CPUID_FUNCTION], eax =20 + ; If SEV-SNP is enabled, use the CPUID page to handle the CPUID + ; instruction. + mov ecx, SEV_STATUS_MSR + rdmsr + bt eax, 2 + jc SnpCpuidLookup + ; The GHCB CPUID protocol uses the following mapping to request ; a specific register: ; 0 =3D> EAX, 1 =3D> EBX, 2 =3D> ECX, 3 =3D> EDX @@ -424,6 +493,7 @@ VmmDone: mov ecx, SEV_GHCB_MSR wrmsr =20 +VmmDoneSnpCpuid: mov eax, [esp + VC_CPUID_RESULT_EAX] mov ebx, [esp + VC_CPUID_RESULT_EBX] mov ecx, [esp + VC_CPUID_RESULT_ECX] --=20 2.25.1