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Cc: Thang Nguyen Cc: Chuong Tran Cc: Phong Vo Cc: Leif Lindholm Cc: Michael D Kinney Cc: Ard Biesheuvel Cc: Nate DeSimone Signed-off-by: Nhi Pham Reviewed-by: Leif Lindholm --- Platform/Ampere/JadePkg/Jade.dsc | 5 + Platform/Ampere/JadePkg/Jade.fdf | 1 + Platform/Ampere/JadePkg/Drivers/PciPlatformDxe/PciPlatformDxe.inf | 41 ++= ++ Platform/Ampere/JadePkg/Drivers/PciPlatformDxe/PciPlatformDxe.c | 258 ++= ++++++++++++++++++ 4 files changed, 305 insertions(+) diff --git a/Platform/Ampere/JadePkg/Jade.dsc b/Platform/Ampere/JadePkg/Jad= e.dsc index 9315c1c71cc7..ffba757a6130 100644 --- a/Platform/Ampere/JadePkg/Jade.dsc +++ b/Platform/Ampere/JadePkg/Jade.dsc @@ -129,3 +129,8 @@ [Components.common] Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf Silicon/Ampere/AmpereAltraPkg/AcpiCommonTables/AcpiCommonTables.inf Platform/Ampere/JadePkg/AcpiTables/AcpiTables.inf + + # + # PCIe + # + Platform/Ampere/JadePkg/Drivers/PciPlatformDxe/PciPlatformDxe.inf diff --git a/Platform/Ampere/JadePkg/Jade.fdf b/Platform/Ampere/JadePkg/Jad= e.fdf index 6de01dfe36d5..99c361174974 100644 --- a/Platform/Ampere/JadePkg/Jade.fdf +++ b/Platform/Ampere/JadePkg/Jade.fdf @@ -295,6 +295,7 @@ [FV.FvMain] # INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf + INF Platform/Ampere/JadePkg/Drivers/PciPlatformDxe/PciPlatformDxe.inf =20 # # UEFI application (Shell Embedded Boot Loader) diff --git a/Platform/Ampere/JadePkg/Drivers/PciPlatformDxe/PciPlatformDxe.= inf b/Platform/Ampere/JadePkg/Drivers/PciPlatformDxe/PciPlatformDxe.inf new file mode 100644 index 000000000000..ddf6eeb759eb --- /dev/null +++ b/Platform/Ampere/JadePkg/Drivers/PciPlatformDxe/PciPlatformDxe.inf @@ -0,0 +1,41 @@ +## @file +# +# Copyright (c) 2021, Ampere Computing LLC. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[defines] + INF_VERSION =3D 0x0001001B + BASE_NAME =3D PciPlatformDxe + FILE_GUID =3D 73276F3D-DCBC-49B2-9890-7564F917501D + MODULE_TYPE =3D DXE_DRIVER + VERSION_STRING =3D 1.0 + ENTRY_POINT =3D PciPlatformDriverEntry + +[Sources] + PciPlatformDxe.c + +[Packages] + MdePkg/MdePkg.dec + Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dec + +[LibraryClasses] + Ac01PcieLib + DebugLib + HobLib + TimerLib + UefiBootServicesTableLib + UefiDriverEntryPoint + +[Protocols] + gEfiDevicePathProtocolGuid + gEfiPciHostBridgeResourceAllocationProtocolGuid + gEfiPciPlatformProtocolGuid + +[Guids] + gRootComplexInfoHobGuid + +[Depex] + TRUE diff --git a/Platform/Ampere/JadePkg/Drivers/PciPlatformDxe/PciPlatformDxe.= c b/Platform/Ampere/JadePkg/Drivers/PciPlatformDxe/PciPlatformDxe.c new file mode 100644 index 000000000000..865dfb891a24 --- /dev/null +++ b/Platform/Ampere/JadePkg/Drivers/PciPlatformDxe/PciPlatformDxe.c @@ -0,0 +1,258 @@ +/** @file + + Copyright (c) 2021, Ampere Computing LLC. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#pragma pack(1) +typedef struct { + ACPI_HID_DEVICE_PATH AcpiDevicePath; + EFI_DEVICE_PATH_PROTOCOL EndDevicePath; +} EFI_PCI_ROOT_BRIDGE_DEVICE_PATH; +#pragma pack () + +/** + Callback funciton for EndEnumeration notification from PCI stack. + + @param[in] RootBridgeIndex Index to identify of PCIE Root bridge. + @param[in] Phase The phase of enumeration as informed f= rom PCI stack. +**/ +VOID +NotifyPhaseCallBack ( + IN UINTN RootBridgeIndex, + IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase + ) +{ + AC01_ROOT_COMPLEX *RootComplexList; + VOID *Hob; + + Hob =3D GetFirstGuidHob (&gRootComplexInfoHobGuid); + if (Hob =3D=3D NULL) { + return; + } + + RootComplexList =3D (AC01_ROOT_COMPLEX *)GET_GUID_HOB_DATA (Hob); + + switch (Phase) { + case EfiPciHostBridgeEndEnumeration: + Ac01PcieCoreEndEnumeration (&RootComplexList[RootBridgeIndex]); + break; + + case EfiPciHostBridgeBeginEnumeration: + // 100ms that help fixing completion timeout issue + MicroSecondDelay (100000); + break; + + case EfiPciHostBridgeBeginBusAllocation: + case EfiPciHostBridgeEndBusAllocation: + case EfiPciHostBridgeBeginResourceAllocation: + case EfiPciHostBridgeAllocateResources: + case EfiPciHostBridgeSetResources: + case EfiPciHostBridgeFreeResources: + case EfiPciHostBridgeEndResourceAllocation: + case EfiMaxPciHostBridgeEnumerationPhase: + break; + } +} + +/** + + Perform initialization by the phase indicated. + + @param This Pointer to the EFI_PCI_PLATFORM_PROTO= COL instance. + @param HostBridge The associated PCI host bridge handle= . + @param Phase The phase of the PCI controller enume= ration. + @param ChipsetPhase Defines the execution phase of the PC= I chipset driver. + + @retval EFI_SUCCESS Must return with success. + +**/ +EFI_STATUS +EFIAPI +PhaseNotify ( + IN EFI_PCI_PLATFORM_PROTOCOL *This, + IN EFI_HANDLE HostBridge, + IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase, + IN EFI_PCI_CHIPSET_EXECUTION_PHASE ChipsetPhase + ) +{ + EFI_PCI_ROOT_BRIDGE_DEVICE_PATH *RootBridgeDevPath; + EFI_HANDLE RootBridgeHandle =3D N= ULL; + EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *ResAlloc =3D NULL; + EFI_STATUS Status; + + if (ChipsetPhase !=3D ChipsetExit) { + return EFI_SUCCESS; + } + + // + // Get HostBridgeInstance from HostBridge handle. + // + Status =3D gBS->HandleProtocol ( + HostBridge, + &gEfiPciHostBridgeResourceAllocationProtocolGuid, + (VOID **)&ResAlloc + ); + + while (TRUE) { + Status =3D ResAlloc->GetNextRootBridge (ResAlloc, &RootBridgeHandle); + if (EFI_ERROR (Status)) { + break; + } + + Status =3D gBS->HandleProtocol ( + RootBridgeHandle, + &gEfiDevicePathProtocolGuid, + (VOID **)&RootBridgeDevPath + ); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a %d: Failed to locate RootBridge DevicePath\= n", __FUNCTION__, __LINE__)); + break; + } + + NotifyPhaseCallBack (RootBridgeDevPath->AcpiDevicePath.UID, Phase); + } + + return EFI_SUCCESS; +} + +/** + + The PlatformPrepController() function can be used to notify the platform= driver so that + it can perform platform-specific actions. No specific actions are requir= ed. + Several notification points are defined at this time. More synchronizati= on points may be + added as required in the future. The PCI bus driver calls the platform d= river twice for + every PCI controller-once before the PCI Host Bridge Resource Allocation= Protocol driver + is notified, and once after the PCI Host Bridge Resource Allocation Prot= ocol driver has + been notified. + This member function may not perform any error checking on the input par= ameters. It also + does not return any error codes. If this member function detects any err= or condition, it + needs to handle those errors on its own because there is no way to surfa= ce any errors to + the caller. + + @param This Pointer to the EFI_PCI_PLATFORM_PROTOC= OL instance. + @param HostBridge The associated PCI host bridge handle. + @param RootBridge The associated PCI root bridge handle. + @param PciAddress The address of the PCI device on the P= CI bus. + @param Phase The phase of the PCI controller enumer= ation. + @param ChipsetPhase Defines the execution phase of the PCI= chipset driver. + + @retval EFI_SUCCESS The function completed successfully. + @retval EFI_UNSUPPORTED Not supported. + +**/ +EFI_STATUS +EFIAPI +PlatformPrepController ( + IN EFI_PCI_PLATFORM_PROTOCOL *This, + IN EFI_HANDLE HostBridge, + IN EFI_HANDLE RootBridge, + IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress, + IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase, + IN EFI_PCI_CHIPSET_EXECUTION_PHASE ChipsetPhase + ) +{ + return EFI_UNSUPPORTED; +} + +/** + Set the PciPolicy as EFI_RESERVE_ISA_IO_NO_ALIAS | EFI_RESERVE_VGA_IO_NO= _ALIAS. + + @param This The pointer to the Protocol itself. + @param PciPolicy The returned Policy. + + @retval EFI_UNSUPPORTED Function not supported. + @retval EFI_INVALID_PARAMETER Invalid PciPolicy value. + +**/ +EFI_STATUS +EFIAPI +GetPlatformPolicy ( + IN CONST EFI_PCI_PLATFORM_PROTOCOL *This, + OUT EFI_PCI_PLATFORM_POLICY *PciPolicy + ) +{ + return EFI_UNSUPPORTED; +} + +/** + + Return a PCI ROM image for the onboard device represented by PciHandle. + + @param This Protocol instance pointer. + @param PciHandle PCI device to return the ROM image fo= r. + @param RomImage PCI Rom Image for onboard device. + @param RomSize Size of RomImage in bytes. + + @retval EFI_SUCCESS RomImage is valid. + @retval EFI_NOT_FOUND No RomImage. + +**/ +EFI_STATUS +EFIAPI +GetPciRom ( + IN CONST EFI_PCI_PLATFORM_PROTOCOL *This, + IN EFI_HANDLE PciHandle, + OUT VOID **RomImage, + OUT UINTN *RomSize + ) +{ + return EFI_NOT_FOUND; +} + +// +// Interface defintion of PCI Platform protocol. +// +EFI_PCI_PLATFORM_PROTOCOL mPciPlatformProtocol =3D { + .PlatformNotify =3D PhaseNotify, + .PlatformPrepController =3D PlatformPrepController, + .GetPlatformPolicy =3D GetPlatformPolicy, + .GetPciRom =3D GetPciRom +}; + +/** + + The Entry point of the Pci Platform Driver. + + @param ImageHandle Handle to the image. + @param SystemTable Handle to System Table. + + @retval EFI_STATUS Status of the function calling. + +**/ +EFI_STATUS +PciPlatformDriverEntry ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + EFI_HANDLE PciPlatformHandle; + + // + // Install on a new handle + // + PciPlatformHandle =3D NULL; + Status =3D gBS->InstallMultipleProtocolInterfaces ( + &PciPlatformHandle, + &gEfiPciPlatformProtocolGuid, + &mPciPlatformProtocol, + NULL + ); + + return Status; +} --=20 2.17.1