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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Nov 2021 12:27:29.0593 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 05964dd5-2788-4cdd-b25c-08d9ae7c9d8d X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM5EUR03FT060.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBBPR08MB4394 Content-Type: text/plain The patch series enables CCIX port as PCIe root on N1SDP. V2: - Removed few PCDs entries that were not used. - Migrated to latest version edk2-platform and validated the patches. V1: - The PciExpressLib is updated to validate the PCIe addresses and introducing corresponding PCD entries. - A custom PCI Segment library is adapted from SynQuacerPciSegmentLib and ported for N1Sdp. - The root complex node info in PciHostBridge library is updated to include the CCIX port information. The changes can be seen at: https://github.com/khasim/edk2-platforms-n1sdp/tree/n1sdp-ccix-root Khasim Syed Mohammed (3): Silicon/ARM/NeoverseN1Soc: Update PciExpressLib to enable CCIX port Silicon/ARM/NeoverseN1Soc: Port PCI Segment Library Silicon/ARM/NeoverseN1Soc: Add CCIX root complex support .../ConfigurationManagerDxe.inf | 3 +- Platform/ARM/N1Sdp/N1SdpPlatform.dec | 3 - Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 3 +- .../PciExpressLib.c | 127 +- .../PciExpressLib.inf | 7 +- .../PciHostBridgeLib/PciHostBridgeLib.c | 71 +- .../PciHostBridgeLib/PciHostBridgeLib.inf | 11 +- .../Library/PciSegmentLib/PciSegmentLib.c | 1425 +++++++++++++++++ .../Library/PciSegmentLib/PciSegmentLib.inf | 35 + .../Library/PlatformLib/PlatformLib.inf | 1 + .../Library/PlatformLib/PlatformLibMem.c | 4 +- Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec | 5 +- 12 files changed, 1635 insertions(+), 60 deletions(-) create mode 100644 Silicon/ARM/NeoverseN1Soc/Library/PciSegmentLib/PciSegmentLib.c create mode 100644 Silicon/ARM/NeoverseN1Soc/Library/PciSegmentLib/PciSegmentLib.inf -- 2.17.1