From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from EUR04-VI1-obe.outbound.protection.outlook.com (EUR04-VI1-obe.outbound.protection.outlook.com [40.107.8.71]) by mx.groups.io with SMTP id smtpd.web09.49612.1638786288749082090 for ; Mon, 06 Dec 2021 02:24:49 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@armh.onmicrosoft.com header.s=selector2-armh-onmicrosoft-com header.b=mCF7hAYW; spf=pass (domain: arm.com, ip: 40.107.8.71, mailfrom: khasim.mohammed@arm.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=SwrtIVBPWF8sbpo+uCI3HbwMmuut/OdcJo23tLxF8MA=; b=mCF7hAYWrZnLImyawe3bxloSkXl2e0BIWnE7R8KlzuqLlpXyTBv8PFu+Hk/WRTIpWJWUrEIXGRF6y7fj6spvm7aCjMYG78zNeGpZm6ZcwJ5h4NCceQw+xVTQMo+QxikEoda8styqcP61eNAJhL9dEVouJhs4QNfsclkN1X3LNsA= Received: from AS8PR04CA0146.eurprd04.prod.outlook.com (2603:10a6:20b:127::31) by VI1PR08MB4510.eurprd08.prod.outlook.com (2603:10a6:803:fc::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4755.16; Mon, 6 Dec 2021 10:24:42 +0000 Received: from VE1EUR03FT008.eop-EUR03.prod.protection.outlook.com (2603:10a6:20b:127:cafe::a) by AS8PR04CA0146.outlook.office365.com (2603:10a6:20b:127::31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4755.17 via Frontend Transport; Mon, 6 Dec 2021 10:24:42 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 63.35.35.123) smtp.mailfrom=arm.com; dkim=pass (signature was verified) header.d=armh.onmicrosoft.com;dmarc=pass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 63.35.35.123 as permitted sender) receiver=protection.outlook.com; client-ip=63.35.35.123; helo=64aa7808-outbound-1.mta.getcheckrecipient.com; Received: from 64aa7808-outbound-1.mta.getcheckrecipient.com (63.35.35.123) by VE1EUR03FT008.mail.protection.outlook.com (10.152.18.75) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4755.13 via Frontend Transport; Mon, 6 Dec 2021 10:24:42 +0000 Received: ("Tessian outbound 157533e214a9:v110"); Mon, 06 Dec 2021 10:24:42 +0000 X-CheckRecipientChecked: true X-CR-MTA-CID: ec33ffb34f502c0e X-CR-MTA-TID: 64aa7808 Received: from 0bb15d411927.2 by 64aa7808-outbound-1.mta.getcheckrecipient.com id 477AD016-6E95-4780-AAC1-46BE45A39411.1; Mon, 06 Dec 2021 10:24:31 +0000 Received: from EUR05-VI1-obe.outbound.protection.outlook.com by 64aa7808-outbound-1.mta.getcheckrecipient.com with ESMTPS id 0bb15d411927.2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384); Mon, 06 Dec 2021 10:24:31 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=k/MpgRRHY4defZO+mGl22Bmmtz2lbPNo8iOkrC0F7eewmHM4zkR1gCuFeF3/pJRuRR2Tl+X5V+D0yYlb4ALL+oq/SfOjezZqPv0NP2G4dhoLmqGKyHEreSNzcD3Ed/ahDmColY1g5XAasnPKX5D2Md/phUAiDDR8s7DwKLzvGIig4TCMLg/5Q9EFv5IJR70ErIaZi4o5AJjs1Nvhyve4b508PDheiCDUIb8Ucx/L4fgOCX/lH3TNSJDx3nWZ0ry1ayTQA4pb6CA1cKvz3M50FrEjYIRIrIITQXPosnPlt7BwUA50faXW4tDyEf8lkU6o2iEyrxUgwNoWgz+BmrL90g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=SwrtIVBPWF8sbpo+uCI3HbwMmuut/OdcJo23tLxF8MA=; b=I5aZHghq4iOm0d/DypmobmoVpsjS6aMZ8z1Xz6UGihW7OYSwS0XeKWyoMnpzNbG0NuqL74GOCzi7SSAdPIPGBIKlj1Eb4kK/V2Dy+8S+j14PlFOk2dTtRFV3VtpjIcmn2B3/PYLf9XJ0dlas4j2TtYi486z+ZIAfQuB3tt0etbKH6wb3asMbmBtT7WuBwcD4gyxyP+FFOp4Fx25gXPOzpZr4KCENA2jcT4Ni+vgp18NoxvaB4w3a4qRG78BVoNtzmcWd2oUMMLFNrFcplPhtOIZAbgT541QnldxN9PncvgseV9RdtSyaqEDGnxgwC7QLO3IlGiOpV2r0pMopK9CqiQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=arm.com; dmarc=pass action=none header.from=arm.com; dkim=pass header.d=arm.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=SwrtIVBPWF8sbpo+uCI3HbwMmuut/OdcJo23tLxF8MA=; b=mCF7hAYWrZnLImyawe3bxloSkXl2e0BIWnE7R8KlzuqLlpXyTBv8PFu+Hk/WRTIpWJWUrEIXGRF6y7fj6spvm7aCjMYG78zNeGpZm6ZcwJ5h4NCceQw+xVTQMo+QxikEoda8styqcP61eNAJhL9dEVouJhs4QNfsclkN1X3LNsA= Authentication-Results-Original: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=arm.com; Received: from PA4PR08MB5902.eurprd08.prod.outlook.com (2603:10a6:102:e0::10) by PR2PR08MB4844.eurprd08.prod.outlook.com (2603:10a6:101:1d::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4734.28; Mon, 6 Dec 2021 10:24:29 +0000 Received: from PA4PR08MB5902.eurprd08.prod.outlook.com ([fe80::64a1:69a1:148d:9fa]) by PA4PR08MB5902.eurprd08.prod.outlook.com ([fe80::64a1:69a1:148d:9fa%9]) with mapi id 15.20.4755.021; Mon, 6 Dec 2021 10:24:29 +0000 From: "Khasim Mohammed" To: devel@edk2.groups.io Cc: nd@arm.com, Khasim Syed Mohammed , Deepak Pandey Subject: [PATCH v3 1/3] Silicon/ARM/NeoverseN1Soc: Update PciExpressLib to enable CCIX port Date: Mon, 6 Dec 2021 15:51:59 +0530 Message-Id: <20211206102201.27388-2-khasim.mohammed@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211206102201.27388-1-khasim.mohammed@arm.com> References: <20211206102201.27388-1-khasim.mohammed@arm.com> X-ClientProxiedBy: PN3PR01CA0123.INDPRD01.PROD.OUTLOOK.COM (2603:1096:c01:96::13) To PA4PR08MB5902.eurprd08.prod.outlook.com (2603:10a6:102:e0::10) MIME-Version: 1.0 Received: from e116623.arm.com (217.140.105.53) by PN3PR01CA0123.INDPRD01.PROD.OUTLOOK.COM (2603:1096:c01:96::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4755.11 via Frontend Transport; Mon, 6 Dec 2021 10:24:27 +0000 X-MS-Office365-Filtering-Correlation-Id: 91679ba4-bf0d-4428-ff1d-08d9b8a29dff X-MS-TrafficTypeDiagnostic: PR2PR08MB4844:EE_|VE1EUR03FT008:EE_|VI1PR08MB4510:EE_ X-Microsoft-Antispam-PRVS: x-checkrecipientrouted: true NoDisclaimer: true X-MS-Oob-TLC-OOBClassifiers: OLM:3513;OLM:3513; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: MgT70+E3h0l19qq7CKCOHH50ZHeFMN6PAPew/ql2I3csn9x8NnGQbhj2IOqSQx3qmgYikcCnHNvWZ/YgmCpK254eMUte+a7ZP8G5Se9M1zkoJaYw1plfFkLHvHIJEWBoNyGXIiORz9m8qSQ3QL5RKCpUyQ9aD5XqmrZfdqzR/iNVyE/iWMigBth9390ABMEN69MIuRMIl/y0ce1fsSIQZwHYJERE8YEiD/nFjYb+9EVclGIvpsNYD0LASTeCHI83J6TAK9+8eOC/Yl1xWher50aF4OtQiO+P0Tro7idM3f1bmXnG+Iw7osMa+ZPbMe9ruRglipgWRjoa8oayR1UNt/lYv5jMwmE+4XC7dHaNJ8JCYCQTtKXfe2GU1lo11AGIGP6jv6rmUrZbm1XkdssrO2M2dvzjQ+tgQyKKx4rqFgdjEF/jVMNL7ABF6vFxK3dzWcSlflWRwTsBmc0ggECB4k/KnYsXUbFZ0xnd8qh0vSM21B3jKv3U8sVZ93LW7nyt7OpxrmT894fYsDIQ8x8hc2UV7heXGfIe7H99acc8dbh8mj95x6rLb1ohTozbd/q9Q1NxBBfoqOr84F+knHOD8KcsqdtD4Ud9HLttGfQmq7CWM213SKovEsqQHjx+dXoexT5SDrq1j3CrRRk5JsJ1aflcd3ZHpgIBbtnYP5Rb9r2S+pWWj9TWFOfonU9JeV+PJpNWG420PJJ3EEJp/wP5qw== X-Forefront-Antispam-Report-Untrusted: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:PA4PR08MB5902.eurprd08.prod.outlook.com;PTR:;CAT:NONE;SFS:(4636009)(366004)(26005)(6486002)(30864003)(8936002)(186003)(38350700002)(38100700002)(19627235002)(66476007)(316002)(5660300002)(66556008)(36756003)(54906003)(86362001)(4326008)(15650500001)(83380400001)(2906002)(66946007)(52116002)(7696005)(8676002)(2616005)(508600001)(1076003)(956004)(6916009)(6666004);DIR:OUT;SFP:1101; X-MS-Exchange-Transport-CrossTenantHeadersStamped: PR2PR08MB4844 Original-Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=arm.com; Return-Path: Khasim.Mohammed@arm.com X-EOPAttributedMessage: 0 X-MS-Exchange-Transport-CrossTenantHeadersStripped: VE1EUR03FT008.eop-EUR03.prod.protection.outlook.com X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id-Prvs: 13c4315c-6b5d-4dee-3037-08d9b8a295e5 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: vQAyFNm08K4ZCkS2A9BwlLHTHAktEOvjtunhcG6/Md2KGQ+7icbVSJaVxK98P/E9mDqhEWyVBG7ucQnRnTuTRpi4pjSicawUtsaZHNex2h3QTbZMfNlkg6Z6A+a01itIbmmnwmn9R13KzhiPXCdFBjiE2n+7wVvTMeiVYZw9UqK79rLTypH+x80GCYtXt8dpKGFA9Fw77BVwzlsUe/MOMsPnwWcULhaKIUsoIh465z8Gi475k34QMOMta5pB2kuiT+jn0jQf4gAGWxrQLdrrFWaLcKadR3R6Rmne1deU0KGP82t6g/l7JsBrGj6Z5Ct1rlsb5xTizWPjYHOn9g9Kn9vIh9NXakhpODaKd5ydjxQgpy8iIvxDR3katCCjWl5kXBOC5CzZUXPJzkqHK+F3Thcftm6YvcPhARTIX4fdCM0WIF0UgG65u2Kl6+m18P629hUFxoNTJFsHDCOZm1l6AGX8/Ph8BVTifa6Qn5+APY8wPaGFTxOjV7++OlRm8lulO+MZByWF1a3qDGPz8U+3gyxzluD+LPUVHWvT9y6nzO6DEVzDwA7KFiIjPLHTdiZvRX1C46+papcqIb/Y4Z7U4zRajNlUUMq8386Z+IymUvRyssGeD08G3FJkxUMP7HtB0zCccCZqSgA2KK8tXaenD3VFtn5HTCNxIfxjlwnScMTkE7QZdDhgdaFcS+n0suxUjpi5g6ECof1y9DnejbopVg== X-Forefront-Antispam-Report: CIP:63.35.35.123;CTRY:IE;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:64aa7808-outbound-1.mta.getcheckrecipient.com;PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com;CAT:NONE;SFS:(4636009)(46966006)(36840700001)(70586007)(7696005)(316002)(70206006)(356005)(5660300002)(6666004)(36756003)(47076005)(6916009)(6486002)(81166007)(83380400001)(1076003)(508600001)(30864003)(86362001)(26005)(19627235002)(8936002)(2906002)(54906003)(956004)(15650500001)(186003)(82310400004)(8676002)(336012)(36860700001)(4326008)(2616005);DIR:OUT;SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Dec 2021 10:24:42.3086 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 91679ba4-bf0d-4428-ff1d-08d9b8a29dff X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: VE1EUR03FT008.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR08MB4510 Content-Type: text/plain Update the PciExpressLib to enable CCIX port as PCIe root host by validating the PCIe addresses and introducing corresponding PCD entries. Change-Id: I0d1167b86e53a3781f59c4d68a3b2e61add4317e Signed-off-by: Deepak Pandey Signed-off-by: Khasim Syed Mohammed --- .../PciExpressLib.c | 131 ++++++++++++------ .../PciExpressLib.inf | 7 +- Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec | 10 +- 3 files changed, 100 insertions(+), 48 deletions(-) diff --git a/Silicon/ARM/NeoverseN1Soc/Library/NeoverseN1SocPciExpressLib/PciExpressLib.c b/Silicon/ARM/NeoverseN1Soc/Library/NeoverseN1SocPciExpressLib/PciExpressLib.c index bb0246b4a9..dc3a9fb288 100644 --- a/Silicon/ARM/NeoverseN1Soc/Library/NeoverseN1SocPciExpressLib/PciExpressLib.c +++ b/Silicon/ARM/NeoverseN1Soc/Library/NeoverseN1SocPciExpressLib/PciExpressLib.c @@ -20,7 +20,7 @@ The description of the workarounds included for these limitations can be found in the comments below. - Copyright (c) 2020, ARM Limited. All rights reserved. + Copyright (c) 2020 - 2021, ARM Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent @@ -36,15 +36,29 @@ #include #include +#define BUS_OFFSET 20 +#define DEV_OFFSET 15 +#define FUNC_OFFSET 12 +#define REG_OFFSET 4096 + /** - Assert the validity of a PCI address. A valid PCI address should contain 1's - only in the low 28 bits. + Assert the validity of a PCI address. A valid PCI address should contain 1's. @param A The address to validate. **/ #define ASSERT_INVALID_PCI_ADDRESS(A) \ - ASSERT (((A) & ~0xfffffff) == 0) + ASSERT (((A) & ~0xffffffff) == 0) + +#define EFI_PCIE_ADDRESS(bus, dev, func, reg) \ + (UINT64) ( \ + (((UINTN) bus) << BUS_OFFSET) | \ + (((UINTN) dev) << DEV_OFFSET) | \ + (((UINTN) func) << FUNC_OFFSET) | \ + (((UINTN) (reg)) < REG_OFFSET ? \ + ((UINTN) (reg)) : (UINT64) (LShiftU64 ((UINT64) (reg), 32)))) + +#define GET_PCIE_BASE_ADDRESS(Address) (Address & 0xF8000000) /* Root port Entry, BDF Entries Count */ #define BDF_TABLE_ENTRY_SIZE 4 @@ -53,6 +67,7 @@ /* BDF table offsets for PCIe */ #define PCIE_BDF_TABLE_OFFSET 0 +#define CCIX_BDF_TABLE_OFFSET (16 * 1024) #define GET_BUS_NUM(Address) (((Address) >> 20) & 0x7F) #define GET_DEV_NUM(Address) (((Address) >> 15) & 0x1F) @@ -78,7 +93,7 @@ Value returned for reads on configuration space of unimplemented device functions. **/ -STATIC UINTN mDummyConfigData = 0xFFFFFFFF; +CONST STATIC UINTN mDummyConfigData = 0xFFFFFFFF; /** Registers a PCI device so PCI configuration registers may be accessed after @@ -113,49 +128,64 @@ PciExpressRegisterForRuntimeAccess ( } /** - Check if the requested PCI address can be safely accessed. + Check if the requested PCI address is a valid BDF address. - SCP performs the initial bus scan, prepares a table of valid BDF addresses - and shares them through non-trusted SRAM. This function validates if the - requested PCI address belongs to a valid BDF by checking the table of valid - entries. If not, this function will return false. This is a workaround to - avoid bus fault that occurs when accessing unavailable PCI device due to - hardware bug. + SCP performs the initial bus scan and prepares a table of valid BDF addresses + and shares them through non-trusted SRAM. This function validates if the PCI + address from any PCI request falls within the table of valid entries. If not, + this function will return 0xFFFFFFFF. This is a workaround to avoid bus fault + that happens when accessing unavailable PCI device due to RTL bug. @param Address The address that encodes the PCI Bus, Device, Function and Register. - @return TRUE BDF can be accessed, valid. - @return FALSE BDF should not be accessed, invalid. + @return The base address of PCI Express. **/ STATIC -BOOLEAN +UINTN IsBdfValid ( - IN UINTN Address + IN UINTN Address ) { + UINT8 Bus; + UINT8 Device; + UINT8 Function; UINTN BdfCount; UINTN BdfValue; - UINTN BdfEntry; UINTN Count; UINTN TableBase; - UINTN ConfigBase; + UINTN PciAddress; + + Bus = GET_BUS_NUM (Address); + Device = GET_DEV_NUM (Address); + Function = GET_FUNC_NUM (Address); + + PciAddress = EFI_PCIE_ADDRESS (Bus, Device, Function, 0); + + if (GET_PCIE_BASE_ADDRESS (Address) == + FixedPcdGet64 (PcdPcieExpressBaseAddress)) { + TableBase = NEOVERSEN1SOC_NON_SECURE_SRAM_BASE + PCIE_BDF_TABLE_OFFSET; + } else { + TableBase = NEOVERSEN1SOC_NON_SECURE_SRAM_BASE + CCIX_BDF_TABLE_OFFSET; + } - ConfigBase = Address & ~0xFFF; - TableBase = NEOVERSEN1SOC_NON_SECURE_SRAM_BASE + PCIE_BDF_TABLE_OFFSET; BdfCount = MmioRead32 (TableBase + BDF_TABLE_ENTRY_SIZE); - BdfEntry = TableBase + BDF_TABLE_HEADER_SIZE; - /* Skip the header & check remaining entry */ - for (Count = 0; Count < BdfCount; Count++, BdfEntry += BDF_TABLE_ENTRY_SIZE) { - BdfValue = MmioRead32 (BdfEntry); - if (BdfValue == ConfigBase) { - return TRUE; - } + /* Start from the second entry */ + for (Count = BDF_TABLE_HEADER_COUNT; + Count < (BdfCount + BDF_TABLE_HEADER_COUNT); + Count++) { + BdfValue = MmioRead32 (TableBase + (Count * BDF_TABLE_ENTRY_SIZE)); + if (BdfValue == PciAddress) + break; } - return FALSE; + if (Count == (BdfCount + BDF_TABLE_HEADER_COUNT)) { + return mDummyConfigData; + } else { + return PciAddress; + } } /** @@ -186,22 +216,45 @@ GetPciExpressAddress ( IN UINTN Address ) { - UINT8 Bus, Device, Function; - UINTN ConfigAddress; - - Bus = GET_BUS_NUM (Address); - Device = GET_DEV_NUM (Address); + BOOLEAN CheckRootPort; + UINT8 Bus; + UINT8 Device; + UINT8 Function; + UINT16 Register; + UINTN ConfigAddress; + + // Get the EFI notation + Bus = GET_BUS_NUM (Address); + Device = GET_DEV_NUM (Address); Function = GET_FUNC_NUM (Address); - - if ((Bus == 0) && (Device == 0) && (Function == 0)) { - ConfigAddress = PcdGet32 (PcdPcieRootPortConfigBaseAddress) + Address; + Register = GET_REG_NUM (Address); + + CheckRootPort = (BOOLEAN) (Bus == 0) && (Device == 0) && (Function == 0); + + if (GET_PCIE_BASE_ADDRESS (Address) == + FixedPcdGet64 (PcdPcieExpressBaseAddress)) { + if (CheckRootPort == TRUE) { + ConfigAddress = (UINTN) PcdGet32 (PcdPcieRootPortConfigBaseAddress + + EFI_PCIE_ADDRESS (Bus, Device, Function, Register)); + } else { + ConfigAddress = (UINTN) (PcdGet64 (PcdPcieExpressBaseAddress) + + EFI_PCIE_ADDRESS (Bus, Device, Function, Register)); + } } else { - ConfigAddress = PcdGet64 (PcdPciExpressBaseAddress) + Address; - if (!IsBdfValid(Address)) { - ConfigAddress = (UINTN)&mDummyConfigData; + if (CheckRootPort == TRUE) { + ConfigAddress = (UINTN) PcdGet32 (PcdCcixRootPortConfigBaseAddress + + EFI_PCIE_ADDRESS (Bus, Device, Function, Register)); + } else { + ConfigAddress = (UINTN) PcdGet32 (PcdCcixExpressBaseAddress + + EFI_PCIE_ADDRESS (Bus, Device, Function, Register)); } } + if (CheckRootPort == FALSE) { + if (IsBdfValid (Address) == mDummyConfigData) + ConfigAddress = (UINTN) &mDummyConfigData; + } + return (VOID *)ConfigAddress; } diff --git a/Silicon/ARM/NeoverseN1Soc/Library/NeoverseN1SocPciExpressLib/PciExpressLib.inf b/Silicon/ARM/NeoverseN1Soc/Library/NeoverseN1SocPciExpressLib/PciExpressLib.inf index acb6fb6219..eac981e460 100644 --- a/Silicon/ARM/NeoverseN1Soc/Library/NeoverseN1SocPciExpressLib/PciExpressLib.inf +++ b/Silicon/ARM/NeoverseN1Soc/Library/NeoverseN1SocPciExpressLib/PciExpressLib.inf @@ -21,7 +21,7 @@ # 2. Root port ECAM space is not capable of 8bit/16bit writes. # This library includes workaround for these limitations as well. # -# Copyright (c) 2020, ARM Limited. All rights reserved. +# Copyright (c) 2020 - 2021, ARM Limited. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -43,6 +43,8 @@ Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec [FixedPcd] + gArmNeoverseN1SocTokenSpaceGuid.PcdCcixRootPortConfigBaseAddress + gArmNeoverseN1SocTokenSpaceGuid.PcdCcixRootPortConfigBaseSize gArmNeoverseN1SocTokenSpaceGuid.PcdPcieRootPortConfigBaseAddress gArmNeoverseN1SocTokenSpaceGuid.PcdPcieRootPortConfigBaseSize @@ -53,4 +55,5 @@ PcdLib [Pcd] - gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress ## CONSUMES + gArmNeoverseN1SocTokenSpaceGuid.PcdCcixExpressBaseAddress ## CONSUMES + gArmNeoverseN1SocTokenSpaceGuid.PcdPcieExpressBaseAddress diff --git a/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec b/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec index eea2d58402..9d7e2e3130 100644 --- a/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec +++ b/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec @@ -46,6 +46,7 @@ gArmNeoverseN1SocTokenSpaceGuid.PcdPcieMmio64MaxBase|0x28FFFFFFFF|UINT64|0x00000010 gArmNeoverseN1SocTokenSpaceGuid.PcdPcieMmio64Size|0x2000000000|UINT64|0x00000011 gArmNeoverseN1SocTokenSpaceGuid.PcdPcieMmio64Translation|0x0|UINT64|0x00000012 + gArmNeoverseN1SocTokenSpaceGuid.PcdPcieExpressBaseAddress|0x70000000|UINT64|0x00000013 # CCIX gArmNeoverseN1SocTokenSpaceGuid.PcdCcixBusCount|18|UINT32|0x00000016 @@ -53,8 +54,8 @@ gArmNeoverseN1SocTokenSpaceGuid.PcdCcixBusMin|0|UINT32|0x00000018 gArmNeoverseN1SocTokenSpaceGuid.PcdCcixExpressBaseAddress|0x68000000|UINT32|0x00000019 gArmNeoverseN1SocTokenSpaceGuid.PcdCcixIoBase|0x0|UINT32|0x0000001A - gArmNeoverseN1SocTokenSpaceGuid.PcdCcixIoMaxBase|0x01FFFF|UINT32|0x0000001B - gArmNeoverseN1SocTokenSpaceGuid.PcdCcixIoSize|0x020000|UINT32|0x0000001C + gArmNeoverseN1SocTokenSpaceGuid.PcdCcixIoMaxBase|0x00FFFFFF|UINT32|0x0000001B + gArmNeoverseN1SocTokenSpaceGuid.PcdCcixIoSize|0x01000000|UINT32|0x0000001C gArmNeoverseN1SocTokenSpaceGuid.PcdCcixIoTranslation|0x6D200000|UINT32|0x00000001D gArmNeoverseN1SocTokenSpaceGuid.PcdCcixMmio32Base|0x69200000|UINT32|0x0000001E gArmNeoverseN1SocTokenSpaceGuid.PcdCcixMmio32MaxBase|0x6D1FFFFF|UINT32|0x00000001F @@ -68,8 +69,3 @@ gArmNeoverseN1SocTokenSpaceGuid.PcdCcixRootPortConfigBaseSize|0x00001000|UINT32|0x00000027 gArmNeoverseN1SocTokenSpaceGuid.PcdExtMemorySpace|0x40000000000|UINT64|0x00000029 - - # Remote Chip PCIe - gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieIoTranslation|0x40075200000|UINT64|0x0000004A - gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieMmio32Translation|0x40000000000|UINT64|0x0000004B - gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieMmio64Translation|0x40000000000|UINT64|0x0000004C -- 2.17.1