From: "Gerd Hoffmann" <kraxel@redhat.com>
To: devel@edk2.groups.io
Cc: "Pawel Polawski" <ppolawsk@redhat.com>,
"Liming Gao" <gaoliming@byosoft.com.cn>,
"Philippe Mathieu-Daudé" <philmd@redhat.com>,
"Jiewen Yao" <jiewen.yao@intel.com>,
"Abner Chang" <abner.chang@hpe.com>,
"Ard Biesheuvel" <ardb+tianocore@kernel.org>,
"Ray Ni" <ray.ni@intel.com>, "Gerd Hoffmann" <kraxel@redhat.com>,
"Hao A Wu" <hao.a.wu@intel.com>,
"Jian J Wang" <jian.j.wang@intel.com>,
"Jordan Justen" <jordan.l.justen@intel.com>,
"Leif Lindholm" <leif@nuviainc.com>
Subject: [PATCH 6/6] OvmfPkg/Microvm/pcie: add pcie support
Date: Thu, 16 Dec 2021 10:50:37 +0100 [thread overview]
Message-ID: <20211216095037.1843149-7-kraxel@redhat.com> (raw)
In-Reply-To: <20211216095037.1843149-1-kraxel@redhat.com>
Link in pcie and host bridge bits. Enables support for PCIe in microvm
(qemu-system-x86_64 -M microvm,pcie=on).
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3777
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
OvmfPkg/Microvm/MicrovmX64.dsc | 40 +++++++++++++++++++++-------------
OvmfPkg/Microvm/README | 2 +-
2 files changed, 26 insertions(+), 16 deletions(-)
diff --git a/OvmfPkg/Microvm/MicrovmX64.dsc b/OvmfPkg/Microvm/MicrovmX64.dsc
index bb256fd3c640..ce6f3043f4b2 100644
--- a/OvmfPkg/Microvm/MicrovmX64.dsc
+++ b/OvmfPkg/Microvm/MicrovmX64.dsc
@@ -334,7 +334,9 @@ [LibraryClasses.common.DXE_RUNTIME_DRIVER]
!endif
UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf
BaseCryptLib|CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
- PciLib|OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf
+# PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
+# PciPcdProducerLib|OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf
+# PciExpressLib|ArmVirtPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/DxeQemuFwCfgS3LibFwCfg.inf
VariablePolicyLib|MdeModulePkg/Library/VariablePolicyLib/VariablePolicyLibRuntimeDxe.inf
@@ -351,7 +353,9 @@ [LibraryClasses.common.UEFI_DRIVER]
DebugLib|OvmfPkg/Library/PlatformDebugLibIoPort/PlatformDebugLibIoPort.inf
!endif
UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf
- PciLib|OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf
+ PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
+ PciPcdProducerLib|OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf
+ PciExpressLib|ArmVirtPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
[LibraryClasses.common.DXE_DRIVER]
PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
@@ -373,7 +377,9 @@ [LibraryClasses.common.DXE_DRIVER]
!if $(SOURCE_DEBUG_ENABLE) == TRUE
DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/DxeDebugAgentLib.inf
!endif
- PciLib|OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf
+ PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
+ PciPcdProducerLib|OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf
+ PciExpressLib|ArmVirtPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
MpInitLib|UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/DxeQemuFwCfgS3LibFwCfg.inf
QemuLoadImageLib|OvmfPkg/Library/X86QemuLoadImageLib/X86QemuLoadImageLib.inf
@@ -389,7 +395,9 @@ [LibraryClasses.common.UEFI_APPLICATION]
!else
DebugLib|OvmfPkg/Library/PlatformDebugLibIoPort/PlatformDebugLibIoPort.inf
!endif
- PciLib|OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf
+ PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
+ PciPcdProducerLib|OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf
+ PciExpressLib|ArmVirtPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
[LibraryClasses.common.DXE_SMM_DRIVER]
PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
@@ -410,7 +418,9 @@ [LibraryClasses.common.DXE_SMM_DRIVER]
DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/SmmDebugAgentLib.inf
!endif
BaseCryptLib|CryptoPkg/Library/BaseCryptLib/SmmCryptLib.inf
- PciLib|OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf
+ PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
+ PciPcdProducerLib|OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf
+ PciExpressLib|ArmVirtPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
[LibraryClasses.common.SMM_CORE]
PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
@@ -426,7 +436,9 @@ [LibraryClasses.common.SMM_CORE]
!else
DebugLib|OvmfPkg/Library/PlatformDebugLibIoPort/PlatformDebugLibIoPort.inf
!endif
- PciLib|OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf
+ PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
+ PciPcdProducerLib|OvmfPkg/Fdt/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf
+ PciExpressLib|ArmVirtPkg/Library/BaseCachingPciExpressLib/BaseCachingPciExpressLib.inf
################################################################################
#
@@ -501,14 +513,6 @@ [PcdsFixedAtBuild]
gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2F
!endif
- # This PCD is used to set the base address of the PCI express hierarchy. It
- # is only consulted when OVMF runs on Q35. In that case it is programmed into
- # the PCIEXBAR register.
- #
- # On Q35 machine types that QEMU intends to support in the long term, QEMU
- # never lets the RAM below 4 GB exceed 2816 MB.
- gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000
-
!if $(SOURCE_DEBUG_ENABLE) == TRUE
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2
!endif
@@ -573,6 +577,12 @@ [PcdsDynamicDefault]
gEfiMdePkgTokenSpaceGuid.PcdFSBClock|1000000000
gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|0
+ # set PcdPciExpressBaseAddress to MAX_UINT64, which signifies that this
+ # PCD and PcdPciDisableBusEnumeration below have not been assigned yet
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xFFFFFFFFFFFFFFFF
+ gEfiMdePkgTokenSpaceGuid.PcdPciIoTranslation|0x0
+ gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration|TRUE
+
# Set video resolution for text setup.
gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoHorizontalResolution|640
gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoVerticalResolution|480
@@ -670,7 +680,7 @@ [Components]
OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf
MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
<LibraryClasses>
- PciHostBridgeLib|MdeModulePkg/Library/PciHostBridgeLibNull/PciHostBridgeLibNull.inf
+ PciHostBridgeLib|OvmfPkg/Fdt/FdtPciHostBridgeLib/FdtPciHostBridgeLib.inf
PciHostBridgeUtilityLib|OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.inf
NULL|OvmfPkg/Library/PlatformHasIoMmuLib/PlatformHasIoMmuLib.inf
}
diff --git a/OvmfPkg/Microvm/README b/OvmfPkg/Microvm/README
index 540d39f2ec21..813920d92a60 100644
--- a/OvmfPkg/Microvm/README
+++ b/OvmfPkg/Microvm/README
@@ -29,7 +29,7 @@ features
[working] serial console
[working] direct kernel boot
[working] virtio-mmio support
- [in progress] pcie support
+ [working] pcie support
known limitations
-----------------
--
2.33.1
prev parent reply other threads:[~2021-12-16 9:51 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-16 9:50 [PATCH 0/6] OvmfPkg/Microvm/pcie: add pcie support Gerd Hoffmann
2021-12-16 9:50 ` [PATCH 1/6] PciHostBridge: io range is not mandatory Gerd Hoffmann
2021-12-16 9:53 ` [edk2-devel] " Ard Biesheuvel
2021-12-16 9:50 ` [PATCH 2/6] FdtPciHostBridgeLib: " Gerd Hoffmann
2021-12-16 9:50 ` [PATCH 3/6] OvmfPkg/PlatformPei: unfix PcdPciExpressBaseAddress Gerd Hoffmann
2021-12-16 12:50 ` [edk2-devel] " Ard Biesheuvel
2021-12-17 6:33 ` Gerd Hoffmann
2021-12-16 9:50 ` [PATCH 4/6] OvmfPkg/Microvm/pcie: no vbeshim please Gerd Hoffmann
2021-12-16 9:50 ` [PATCH 5/6] OvmfPkg/Microvm/pcie: mPhysMemAddressWidth tweak Gerd Hoffmann
2021-12-16 9:50 ` Gerd Hoffmann [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-list from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20211216095037.1843149-7-kraxel@redhat.com \
--to=devel@edk2.groups.io \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox