[PATCH v2 00/17] Update Arm platforms following addition of EFI_MP_SERVICES_PROTOCOL support in edk2

[PATCH v2 00/17] Update Arm platforms following addition of EFI_MP_SERVICES_PROTOCOL support in edk2

[Rebecca Cran]

Changes from v1:

Fixed Platform/SoftIron, Platform/RaspberryPi, Silicon/AMD,
Silicon/Ampere, Silicon/Phytium, Silicon/Hisilicon.

Patches 1/17 through 8/17 are the same as v1.

--------

The following platforms are already broken:

o Drivers/OptionRomPkg/OptionRomPkg.dsc for AARCH64 and ARM: due to OptionRomPkg/Library/FrameBufferBltLib/FrameBufferBltLib.inf.

o Features/Ext4Pkg/Ext4Pkg.dsc for ARM: edk2-platforms/Features/Ext4Pkg/Ext4Dxe/Inode.c:341: undefined reference to `__aeabi_uidivmod')

o Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc for ARM

o Platform/Hisilicon/{D03,D05,D06} for AARCH64: Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c:50:18: error: ‘EmHilink0Hccs1X8Width16’ undeclared here (not in a function))

o Silicon/Marvell/Armada7k8k/Armada7k8kCapsule.dscfor AARCH64 and ARM: error C0DE: Unknown fatal error when processing [Silicon/Marvell/Armada7k8k/Armada7k8kCapsule.dsc]

o Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc for ARM.

o Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc for ARM.

o Platform/ARM/SgiPkg/RdN2/RdN2.dsc for ARM.

o Platform/ARM/SgiPkg/RdV1/RdV1.dsc for ARM.

o Platform/ARM/SgiPkg/RdV1Mc/RdV1Mc.dsc for ARM.

o Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc for ARM.

o Platform/Comcast/RDKQemu/RDKQemu.dsc for AARCH64 and ARM due to ACPI
issue.

o Platform/Marvell/Cn913xDb/Cn913xDbA.dsc for AARCH64 and ARM: tries to
use literal $(PLATFORM_NAME).

o Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc for AARCH64
and ARM: VariablePolicyHelperLib issue.

o Platform/SolidRun/Cn913xCEx7Eval/Cn913xCEx7Eval.dsc for AARCH64 and ARM:
T91 not found.

--------

This patch series depends on the "Add EFI_MP_SERVICES_PROTOCOL support
for AARCH64" series which is in the process of being reviewed.

With the addition of EFI_MP_SERVICES_PROTOCOL support for Arm, consumers
of ArmPkg/Drivers/CpuDxe now need an instance of MpInitLib. This series
adds ArmPkg/Library/MpInitLib/DxeMpInitLib.inf.

Also, the ARM_CORE_INFO struct has changed so there's now an MPIDR field
where there were previously separate cluster and core fields. This
series updates the initializers and other code for the various instances.


Rebecca Cran (17):
  Platform/ARM: Add MpInitLib instance
  Platform/Socionext: Add instance of MpInitLib
  Silicon/Marvell: Add instance of MpInitLib
  Platform/Qemu: Add instance of MpInitLib
  Platform/ARM: Update ARM_CORE_INFO initializer for MPIDR field change
  Silicon/Marvell: Update ARM_CORE_INFO initializer for MPIDR field
    change
  Silicon/Socionext: Update ARM_CORE_INFO initializer for MPIDR field
    change
  Silicon/Qemu: Update ARM_CORE_INFO initializer for MPIDR field change
  Platform/AMD: Add instance of MpInitLib to OverdriveBoard.dsc
  Platform/SoftIron: Add instance of MpInitLib to Overdrive1000Board.dsc
  Platform/RaspberryPi: Add instance of MpInitLib to RPi3.dsc and
    RPi4.dsc
  Silicon/AMD: Update Styx code to work with changes ARM_CORE_INFO
    struct
  Silicon/Ampere: Add instance of MpInitLib to AmpereAltraPkg.dsc
  Silicon/Ampere: Update ArmPlatformLib to work with changed
    ARM_CORE_INFO
  Silicon/Phytium: Add instance of MpInitLib to PhytiumCommonPkg.dsc.inf
  Silicon/Phytium: Update FT2000-4Pkg PlatformLib for ARM_CORE_INFO
    change
  Silicon/Hisilicon: Add instance of MpInitLib to Hisilicon.dsc.inc

 Platform/AMD/OverdriveBoard/OverdriveBoard.dsc                        |  1 +
 Platform/ARM/JunoPkg/ArmJuno.dsc                                      |  1 +
 Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJuno.c                     | 12 ++---
 Platform/ARM/Morello/MorelloPlatform.dsc.inc                          |  1 +
 Platform/ARM/N1Sdp/N1SdpPlatform.dsc                                  |  1 +
 Platform/ARM/SgiPkg/SgiPlatform.dsc.inc                               |  1 +
 Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc                          |  1 +
 Platform/ARM/VExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7.c    | 16 +++----
 Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSM.c            | 16 +++----
 Platform/Qemu/SbsaQemu/SbsaQemu.dsc                                   |  1 +
 Platform/RaspberryPi/RPi3/RPi3.dsc                                    |  1 +
 Platform/RaspberryPi/RPi4/RPi4.dsc                                    |  1 +
 Platform/Socionext/DeveloperBox/DeveloperBox.dsc                      |  1 +
 Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc          |  1 +
 Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc           |  1 +
 Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatform.c               |  3 +-
 Silicon/AMD/Styx/Drivers/PlatInitPei/PlatInitPei.c                    |  8 ++--
 Silicon/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c          | 22 ++++-----
 Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc                  |  1 +
 Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c |  5 +-
 Silicon/Hisilicon/Hisilicon.dsc.inc                                   |  1 +
 Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc                         |  1 +
 Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.c      |  8 ++--
 Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/PlatformLib.c         |  2 +-
 Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dsc.inc             |  1 +
 Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.c               |  8 ++--
 Silicon/Socionext/SynQuacer/Library/SynQuacerLib/SynQuacer.c          | 48 ++++++++++----------
 27 files changed, 88 insertions(+), 76 deletions(-)

-- 
2.31.1

[PATCH v2 01/17] Platform/ARM: Add MpInitLib instance

[Rebecca Cran]

MpInitLib is now required for all users of ArmPkg/Drivers/CpuDxe. Add
ArmPkg/Library/MpInitLib/DxeMpInitLib.inf .

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
---
 Platform/ARM/JunoPkg/ArmJuno.dsc             | 1 +
 Platform/ARM/Morello/MorelloPlatform.dsc.inc | 1 +
 Platform/ARM/N1Sdp/N1SdpPlatform.dsc         | 1 +
 Platform/ARM/SgiPkg/SgiPlatform.dsc.inc      | 1 +
 Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc | 1 +
 5 files changed, 5 insertions(+)

diff --git a/Platform/ARM/JunoPkg/ArmJuno.dsc b/Platform/ARM/JunoPkg/ArmJuno.dsc
index 3b7a63b6437a..61f5f2673d7a 100644
--- a/Platform/ARM/JunoPkg/ArmJuno.dsc
+++ b/Platform/ARM/JunoPkg/ArmJuno.dsc
@@ -76,6 +76,7 @@
   PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf
   PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
   PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf
+  MpInitLib|ArmPkg/Library/MpInitLib/DxeMpInitLib.inf
 
 [BuildOptions]
   GCC:*_*_ARM_PLATFORM_FLAGS = -march=armv8-a
diff --git a/Platform/ARM/Morello/MorelloPlatform.dsc.inc b/Platform/ARM/Morello/MorelloPlatform.dsc.inc
index dccd22248318..3d29153c8281 100644
--- a/Platform/ARM/Morello/MorelloPlatform.dsc.inc
+++ b/Platform/ARM/Morello/MorelloPlatform.dsc.inc
@@ -50,6 +50,7 @@
   PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf
   PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
   PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf
+  MpInitLib|ArmPkg/Library/MpInitLib/DxeMpInitLib.inf
 
 [LibraryClasses.common.DXE_RUNTIME_DRIVER]
   BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
index 7488bdc03609..4b8a990d1211 100644
--- a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
+++ b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
@@ -78,6 +78,7 @@
   PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf
   PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
   PciExpressLib|Silicon/ARM/NeoverseN1Soc/Library/NeoverseN1SocPciExpressLib/PciExpressLib.inf
+  MpInitLib|ArmPkg/Library/MpInitLib/DxeMpInitLib.inf
 
 [LibraryClasses.common.DXE_RUNTIME_DRIVER]
   BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
index 4fe3ccf9a530..ca4eaa101b4d 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
@@ -83,6 +83,7 @@
   PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf
   PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
   PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf
+  MpInitLib|ArmPkg/Library/MpInitLib/DxeMpInitLib.inf
 
 [LibraryClasses.common.DXE_RUNTIME_DRIVER]
   BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
diff --git a/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc b/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
index d6f31ecda42f..207cf75a5671 100644
--- a/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
+++ b/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
@@ -211,6 +211,7 @@
   SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf
   PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
   MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+  MpInitLib|ArmPkg/Library/MpInitLib/DxeMpInitLib.inf
 
 [LibraryClasses.common.UEFI_APPLICATION]
   PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
-- 
2.31.1

[PATCH v2 02/17] Platform/Socionext: Add instance of MpInitLib

[Rebecca Cran]

MpInitLib is now required for all users of ArmPkg/Drivers/CpuDxe. Add
ArmPkg/Library/MpInitLib/DxeMpInitLib.inf .

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
---
 Platform/Socionext/DeveloperBox/DeveloperBox.dsc             | 1 +
 Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc | 1 +
 2 files changed, 2 insertions(+)

diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
index 8419c89318fb..0abf954e6e2e 100644
--- a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
+++ b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
@@ -106,6 +106,7 @@
   FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf
   SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf
   PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
+  MpInitLib|ArmPkg/Library/MpInitLib/DxeMpInitLib.inf
 
   #
   # Firmware update
diff --git a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc
index e5315897624b..272e632194e5 100644
--- a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc
+++ b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc
@@ -164,6 +164,7 @@
   FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf
   SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf
   PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
+  MpInitLib|ArmPkg/Library/MpInitLib/DxeMpInitLib.inf
 
   #
   # Firmware update
-- 
2.31.1

[PATCH v2 03/17] Silicon/Marvell: Add instance of MpInitLib

[Rebecca Cran]

MpInitLib is now required for all users of ArmPkg/Drivers/CpuDxe. Add
ArmPkg/Library/MpInitLib/DxeMpInitLib.inf .

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
---
 Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
index 3b76acd99c98..71778d43cacd 100644
--- a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
+++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
@@ -176,6 +176,7 @@
   NonDiscoverableDeviceRegistrationLib|MdeModulePkg/Library/NonDiscoverableDeviceRegistrationLib/NonDiscoverableDeviceRegistrationLib.inf
   DtPlatformDtbLoaderLib|EmbeddedPkg/Library/DxeDtPlatformDtbLoaderLibDefault/DxeDtPlatformDtbLoaderLibDefault.inf
   VariablePolicyHelperLib|MdeModulePkg/Library/VariablePolicyHelperLib/VariablePolicyHelperLib.inf
+  MpInitLib|ArmPkg/Library/MpInitLib/DxeMpInitLib.inf
 
 [LibraryClasses.common.UEFI_APPLICATION]
   PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
-- 
2.31.1

[PATCH v2 04/17] Platform/Qemu: Add instance of MpInitLib

[Rebecca Cran]

MpInitLib is now required for all users of ArmPkg/Drivers/CpuDxe. Add
ArmPkg/Library/MpInitLib/DxeMpInitLib.inf .

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
---
 Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc
index 1d1a25196e22..021c20ed7abe 100644
--- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc
+++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc
@@ -244,6 +244,7 @@ DEFINE NETWORK_HTTP_BOOT_ENABLE       = FALSE
   SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf
   PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
   MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+  MpInitLib|ArmPkg/Library/MpInitLib/DxeMpInitLib.inf 
 
   NonDiscoverableDeviceRegistrationLib|MdeModulePkg/Library/NonDiscoverableDeviceRegistrationLib/NonDiscoverableDeviceRegistrationLib.inf
 
-- 
2.31.1

[PATCH v2 05/17] Platform/ARM: Update ARM_CORE_INFO initializer for MPIDR field change

[Rebecca Cran]

The ARM_CORE_INFO struct has been updated so the MPIDR is now a single
field instead of separate cluster/core fields. Update the initializer.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
---
 Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJuno.c                  | 12 ++++++------
 Platform/ARM/VExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7.c | 16 ++++++++--------
 Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSM.c         | 16 ++++++++--------
 3 files changed, 22 insertions(+), 22 deletions(-)

diff --git a/Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJuno.c b/Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJuno.c
index c5d4f70fc0f5..a5d5f3fd9b79 100644
--- a/Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJuno.c
+++ b/Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJuno.c
@@ -19,7 +19,7 @@
 ARM_CORE_INFO mJunoInfoTable[] = {
   {
     // Cluster 0, Core 0
-    0x0, 0x0,
+    0x000,
 
     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
@@ -29,7 +29,7 @@ ARM_CORE_INFO mJunoInfoTable[] = {
   },
   {
     // Cluster 0, Core 1
-    0x0, 0x1,
+    0x001,
 
     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
@@ -39,7 +39,7 @@ ARM_CORE_INFO mJunoInfoTable[] = {
   },
   {
     // Cluster 1, Core 0
-    0x1, 0x0,
+    0x100,
 
     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
@@ -49,7 +49,7 @@ ARM_CORE_INFO mJunoInfoTable[] = {
   },
   {
     // Cluster 1, Core 1
-    0x1, 0x1,
+    0x101,
 
     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
@@ -59,7 +59,7 @@ ARM_CORE_INFO mJunoInfoTable[] = {
   },
   {
     // Cluster 1, Core 2
-    0x1, 0x2,
+    0x102,
 
     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
@@ -69,7 +69,7 @@ ARM_CORE_INFO mJunoInfoTable[] = {
   },
   {
     // Cluster 1, Core 3
-    0x1, 0x3,
+    0x103,
 
     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
diff --git a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7.c b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7.c
index 09521bdf003a..d51784a47c0e 100644
--- a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7.c
+++ b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7.c
@@ -18,7 +18,7 @@
 ARM_CORE_INFO mVersatileExpressCTA15A7InfoTable[] = {
   {
     // Cluster 0, Core 0
-    0x0, 0x0,
+    0x000,
 
     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
     (EFI_PHYSICAL_ADDRESS)ARM_CTA15A7_SPC_A15_BX_ADDR0,
@@ -28,7 +28,7 @@ ARM_CORE_INFO mVersatileExpressCTA15A7InfoTable[] = {
   },
   {
     // Cluster 0, Core 1
-    0x0, 0x1,
+    0x001,
 
     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
     (EFI_PHYSICAL_ADDRESS)ARM_CTA15A7_SPC_A15_BX_ADDR1,
@@ -39,7 +39,7 @@ ARM_CORE_INFO mVersatileExpressCTA15A7InfoTable[] = {
 #ifndef ARM_BIGLITTLE_TC2
   {
     // Cluster 0, Core 2
-    0x0, 0x2,
+    0x002,
 
     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
     (EFI_PHYSICAL_ADDRESS)ARM_CTA15A7_SPC_A15_BX_ADDR2,
@@ -49,7 +49,7 @@ ARM_CORE_INFO mVersatileExpressCTA15A7InfoTable[] = {
   },
   {
     // Cluster 0, Core 3
-    0x0, 0x3,
+    0x003,
 
     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
     (EFI_PHYSICAL_ADDRESS)ARM_CTA15A7_SPC_A15_BX_ADDR3,
@@ -60,7 +60,7 @@ ARM_CORE_INFO mVersatileExpressCTA15A7InfoTable[] = {
 #endif
   {
     // Cluster 1, Core 0
-    0x1, 0x0,
+    0x100,
 
     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
     (EFI_PHYSICAL_ADDRESS)ARM_CTA15A7_SPC_A7_BX_ADDR0,
@@ -70,7 +70,7 @@ ARM_CORE_INFO mVersatileExpressCTA15A7InfoTable[] = {
   },
   {
     // Cluster 1, Core 1
-    0x1, 0x1,
+    0x101,
 
     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
     (EFI_PHYSICAL_ADDRESS)ARM_CTA15A7_SPC_A7_BX_ADDR1,
@@ -80,7 +80,7 @@ ARM_CORE_INFO mVersatileExpressCTA15A7InfoTable[] = {
   },
   {
     // Cluster 1, Core 2
-    0x1, 0x2,
+    0x102,
 
     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
     (EFI_PHYSICAL_ADDRESS)ARM_CTA15A7_SPC_A7_BX_ADDR2,
@@ -91,7 +91,7 @@ ARM_CORE_INFO mVersatileExpressCTA15A7InfoTable[] = {
 #ifndef ARM_BIGLITTLE_TC2
   ,{
     // Cluster 1, Core 3
-    0x1, 0x3,
+    0x103,
 
     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
     (EFI_PHYSICAL_ADDRESS)ARM_CTA15A7_SPC_A7_BX_ADDR3,
diff --git a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSM.c b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSM.c
index e7a8c1dbbde8..eed1a98324b5 100644
--- a/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSM.c
+++ b/Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSM.c
@@ -31,7 +31,7 @@ ArmGetCpuCountPerCluster (
 ARM_CORE_INFO mVersatileExpressMpCoreInfoTable[] = {
   {
     // Cluster 0, Core 0
-    0x0, 0x0,
+    0x000,
 
     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
@@ -41,7 +41,7 @@ ARM_CORE_INFO mVersatileExpressMpCoreInfoTable[] = {
   },
   {
     // Cluster 0, Core 1
-    0x0, 0x1,
+    0x001,
 
     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
@@ -51,7 +51,7 @@ ARM_CORE_INFO mVersatileExpressMpCoreInfoTable[] = {
   },
   {
     // Cluster 0, Core 2
-    0x0, 0x2,
+    0x002,
 
     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
@@ -61,7 +61,7 @@ ARM_CORE_INFO mVersatileExpressMpCoreInfoTable[] = {
   },
   {
     // Cluster 0, Core 3
-    0x0, 0x3,
+    0x003,
 
     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
@@ -71,7 +71,7 @@ ARM_CORE_INFO mVersatileExpressMpCoreInfoTable[] = {
   },
   {
     // Cluster 1, Core 0
-    0x1, 0x0,
+    0x100,
 
     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
@@ -81,7 +81,7 @@ ARM_CORE_INFO mVersatileExpressMpCoreInfoTable[] = {
   },
   {
     // Cluster 1, Core 1
-    0x1, 0x1,
+    0x101,
 
     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
@@ -91,7 +91,7 @@ ARM_CORE_INFO mVersatileExpressMpCoreInfoTable[] = {
   },
   {
     // Cluster 1, Core 2
-    0x1, 0x2,
+    0x102,
 
     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
@@ -101,7 +101,7 @@ ARM_CORE_INFO mVersatileExpressMpCoreInfoTable[] = {
   },
   {
     // Cluster 1, Core 3
-    0x1, 0x3,
+    0x103,
 
     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
     (EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
-- 
2.31.1

[PATCH v2 06/17] Silicon/Marvell: Update ARM_CORE_INFO initializer for MPIDR field change

[Rebecca Cran]

The ARM_CORE_INFO struct has been updated so the MPIDR is now a single
field instead of separate cluster/core fields. Update the initializer.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
---
 Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.c
index df838ff5ef3f..317fff85be69 100644
--- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.c
+++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.c
@@ -14,7 +14,7 @@
 ARM_CORE_INFO mArmada7k8kMpCoreInfoTable[] = {
   {
     // Cluster 0, Core 0
-    0x0, 0x0,
+    0x000,
 
     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
     (EFI_PHYSICAL_ADDRESS)0,
@@ -24,7 +24,7 @@ ARM_CORE_INFO mArmada7k8kMpCoreInfoTable[] = {
   },
   {
     // Cluster 0, Core 1
-    0x0, 0x1,
+    0x001,
 
     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
     (EFI_PHYSICAL_ADDRESS)0,
@@ -34,7 +34,7 @@ ARM_CORE_INFO mArmada7k8kMpCoreInfoTable[] = {
   },
   {
     // Cluster 0, Core 2
-    0x0, 0x2,
+    0x002,
 
     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
     (EFI_PHYSICAL_ADDRESS)0,
@@ -44,7 +44,7 @@ ARM_CORE_INFO mArmada7k8kMpCoreInfoTable[] = {
   },
   {
     // Cluster 0, Core 3
-    0x0, 0x3,
+    0x003,
 
     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
     (EFI_PHYSICAL_ADDRESS)0,
-- 
2.31.1

[PATCH v2 07/17] Silicon/Socionext: Update ARM_CORE_INFO initializer for MPIDR field change

[Rebecca Cran]

The ARM_CORE_INFO struct has been updated so the MPIDR is now a single
field instead of separate cluster/core fields. Update the initializer.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
---
 Silicon/Socionext/SynQuacer/Library/SynQuacerLib/SynQuacer.c | 48 ++++++++++----------
 1 file changed, 24 insertions(+), 24 deletions(-)

diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerLib/SynQuacer.c b/Silicon/Socionext/SynQuacer/Library/SynQuacerLib/SynQuacer.c
index a6c915b73c15..5ef929fface2 100644
--- a/Silicon/Socionext/SynQuacer/Library/SynQuacerLib/SynQuacer.c
+++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerLib/SynQuacer.c
@@ -13,30 +13,30 @@
 #include <Ppi/ArmMpCoreInfo.h>
 
 STATIC ARM_CORE_INFO mSynQuacerInfoTable[] = {
-  { 0x0, 0x0, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 0, Core 0
-  { 0x0, 0x1, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 0, Core 1
-  { 0x1, 0x0, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 1, Core 0
-  { 0x1, 0x1, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 1, Core 1
-  { 0x2, 0x0, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 2, Core 0
-  { 0x2, 0x1, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 2, Core 1
-  { 0x3, 0x0, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 3, Core 0
-  { 0x3, 0x1, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 3, Core 1
-  { 0x4, 0x0, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 4, Core 0
-  { 0x4, 0x1, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 4, Core 1
-  { 0x5, 0x0, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 5, Core 0
-  { 0x5, 0x1, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 5, Core 1
-  { 0x6, 0x0, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 6, Core 0
-  { 0x6, 0x1, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 6, Core 1
-  { 0x7, 0x0, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 7, Core 0
-  { 0x7, 0x1, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 7, Core 1
-  { 0x8, 0x0, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 8, Core 0
-  { 0x8, 0x1, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 8, Core 1
-  { 0x9, 0x0, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 9, Core 0
-  { 0x9, 0x1, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 9, Core 1
-  { 0xa, 0x0, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 10, Core 0
-  { 0xa, 0x1, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 10, Core 1
-  { 0xb, 0x0, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 11, Core 0
-  { 0xb, 0x1, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 11, Core 1
+  { 0x000, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 0, Core 0
+  { 0x001, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 0, Core 1
+  { 0x100, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 1, Core 0
+  { 0x101, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 1, Core 1
+  { 0x200, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 2, Core 0
+  { 0x201, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 2, Core 1
+  { 0x300, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 3, Core 0
+  { 0x301, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 3, Core 1
+  { 0x400, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 4, Core 0
+  { 0x401, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 4, Core 1
+  { 0x500, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 5, Core 0
+  { 0x501, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 5, Core 1
+  { 0x600, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 6, Core 0
+  { 0x601, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 6, Core 1
+  { 0x700, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 7, Core 0
+  { 0x701, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 7, Core 1
+  { 0x800, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 8, Core 0
+  { 0x801, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 8, Core 1
+  { 0x900, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 9, Core 0
+  { 0x901, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 9, Core 1
+  { 0xa00, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 10, Core 0
+  { 0xa01, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 10, Core 1
+  { 0xb00, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 11, Core 0
+  { 0xb01, 0x0, 0x0, 0x0, (UINT64)0xFFFFFFFF }, // Cluster 11, Core 1
 };
 
 /**
-- 
2.31.1

[PATCH v2 08/17] Silicon/Qemu: Update ARM_CORE_INFO initializer for MPIDR field change

[Rebecca Cran]

The ARM_CORE_INFO struct has been updated so the MPIDR is now a single
field instead of separate cluster/core fields. Update the initializer.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
---
 Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.c b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.c
index fa9047020e6c..411f653913bd 100644
--- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.c
+++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.c
@@ -15,7 +15,7 @@
 ARM_CORE_INFO mArmPlatformNullMpCoreInfoTable[] = {
   {
     // Cluster 0, Core 0
-    0x0, 0x0,
+    0x000,
 
     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
     (EFI_PHYSICAL_ADDRESS)0,
@@ -25,7 +25,7 @@ ARM_CORE_INFO mArmPlatformNullMpCoreInfoTable[] = {
   },
   {
     // Cluster 0, Core 1
-    0x0, 0x1,
+    0x001,
 
     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
     (EFI_PHYSICAL_ADDRESS)0,
@@ -35,7 +35,7 @@ ARM_CORE_INFO mArmPlatformNullMpCoreInfoTable[] = {
   },
   {
     // Cluster 0, Core 2
-    0x0, 0x2,
+    0x002,
 
     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
     (EFI_PHYSICAL_ADDRESS)0,
@@ -45,7 +45,7 @@ ARM_CORE_INFO mArmPlatformNullMpCoreInfoTable[] = {
   },
   {
     // Cluster 0, Core 3
-    0x0, 0x3,
+    0x003,
 
     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
     (EFI_PHYSICAL_ADDRESS)0,
-- 
2.31.1

Re: [PATCH v2 08/17] Silicon/Qemu: Update ARM_CORE_INFO initializer for MPIDR field change

[Graeme Gregory]

On Thu, Dec 16, 2021 at 03:07:51PM -0700, Rebecca Cran wrote:
> The ARM_CORE_INFO struct has been updated so the MPIDR is now a single
> field instead of separate cluster/core fields. Update the initializer.
> 
> Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>

Looks sane to me

Reviewed-by: Graeme Gregory <quic_ggregory@quicinc.com>

> ---
>  Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.c b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.c
> index fa9047020e6c..411f653913bd 100644
> --- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.c
> +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.c
> @@ -15,7 +15,7 @@
>  ARM_CORE_INFO mArmPlatformNullMpCoreInfoTable[] = {
>    {
>      // Cluster 0, Core 0
> -    0x0, 0x0,
> +    0x000,
>  
>      // MP Core MailBox Set/Get/Clear Addresses and Clear Value
>      (EFI_PHYSICAL_ADDRESS)0,
> @@ -25,7 +25,7 @@ ARM_CORE_INFO mArmPlatformNullMpCoreInfoTable[] = {
>    },
>    {
>      // Cluster 0, Core 1
> -    0x0, 0x1,
> +    0x001,
>  
>      // MP Core MailBox Set/Get/Clear Addresses and Clear Value
>      (EFI_PHYSICAL_ADDRESS)0,
> @@ -35,7 +35,7 @@ ARM_CORE_INFO mArmPlatformNullMpCoreInfoTable[] = {
>    },
>    {
>      // Cluster 0, Core 2
> -    0x0, 0x2,
> +    0x002,
>  
>      // MP Core MailBox Set/Get/Clear Addresses and Clear Value
>      (EFI_PHYSICAL_ADDRESS)0,
> @@ -45,7 +45,7 @@ ARM_CORE_INFO mArmPlatformNullMpCoreInfoTable[] = {
>    },
>    {
>      // Cluster 0, Core 3
> -    0x0, 0x3,
> +    0x003,
>  
>      // MP Core MailBox Set/Get/Clear Addresses and Clear Value
>      (EFI_PHYSICAL_ADDRESS)0,
> -- 
> 2.31.1
> 

[PATCH v2 09/17] Platform/AMD: Add instance of MpInitLib to OverdriveBoard.dsc

[Rebecca Cran]

MpInitLib is now required for all users of ArmPkg/Drivers/CpuDxe. Add
ArmPkg/Library/MpInitLib/DxeMpInitLib.inf .

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
---
 Platform/AMD/OverdriveBoard/OverdriveBoard.dsc | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc b/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
index af207391209c..a57369e0f136 100644
--- a/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
+++ b/Platform/AMD/OverdriveBoard/OverdriveBoard.dsc
@@ -210,6 +210,7 @@ DEFINE X64EMU_ENABLE  = FALSE
   MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
   NonDiscoverableDeviceRegistrationLib|MdeModulePkg/Library/NonDiscoverableDeviceRegistrationLib/NonDiscoverableDeviceRegistrationLib.inf
   VariablePolicyHelperLib|MdeModulePkg/Library/VariablePolicyHelperLib/VariablePolicyHelperLib.inf
+  MpInitLib|ArmPkg/Library/MpInitLib/DxeMpInitLib.inf
 
 [LibraryClasses.common.DXE_RUNTIME_DRIVER]
   HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
-- 
2.31.1

[PATCH v2 10/17] Platform/SoftIron: Add instance of MpInitLib to Overdrive1000Board.dsc

[Rebecca Cran]

MpInitLib is now required for all users of ArmPkg/Drivers/CpuDxe. Add
ArmPkg/Library/MpInitLib/DxeMpInitLib.inf .

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
---
 Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc b/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc
index 57b9e9f38121..f817391b82be 100644
--- a/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc
+++ b/Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc
@@ -204,6 +204,7 @@ DEFINE NUM_CORES    = 4
   MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
   NonDiscoverableDeviceRegistrationLib|MdeModulePkg/Library/NonDiscoverableDeviceRegistrationLib/NonDiscoverableDeviceRegistrationLib.inf
   VariablePolicyHelperLib|MdeModulePkg/Library/VariablePolicyHelperLib/VariablePolicyHelperLib.inf
+  MpInitLib|ArmPkg/Library/MpInitLib/DxeMpInitLib.inf
 
 [LibraryClasses.common.DXE_RUNTIME_DRIVER]
   HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
-- 
2.31.1

[PATCH v2 11/17] Platform/RaspberryPi: Add instance of MpInitLib to RPi3.dsc and RPi4.dsc

[Rebecca Cran]

MpInitLib is now required for all users of ArmPkg/Drivers/CpuDxe. Add
ArmPkg/Library/MpInitLib/DxeMpInitLib.inf .

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
---
 Platform/RaspberryPi/RPi3/RPi3.dsc | 1 +
 Platform/RaspberryPi/RPi4/RPi4.dsc | 1 +
 2 files changed, 2 insertions(+)

diff --git a/Platform/RaspberryPi/RPi3/RPi3.dsc b/Platform/RaspberryPi/RPi3/RPi3.dsc
index 6ab5d1ae6d4d..d39491c63bd2 100644
--- a/Platform/RaspberryPi/RPi3/RPi3.dsc
+++ b/Platform/RaspberryPi/RPi3/RPi3.dsc
@@ -201,6 +201,7 @@
   SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf
   PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
   MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+  MpInitLib|ArmPkg/Library/MpInitLib/DxeMpInitLib.inf
 !if $(INCLUDE_TFTP_COMMAND) == TRUE
   ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf
   FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf
diff --git a/Platform/RaspberryPi/RPi4/RPi4.dsc b/Platform/RaspberryPi/RPi4/RPi4.dsc
index 44ed60ab2f68..054607258e18 100644
--- a/Platform/RaspberryPi/RPi4/RPi4.dsc
+++ b/Platform/RaspberryPi/RPi4/RPi4.dsc
@@ -209,6 +209,7 @@
   SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf
   PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
   MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+  MpInitLib|ArmPkg/Library/MpInitLib/DxeMpInitLib.inf
 !if $(INCLUDE_TFTP_COMMAND) == TRUE
   ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf
   FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf
-- 
2.31.1

[PATCH v2 12/17] Silicon/AMD: Update Styx code to work with changes ARM_CORE_INFO struct

[Rebecca Cran]

The ARM_CORE_INFO struct has been updated so the MPIDR is now a single
field instead of separate cluster/core fields. Update the Styx code in
AcpiPlatformDxe, PlatInitPei and StyxDtbLoaderLib.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
---
 Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatform.c      |  3 +--
 Silicon/AMD/Styx/Drivers/PlatInitPei/PlatInitPei.c           |  8 +++----
 Silicon/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c | 22 +++++++++-----------
 3 files changed, 15 insertions(+), 18 deletions(-)

diff --git a/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatform.c b/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatform.c
index 7c267542db19..5f059110ff0c 100644
--- a/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatform.c
+++ b/Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatform.c
@@ -100,8 +100,7 @@ EnableAvailableCores (
 
   while (CoreCount--) {
     for (Index = 0; Index < MAX_CORES; Index++) {
-      if (GicC[Index].MPIDR == GET_MPID (ArmCoreInfoTable->ClusterId,
-                                         ArmCoreInfoTable->CoreId)) {
+      if (GicC[Index].MPIDR == ArmCoreInfoTable->Mpidr) {
         GicC[Index].Flags |= EFI_ACPI_5_1_GIC_ENABLED;
         break;
       }
diff --git a/Silicon/AMD/Styx/Drivers/PlatInitPei/PlatInitPei.c b/Silicon/AMD/Styx/Drivers/PlatInitPei/PlatInitPei.c
index 3f359ffbd2d8..45490aa33c5a 100644
--- a/Silicon/AMD/Styx/Drivers/PlatInitPei/PlatInitPei.c
+++ b/Silicon/AMD/Styx/Drivers/PlatInitPei/PlatInitPei.c
@@ -166,12 +166,12 @@ PlatInitPeiEntryPoint (
       ASSERT (CpuResetInfo.CoreStatus.Status != CPU_CORE_DISABLED);
       ASSERT (CpuResetInfo.CoreStatus.Status != CPU_CORE_UNDEFINED);
 
-      mAmdMpCoreInfoTable[Index].ClusterId = CpuResetInfo.CoreStatus.ClusterId;
-      mAmdMpCoreInfoTable[Index].CoreId = CpuResetInfo.CoreStatus.CoreId;
+      mAmdMpCoreInfoTable[Index].Mpidr = GET_MPID (CpuResetInfo.CoreStatus.ClusterId,
+		                           CpuResetInfo.CoreStatus.CoreId);
 
       DEBUG ((EFI_D_ERROR, "Core[%d]: ClusterId = %d   CoreId = %d\n",
-        Index, mAmdMpCoreInfoTable[Index].ClusterId,
-        mAmdMpCoreInfoTable[Index].CoreId));
+        Index, GET_MPIDR_AFF1 (mAmdMpCoreInfoTable[Index].Mpidr),
+        GET_MPIDR_AFF0 (mAmdMpCoreInfoTable[Index].Mpidr)));
 
       // Next core in Table
       ++Index;
diff --git a/Silicon/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c b/Silicon/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c
index 75e529021d09..178fb5698504 100644
--- a/Silicon/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c
+++ b/Silicon/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c
@@ -50,7 +50,7 @@ ClusterInRange (
   )
 {
   do {
-    if (ClusterId == ArmCoreInfoTable[LowIndex].ClusterId)
+    if (ClusterId == GET_MPIDR_AFF1 (ArmCoreInfoTable[LowIndex].Mpidr))
       return TRUE;
   } while (++LowIndex <= HighIndex);
 
@@ -70,7 +70,7 @@ NumberOfCoresInCluster (
 
   Cores = 0;
   for (Index = 0; Index < NumberOfEntries; ++Index) {
-    if (ClusterId == ArmCoreInfoTable[Index].ClusterId)
+    if (ClusterId == GET_MPIDR_AFF1 (ArmCoreInfoTable[Index].Mpidr))
       ++Cores;
   }
 
@@ -92,7 +92,7 @@ NumberOfClustersInTable (
   Cores = NumberOfEntries;
   while (Cores) {
      ++Clusters;
-     ClusterId = ArmCoreInfoTable[Index].ClusterId;
+     ClusterId = GET_MPIDR_AFF1 (ArmCoreInfoTable[Index].Mpidr);
      Cores -= NumberOfCoresInCluster (ArmCoreInfoTable,
                                       NumberOfEntries,
                                       ClusterId);
@@ -100,7 +100,7 @@ NumberOfClustersInTable (
        do {
          ++Index;
        } while (ClusterInRange (ArmCoreInfoTable,
-                                ArmCoreInfoTable[Index].ClusterId,
+                                GET_MPIDR_AFF1 (ArmCoreInfoTable[Index].Mpidr),
                                 0, Index-1));
      }
   }
@@ -402,8 +402,7 @@ PrepareFdt (
 
     fdt_setprop_string (Fdt, CpuNode, "enable-method", "psci");
 
-    MpId = (UINTN)GET_MPID (ArmCoreInfoTable[Index].ClusterId,
-                            ArmCoreInfoTable[Index].CoreId);
+    MpId = ArmCoreInfoTable[Index].Mpidr;
     MpId = cpu_to_fdt64 (MpId);
     fdt_setprop (Fdt, CpuNode, "reg", &MpId, sizeof (MpId));
     fdt_setprop (Fdt, CpuNode, "compatible", mCpuCompatible,
@@ -417,7 +416,7 @@ PrepareFdt (
     fdt_setprop_cell (Fdt, CpuNode, "d-cache-line-size", 64);
     fdt_setprop_cell (Fdt, CpuNode, "d-cache-sets", 256);
     fdt_setprop_cell (Fdt, CpuNode, "l2-cache",
-      L2Phandle[ArmCoreInfoTable[Index].ClusterId]);
+      L2Phandle[GET_MPIDR_AFF1 (ArmCoreInfoTable[Index].Mpidr)]);
   }
 
   // Create /cpu-map node
@@ -435,7 +434,7 @@ PrepareFdt (
         return EFI_INVALID_PARAMETER;
       }
 
-      ClusterId = ArmCoreInfoTable[ClusterIndex].ClusterId;
+      ClusterId = GET_MPIDR_AFF1 (ArmCoreInfoTable[ClusterIndex].Mpidr);
       CoreIndex = ClusterIndex;
       CoresInCluster = NumberOfCoresInCluster (ArmCoreInfoTable,
                                                ArmCoreCount,
@@ -454,7 +453,7 @@ PrepareFdt (
         if (CoresInCluster) {
           do {
              --CoreIndex;
-          } while (ClusterId != ArmCoreInfoTable[CoreIndex].ClusterId);
+          } while (ClusterId != GET_MPIDR_AFF1 (ArmCoreInfoTable[CoreIndex].Mpidr));
         }
       }
 
@@ -463,7 +462,7 @@ PrepareFdt (
         do {
            --ClusterIndex;
         } while (ClusterInRange (ArmCoreInfoTable,
-                                 ArmCoreInfoTable[ClusterIndex].ClusterId,
+                                 GET_MPIDR_AFF1 (ArmCoreInfoTable[ClusterIndex].Mpidr),
                                  ClusterIndex + 1,
                                  ArmCoreCount - 1));
       }
@@ -481,8 +480,7 @@ PrepareFdt (
 
     // append PMU interrupts
     for (Index = 0; Index < ArmCoreCount; Index++) {
-      MpId = (UINTN)GET_MPID (ArmCoreInfoTable[Index].ClusterId,
-                              ArmCoreInfoTable[Index].CoreId);
+      MpId = (UINTN)ArmCoreInfoTable[Index].Mpidr;
 
       Status = AmdMpCoreInfoProtocol->GetPmuSpiFromMpId (MpId, &PmuInt.IntId);
       if (EFI_ERROR (Status)) {
-- 
2.31.1

[PATCH v2 13/17] Silicon/Ampere: Add instance of MpInitLib to AmpereAltraPkg.dsc

[Rebecca Cran]

MpInitLib is now required for all users of ArmPkg/Drivers/CpuDxe. Add
ArmPkg/Library/MpInitLib/DxeMpInitLib.inf .

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
---
 Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc b/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc
index 99e00f82aac8..00b378ab6acd 100644
--- a/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc
+++ b/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc
@@ -223,6 +223,7 @@
   SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf
   PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
   MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+  MpInitLib|ArmPkg/Library/MpInitLib/DxeMpInitLib.inf
 
 [LibraryClasses.common.UEFI_APPLICATION]
   UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiTianoCustomDecompressLib.inf
-- 
2.31.1

[PATCH v2 14/17] Silicon/Ampere: Update ArmPlatformLib to work with changed ARM_CORE_INFO

[Rebecca Cran]

The ARM_CORE_INFO struct has been updated so the MPIDR is now a single
field instead of separate cluster/core fields. Update ArmPlatformLib.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
---
 Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c b/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c
index 5b4be0e55516..f2ec923d6f8d 100644
--- a/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c
+++ b/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c
@@ -108,9 +108,8 @@ PrePeiCoreGetMpCoreInfo (
     }
     SocketId = SOCKET_ID (Index);
     ClusterId = CLUSTER_ID (Index);
-    mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].ClusterId = SocketId;
-    mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].CoreId =
-      (ClusterId << 8) | (Index % PLATFORM_CPU_NUM_CORES_PER_CPM);
+    mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].Mpidr = GET_MPID (
+      SocketId, (ClusterId << 8) | (Index % PLATFORM_CPU_NUM_CORES_PER_CPM));
     mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].MailboxClearAddress = 0;
     mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].MailboxClearValue = 0;
     mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].MailboxGetAddress = 0;
-- 
2.31.1

Re: [PATCH v2 14/17] Silicon/Ampere: Update ArmPlatformLib to work with changed ARM_CORE_INFO

[Nhi Pham]

Hi Rebecca,

Leif is merging the rest of Altra port to the edk2-platforms which has 
SRAT ACPI table consuming the CPU Core Info table. Therefore, we will 
need to fix the SRAT too. I would defer the fix until the Altra port is 
fully merged.

On 17/12/2021 05:07, Rebecca Cran wrote:
> The ARM_CORE_INFO struct has been updated so the MPIDR is now a single
> field instead of separate cluster/core fields. Update ArmPlatformLib.
>
> Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
> ---
>   Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c | 5 ++---
>   1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c b/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c
> index 5b4be0e55516..f2ec923d6f8d 100644
> --- a/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c
> +++ b/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c
> @@ -108,9 +108,8 @@ PrePeiCoreGetMpCoreInfo (
>       }
>       SocketId = SOCKET_ID (Index);
>       ClusterId = CLUSTER_ID (Index);
> -    mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].ClusterId = SocketId;
> -    mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].CoreId =
> -      (ClusterId << 8) | (Index % PLATFORM_CPU_NUM_CORES_PER_CPM);
> +    mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].Mpidr = GET_MPID (
> +      SocketId, (ClusterId << 8) | (Index % PLATFORM_CPU_NUM_CORES_PER_CPM));

For Ampere Altra, the correct MPIDR encoding is SocketId << 32 | 
ClusterId << 16 | (Index % PLATFORM_CPU_NUM_CORES_PER_CPM) << 8

It would be the same what 
Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiMadt.c (not 
available yet - being merged in) is describing.

Best regards,

Nhi

>       mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].MailboxClearAddress = 0;
>       mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].MailboxClearValue = 0;
>       mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].MailboxGetAddress = 0;

Re: [PATCH v2 14/17] Silicon/Ampere: Update ArmPlatformLib to work with changed ARM_CORE_INFO

[Ard Biesheuvel]

On Sun, 19 Dec 2021 at 04:36, Nhi Pham <nhi@os.amperecomputing.com> wrote:
>
> Hi Rebecca,
>
> Leif is merging the rest of Altra port to the edk2-platforms which has
> SRAT ACPI table consuming the CPU Core Info table. Therefore, we will
> need to fix the SRAT too. I would defer the fix until the Altra port is
> fully merged.
>

This seems to be stalled so to make progress, I am going to merge this.

> On 17/12/2021 05:07, Rebecca Cran wrote:
> > The ARM_CORE_INFO struct has been updated so the MPIDR is now a single
> > field instead of separate cluster/core fields. Update ArmPlatformLib.
> >
> > Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
> > ---
> >   Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c | 5 ++---
> >   1 file changed, 2 insertions(+), 3 deletions(-)
> >
> > diff --git a/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c b/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c
> > index 5b4be0e55516..f2ec923d6f8d 100644
> > --- a/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c
> > +++ b/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c
> > @@ -108,9 +108,8 @@ PrePeiCoreGetMpCoreInfo (
> >       }
> >       SocketId = SOCKET_ID (Index);
> >       ClusterId = CLUSTER_ID (Index);
> > -    mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].ClusterId = SocketId;
> > -    mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].CoreId =
> > -      (ClusterId << 8) | (Index % PLATFORM_CPU_NUM_CORES_PER_CPM);
> > +    mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].Mpidr = GET_MPID (
> > +      SocketId, (ClusterId << 8) | (Index % PLATFORM_CPU_NUM_CORES_PER_CPM));
>
> For Ampere Altra, the correct MPIDR encoding is SocketId << 32 |
> ClusterId << 16 | (Index % PLATFORM_CPU_NUM_CORES_PER_CPM) << 8
>
> It would be the same what
> Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiMadt.c (not
> available yet - being merged in) is describing.
>

Feel free to follow up with a patch that changes this into the correct
representation, but this patch does not make it less correct than it
already is; it just stores the socket ID in the cluster ID field in a
different way.

Re: [PATCH v2 14/17] Silicon/Ampere: Update ArmPlatformLib to work with changed ARM_CORE_INFO

[Leif Lindholm]

On Sun, Jan 30, 2022 at 11:36:51 +0100, Ard Biesheuvel wrote:
> On Sun, 19 Dec 2021 at 04:36, Nhi Pham <nhi@os.amperecomputing.com> wrote:
> >
> > Hi Rebecca,
> >
> > Leif is merging the rest of Altra port to the edk2-platforms which has
> > SRAT ACPI table consuming the CPU Core Info table. Therefore, we will
> > need to fix the SRAT too. I would defer the fix until the Altra port is
> > fully merged.
> >
> 
> This seems to be stalled so to make progress, I am going to merge this.

Thanks, that was the right call.

Apologies for radio silence, catching up on backlog (including
remainder of Altra port) now.

/
    Leif

> > On 17/12/2021 05:07, Rebecca Cran wrote:
> > > The ARM_CORE_INFO struct has been updated so the MPIDR is now a single
> > > field instead of separate cluster/core fields. Update ArmPlatformLib.
> > >
> > > Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
> > > ---
> > >   Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c | 5 ++---
> > >   1 file changed, 2 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c b/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c
> > > index 5b4be0e55516..f2ec923d6f8d 100644
> > > --- a/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c
> > > +++ b/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c
> > > @@ -108,9 +108,8 @@ PrePeiCoreGetMpCoreInfo (
> > >       }
> > >       SocketId = SOCKET_ID (Index);
> > >       ClusterId = CLUSTER_ID (Index);
> > > -    mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].ClusterId = SocketId;
> > > -    mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].CoreId =
> > > -      (ClusterId << 8) | (Index % PLATFORM_CPU_NUM_CORES_PER_CPM);
> > > +    mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].Mpidr = GET_MPID (
> > > +      SocketId, (ClusterId << 8) | (Index % PLATFORM_CPU_NUM_CORES_PER_CPM));
> >
> > For Ampere Altra, the correct MPIDR encoding is SocketId << 32 |
> > ClusterId << 16 | (Index % PLATFORM_CPU_NUM_CORES_PER_CPM) << 8
> >
> > It would be the same what
> > Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiMadt.c (not
> > available yet - being merged in) is describing.
> >
> 
> Feel free to follow up with a patch that changes this into the correct
> representation, but this patch does not make it less correct than it
> already is; it just stores the socket ID in the cluster ID field in a
> different way.

Re: [PATCH v2 14/17] Silicon/Ampere: Update ArmPlatformLib to work with changed ARM_CORE_INFO

[Nhi Pham]

On 31/01/2022 19:08, Leif Lindholm wrote:
> On Sun, Jan 30, 2022 at 11:36:51 +0100, Ard Biesheuvel wrote:
>> On Sun, 19 Dec 2021 at 04:36, Nhi Pham <nhi@os.amperecomputing.com> wrote:
>>> Hi Rebecca,
>>>
>>> Leif is merging the rest of Altra port to the edk2-platforms which has
>>> SRAT ACPI table consuming the CPU Core Info table. Therefore, we will
>>> need to fix the SRAT too. I would defer the fix until the Altra port is
>>> fully merged.
>>>
>> This seems to be stalled so to make progress, I am going to merge this.
> Thanks, that was the right call.
>
> Apologies for radio silence, catching up on backlog (including
> remainder of Altra port) now.

Thanks much, Leif.

-Nhi

>
> /
>      Leif
>
>>> On 17/12/2021 05:07, Rebecca Cran wrote:
>>>> The ARM_CORE_INFO struct has been updated so the MPIDR is now a single
>>>> field instead of separate cluster/core fields. Update ArmPlatformLib.
>>>>
>>>> Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
>>>> ---
>>>>    Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c | 5 ++---
>>>>    1 file changed, 2 insertions(+), 3 deletions(-)
>>>>
>>>> diff --git a/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c b/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c
>>>> index 5b4be0e55516..f2ec923d6f8d 100644
>>>> --- a/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c
>>>> +++ b/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c
>>>> @@ -108,9 +108,8 @@ PrePeiCoreGetMpCoreInfo (
>>>>        }
>>>>        SocketId = SOCKET_ID (Index);
>>>>        ClusterId = CLUSTER_ID (Index);
>>>> -    mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].ClusterId = SocketId;
>>>> -    mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].CoreId =
>>>> -      (ClusterId << 8) | (Index % PLATFORM_CPU_NUM_CORES_PER_CPM);
>>>> +    mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].Mpidr = GET_MPID (
>>>> +      SocketId, (ClusterId << 8) | (Index % PLATFORM_CPU_NUM_CORES_PER_CPM));
>>> For Ampere Altra, the correct MPIDR encoding is SocketId << 32 |
>>> ClusterId << 16 | (Index % PLATFORM_CPU_NUM_CORES_PER_CPM) << 8
>>>
>>> It would be the same what
>>> Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiMadt.c (not
>>> available yet - being merged in) is describing.
>>>
>> Feel free to follow up with a patch that changes this into the correct
>> representation, but this patch does not make it less correct than it
>> already is; it just stores the socket ID in the cluster ID field in a
>> different way.

Re: [PATCH v2 14/17] Silicon/Ampere: Update ArmPlatformLib to work with changed ARM_CORE_INFO

[Nhi Pham]

On 30/01/2022 17:36, Ard Biesheuvel wrote:
> On Sun, 19 Dec 2021 at 04:36, Nhi Pham <nhi@os.amperecomputing.com> wrote:
>> Hi Rebecca,
>>
>> Leif is merging the rest of Altra port to the edk2-platforms which has
>> SRAT ACPI table consuming the CPU Core Info table. Therefore, we will
>> need to fix the SRAT too. I would defer the fix until the Altra port is
>> fully merged.
>>
> This seems to be stalled so to make progress, I am going to merge this.
>
>> On 17/12/2021 05:07, Rebecca Cran wrote:
>>> The ARM_CORE_INFO struct has been updated so the MPIDR is now a single
>>> field instead of separate cluster/core fields. Update ArmPlatformLib.
>>>
>>> Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
>>> ---
>>>    Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c | 5 ++---
>>>    1 file changed, 2 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c b/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c
>>> index 5b4be0e55516..f2ec923d6f8d 100644
>>> --- a/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c
>>> +++ b/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c
>>> @@ -108,9 +108,8 @@ PrePeiCoreGetMpCoreInfo (
>>>        }
>>>        SocketId = SOCKET_ID (Index);
>>>        ClusterId = CLUSTER_ID (Index);
>>> -    mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].ClusterId = SocketId;
>>> -    mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].CoreId =
>>> -      (ClusterId << 8) | (Index % PLATFORM_CPU_NUM_CORES_PER_CPM);
>>> +    mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].Mpidr = GET_MPID (
>>> +      SocketId, (ClusterId << 8) | (Index % PLATFORM_CPU_NUM_CORES_PER_CPM));
>> For Ampere Altra, the correct MPIDR encoding is SocketId << 32 |
>> ClusterId << 16 | (Index % PLATFORM_CPU_NUM_CORES_PER_CPM) << 8
>>
>> It would be the same what
>> Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiMadt.c (not
>> available yet - being merged in) is describing.
>>
> Feel free to follow up with a patch that changes this into the correct
> representation, but this patch does not make it less correct than it
> already is; it just stores the socket ID in the cluster ID field in a
> different way.

Thanks Ard. That's OK.

Best regards,

Nhi

Re: [edk2-devel] [PATCH v2 14/17] Silicon/Ampere: Update ArmPlatformLib to work with changed ARM_CORE_INFO

[Leif Lindholm]

Hi Nhi,

On Sun, Dec 19, 2021 at 10:35:41 +0700, Nhi Pham via groups.io wrote:
> Hi Rebecca,
> 
> Leif is merging the rest of Altra port to the edk2-platforms which has SRAT
> ACPI table consuming the CPU Core Info table. Therefore, we will need to fix
> the SRAT too. I would defer the fix until the Altra port is fully merged.
> 
> On 17/12/2021 05:07, Rebecca Cran wrote:
> > The ARM_CORE_INFO struct has been updated so the MPIDR is now a single
> > field instead of separate cluster/core fields. Update ArmPlatformLib.
> > 
> > Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
> > ---
> >   Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c | 5 ++---
> >   1 file changed, 2 insertions(+), 3 deletions(-)
> > 
> > diff --git a/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c b/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c
> > index 5b4be0e55516..f2ec923d6f8d 100644
> > --- a/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c
> > +++ b/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c
> > @@ -108,9 +108,8 @@ PrePeiCoreGetMpCoreInfo (
> >       }
> >       SocketId = SOCKET_ID (Index);
> >       ClusterId = CLUSTER_ID (Index);
> > -    mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].ClusterId = SocketId;
> > -    mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].CoreId =
> > -      (ClusterId << 8) | (Index % PLATFORM_CPU_NUM_CORES_PER_CPM);
> > +    mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].Mpidr = GET_MPID (
> > +      SocketId, (ClusterId << 8) | (Index % PLATFORM_CPU_NUM_CORES_PER_CPM));
> 
> For Ampere Altra, the correct MPIDR encoding is SocketId << 32 | ClusterId
> << 16 | (Index % PLATFORM_CPU_NUM_CORES_PER_CPM) << 8
> 
> It would be the same what
> Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiMadt.c (not available
> yet - being merged in) is describing.

This patch already got merged, so if you feel it is wrong, could you
submit a fix please?

The next patch for me to push from your set otherwise also requires
some changes. My naïve attempt would look something like:

diff --git a/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiSrat.c b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiSrat.c
index 906b771a250c..d5bc732b08bb 100644
--- a/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiSrat.c
+++ b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiSrat.c
@@ -7,6 +7,7 @@
 **/
 
 #include <Guid/ArmMpCoreInfo.h>
+#include <Library/ArmLib.h>
 #include "AcpiPlatform.h"
 
 EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER SRATTableHeaderTemplate = {
@@ -119,6 +120,7 @@ SratAddGiccAffinity (
   UINTN               Count, NumNode, Idx;
   UINT32              AcpiProcessorUid;
   UINT8               Socket;
+  UINT8               Core;
   UINT8               Cpm;
 
   for (Idx = 0; Idx < gST->NumberOfTableEntries; Idx++) {
@@ -137,14 +139,14 @@ SratAddGiccAffinity (
   NumNode = 0;
   while (Count != ArmProcessorTable->NumberOfEntries) {
     for (Idx = 0; Idx < ArmProcessorTable->NumberOfEntries; Idx++ ) {
-      Socket = ArmCoreInfoTable[Idx].ClusterId;
-      Cpm = (ArmCoreInfoTable[Idx].CoreId >> PLATFORM_CPM_UID_BIT_OFFSET);
+      Socket = GET_MPIDR_AFF1 (ArmCoreInfoTable[Idx].Mpidr);
+      Core   = GET_MPIDR_AFF0 (ArmCoreInfoTable[Idx].Mpidr);
+      Cpm = Core >> PLATFORM_CPM_UID_BIT_OFFSET;
       if (CpuGetSubNumNode (Socket, Cpm) != NumNode) {
         /* We add nodes based on ProximityDomain order */
         continue;
       }
-      AcpiProcessorUid = (ArmCoreInfoTable[Idx].ClusterId << PLATFORM_SOCKET_UID_BIT_OFFSET) +
-                         ArmCoreInfoTable[Idx].CoreId;
+      AcpiProcessorUid = (Socket << PLATFORM_SOCKET_UID_BIT_OFFSET) + Core;
       ZeroMem ((VOID *)&SratGiccAffinity[Count], sizeof (SratGiccAffinity[Count]));
       SratGiccAffinity[Count].AcpiProcessorUid = AcpiProcessorUid;
       SratGiccAffinity[Count].Flags = 1;

Would you be happy for me to fold that into
"AmpereAltraPkg, JadePkg: Add ACPI support", or would you be able to
submit a v6 of that patch only?

Best Regards,

Leif

Re: [edk2-devel] [PATCH v2 14/17] Silicon/Ampere: Update ArmPlatformLib to work with changed ARM_CORE_INFO

[Nhi Pham]

Hi Leif,

On 25/03/2022 23:30, Leif Lindholm wrote:
> Hi Nhi,
>
> On Sun, Dec 19, 2021 at 10:35:41 +0700, Nhi Pham via groups.io wrote:
>> Hi Rebecca,
>>
>> Leif is merging the rest of Altra port to the edk2-platforms which has SRAT
>> ACPI table consuming the CPU Core Info table. Therefore, we will need to fix
>> the SRAT too. I would defer the fix until the Altra port is fully merged.
>>
>> On 17/12/2021 05:07, Rebecca Cran wrote:
>>> The ARM_CORE_INFO struct has been updated so the MPIDR is now a single
>>> field instead of separate cluster/core fields. Update ArmPlatformLib.
>>>
>>> Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
>>> ---
>>>    Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c | 5 ++---
>>>    1 file changed, 2 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c b/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c
>>> index 5b4be0e55516..f2ec923d6f8d 100644
>>> --- a/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c
>>> +++ b/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c
>>> @@ -108,9 +108,8 @@ PrePeiCoreGetMpCoreInfo (
>>>        }
>>>        SocketId = SOCKET_ID (Index);
>>>        ClusterId = CLUSTER_ID (Index);
>>> -    mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].ClusterId = SocketId;
>>> -    mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].CoreId =
>>> -      (ClusterId << 8) | (Index % PLATFORM_CPU_NUM_CORES_PER_CPM);
>>> +    mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].Mpidr = GET_MPID (
>>> +      SocketId, (ClusterId << 8) | (Index % PLATFORM_CPU_NUM_CORES_PER_CPM));
>> For Ampere Altra, the correct MPIDR encoding is SocketId << 32 | ClusterId
>> << 16 | (Index % PLATFORM_CPU_NUM_CORES_PER_CPM) << 8
>>
>> It would be the same what
>> Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiMadt.c (not available
>> yet - being merged in) is describing.
> This patch already got merged, so if you feel it is wrong, could you
> submit a fix please?
>
> The next patch for me to push from your set otherwise also requires
> some changes. My naïve attempt would look something like:
>
> diff --git a/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiSrat.c b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiSrat.c
> index 906b771a250c..d5bc732b08bb 100644
> --- a/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiSrat.c
> +++ b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiSrat.c
> @@ -7,6 +7,7 @@
>   **/
>   
>   #include <Guid/ArmMpCoreInfo.h>
> +#include <Library/ArmLib.h>
>   #include "AcpiPlatform.h"
>   
>   EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER SRATTableHeaderTemplate = {
> @@ -119,6 +120,7 @@ SratAddGiccAffinity (
>     UINTN               Count, NumNode, Idx;
>     UINT32              AcpiProcessorUid;
>     UINT8               Socket;
> +  UINT8               Core;
>     UINT8               Cpm;
>   
>     for (Idx = 0; Idx < gST->NumberOfTableEntries; Idx++) {
> @@ -137,14 +139,14 @@ SratAddGiccAffinity (
>     NumNode = 0;
>     while (Count != ArmProcessorTable->NumberOfEntries) {
>       for (Idx = 0; Idx < ArmProcessorTable->NumberOfEntries; Idx++ ) {
> -      Socket = ArmCoreInfoTable[Idx].ClusterId;
> -      Cpm = (ArmCoreInfoTable[Idx].CoreId >> PLATFORM_CPM_UID_BIT_OFFSET);
> +      Socket = GET_MPIDR_AFF1 (ArmCoreInfoTable[Idx].Mpidr);
> +      Core   = GET_MPIDR_AFF0 (ArmCoreInfoTable[Idx].Mpidr);
> +      Cpm = Core >> PLATFORM_CPM_UID_BIT_OFFSET;
>         if (CpuGetSubNumNode (Socket, Cpm) != NumNode) {
>           /* We add nodes based on ProximityDomain order */
>           continue;
>         }
> -      AcpiProcessorUid = (ArmCoreInfoTable[Idx].ClusterId << PLATFORM_SOCKET_UID_BIT_OFFSET) +
> -                         ArmCoreInfoTable[Idx].CoreId;
> +      AcpiProcessorUid = (Socket << PLATFORM_SOCKET_UID_BIT_OFFSET) + Core;
>         ZeroMem ((VOID *)&SratGiccAffinity[Count], sizeof (SratGiccAffinity[Count]));
>         SratGiccAffinity[Count].AcpiProcessorUid = AcpiProcessorUid;
>         SratGiccAffinity[Count].Flags = 1;
>
> Would you be happy for me to fold that into
> "AmpereAltraPkg, JadePkg: Add ACPI support", or would you be able to
> submit a v6 of that patch only?
>
> Best Regards,
>
> Leif

Thanks much for the patch. The MPIDR decoding matches with Rebecca's 
update for the ArmPlatformLib earlier and the ARM_CORE_INFO is just 
consumed in the AcpiSrat.c. So, that is good for now. Please help fold 
that into the ACPI patch when merging the rest of the Mt. Jade support 
patchset.

In the future, I will follow up with a patch that makes the 
representation of MPIDR in the ARM_CORE_INFO the same as in MADT table.

Thanks,

Nhi

Re: [edk2-devel] [PATCH v2 14/17] Silicon/Ampere: Update ArmPlatformLib to work with changed ARM_CORE_INFO

[Leif Lindholm]

On Sat, Mar 26, 2022 at 16:12:07 +0700, Nhi Pham via groups.io wrote:
> > Would you be happy for me to fold that into
> > "AmpereAltraPkg, JadePkg: Add ACPI support", or would you be able to
> > submit a v6 of that patch only?
> > 
> > Best Regards,
> > 
> > Leif
> 
> Thanks much for the patch. The MPIDR decoding matches with Rebecca's update
> for the ArmPlatformLib earlier and the ARM_CORE_INFO is just consumed in the
> AcpiSrat.c. So, that is good for now. Please help fold that into the ACPI
> patch when merging the rest of the Mt. Jade support patchset.

Done. I just pushed up to and including patch 29 as
41628dcf3332..e18e208e7105.

(I will take a look at patch 30 on Monday, but I couldn't find that I
had signed off on it anywhere.)

Apologies for the delay in getting this merged.

> In the future, I will follow up with a patch that makes the representation
> of MPIDR in the ARM_CORE_INFO the same as in MADT table.

That sounds ideal, thanks.

Best Regards,

Leif

Re: [edk2-devel] [PATCH v2 14/17] Silicon/Ampere: Update ArmPlatformLib to work with changed ARM_CORE_INFO

[Nhi Pham]

On 27/03/2022 05:00, Leif Lindholm wrote:
> On Sat, Mar 26, 2022 at 16:12:07 +0700, Nhi Pham via groups.io wrote:
>>> Would you be happy for me to fold that into
>>> "AmpereAltraPkg, JadePkg: Add ACPI support", or would you be able to
>>> submit a v6 of that patch only?
>>>
>>> Best Regards,
>>>
>>> Leif
>> Thanks much for the patch. The MPIDR decoding matches with Rebecca's update
>> for the ArmPlatformLib earlier and the ARM_CORE_INFO is just consumed in the
>> AcpiSrat.c. So, that is good for now. Please help fold that into the ACPI
>> patch when merging the rest of the Mt. Jade support patchset.
> Done. I just pushed up to and including patch 29 as
> 41628dcf3332..e18e208e7105.
Thanks, Leif. I'm happy to hear that.
>
> (I will take a look at patch 30 on Monday, but I couldn't find that I
> had signed off on it anywhere.)

It seems like you have not reviewed the v5 of patch 30 yet.

Best regards,

Nhi

>
> Apologies for the delay in getting this merged.
>
>> In the future, I will follow up with a patch that makes the representation
>> of MPIDR in the ARM_CORE_INFO the same as in MADT table.
> That sounds ideal, thanks.
>
> Best Regards,
>
> Leif

[PATCH v2 15/17] Silicon/Phytium: Add instance of MpInitLib to PhytiumCommonPkg.dsc.inf

[Rebecca Cran]

MpInitLib is now required for all users of ArmPkg/Drivers/CpuDxe. Add
ArmPkg/Library/MpInitLib/DxeMpInitLib.inf .

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
---
 Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dsc.inc | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dsc.inc b/Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dsc.inc
index 2565b8ac626a..a4e3283ac48b 100644
--- a/Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dsc.inc
+++ b/Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dsc.inc
@@ -147,6 +147,7 @@
   SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf
   PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
   VariablePolicyLib|MdeModulePkg/Library/VariablePolicyLib/VariablePolicyLib.inf
+  MpInitLib|ArmPkg/Library/MpInitLib/DxeMpInitLib.inf
 
 [LibraryClasses.common.UEFI_APPLICATION]
   DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
-- 
2.31.1

[PATCH v2 16/17] Silicon/Phytium: Update FT2000-4Pkg PlatformLib for ARM_CORE_INFO change

[Rebecca Cran]

The ARM_CORE_INFO struct has been updated so the MPIDR is now a single
field instead of separate cluster/core fields. Update FT2000-4Pkg
PlatformLib.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
---
 Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/PlatformLib.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/PlatformLib.c b/Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/PlatformLib.c
index 6a8d22657489..a192797d1cfa 100644
--- a/Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/PlatformLib.c
+++ b/Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/PlatformLib.c
@@ -15,7 +15,7 @@
 
 ARM_CORE_INFO mPhytiumMpCoreInfoTable[] = {
   {
-    0x0, 0x0,              // Cluster 0, Core 0
+    0x000,              // Cluster 0, Core 0
 
     // MP Core MailBox Set/Get/Clear Addresses and Clear Value
     (EFI_PHYSICAL_ADDRESS)0,
-- 
2.31.1

[PATCH v2 17/17] Silicon/Hisilicon: Add instance of MpInitLib to Hisilicon.dsc.inc

[Rebecca Cran]

MpInitLib is now required for all users of ArmPkg/Drivers/CpuDxe. Add
ArmPkg/Library/MpInitLib/DxeMpInitLib.inf .

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
---
 Silicon/Hisilicon/Hisilicon.dsc.inc | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Silicon/Hisilicon/Hisilicon.dsc.inc b/Silicon/Hisilicon/Hisilicon.dsc.inc
index 6bacd9cafd7a..00e97837d036 100644
--- a/Silicon/Hisilicon/Hisilicon.dsc.inc
+++ b/Silicon/Hisilicon/Hisilicon.dsc.inc
@@ -177,6 +177,7 @@
   SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf
   PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
   MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+  MpInitLib|ArmPkg/Library/MpInitLib/DxeMpInitLib.inf
 
 [LibraryClasses.common.UEFI_APPLICATION]
   PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
-- 
2.31.1

Re: [PATCH v2 00/17] Update Arm platforms following addition of EFI_MP_SERVICES_PROTOCOL support in edk2

[Ard Biesheuvel]

On Thu, 16 Dec 2021 at 23:08, Rebecca Cran <rebecca@nuviainc.com> wrote:
>
> Changes from v1:
>
> Fixed Platform/SoftIron, Platform/RaspberryPi, Silicon/AMD,
> Silicon/Ampere, Silicon/Phytium, Silicon/Hisilicon.
>
> Patches 1/17 through 8/17 are the same as v1.
>
> --------
>
> The following platforms are already broken:
>
> o Drivers/OptionRomPkg/OptionRomPkg.dsc for AARCH64 and ARM: due to OptionRomPkg/Library/FrameBufferBltLib/FrameBufferBltLib.inf.
>
> o Features/Ext4Pkg/Ext4Pkg.dsc for ARM: edk2-platforms/Features/Ext4Pkg/Ext4Dxe/Inode.c:341: undefined reference to `__aeabi_uidivmod')
>
> o Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc for ARM
>
> o Platform/Hisilicon/{D03,D05,D06} for AARCH64: Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c:50:18: error: ‘EmHilink0Hccs1X8Width16’ undeclared here (not in a function))
>
> o Silicon/Marvell/Armada7k8k/Armada7k8kCapsule.dscfor AARCH64 and ARM: error C0DE: Unknown fatal error when processing [Silicon/Marvell/Armada7k8k/Armada7k8kCapsule.dsc]
>
> o Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc for ARM.
>
> o Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc for ARM.
>
> o Platform/ARM/SgiPkg/RdN2/RdN2.dsc for ARM.
>
> o Platform/ARM/SgiPkg/RdV1/RdV1.dsc for ARM.
>
> o Platform/ARM/SgiPkg/RdV1Mc/RdV1Mc.dsc for ARM.
>
> o Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc for ARM.
>
> o Platform/Comcast/RDKQemu/RDKQemu.dsc for AARCH64 and ARM due to ACPI
> issue.
>
> o Platform/Marvell/Cn913xDb/Cn913xDbA.dsc for AARCH64 and ARM: tries to
> use literal $(PLATFORM_NAME).
>
> o Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc for AARCH64
> and ARM: VariablePolicyHelperLib issue.
>
> o Platform/SolidRun/Cn913xCEx7Eval/Cn913xCEx7Eval.dsc for AARCH64 and ARM:
> T91 not found.
>
> --------
>
> This patch series depends on the "Add EFI_MP_SERVICES_PROTOCOL support
> for AARCH64" series which is in the process of being reviewed.
>
> With the addition of EFI_MP_SERVICES_PROTOCOL support for Arm, consumers
> of ArmPkg/Drivers/CpuDxe now need an instance of MpInitLib. This series
> adds ArmPkg/Library/MpInitLib/DxeMpInitLib.inf.
>
> Also, the ARM_CORE_INFO struct has changed so there's now an MPIDR field
> where there were previously separate cluster and core fields. This
> series updates the initializers and other code for the various instances.
>

I have pushed the ones that update the uses of ARM_CORE_INFO. The
remaining ones are hopefully unneeded if we make the MP services
protocol a separate driver.


>
> Rebecca Cran (17):
>   Platform/ARM: Add MpInitLib instance
>   Platform/Socionext: Add instance of MpInitLib
>   Silicon/Marvell: Add instance of MpInitLib
>   Platform/Qemu: Add instance of MpInitLib
>   Platform/ARM: Update ARM_CORE_INFO initializer for MPIDR field change
>   Silicon/Marvell: Update ARM_CORE_INFO initializer for MPIDR field
>     change
>   Silicon/Socionext: Update ARM_CORE_INFO initializer for MPIDR field
>     change
>   Silicon/Qemu: Update ARM_CORE_INFO initializer for MPIDR field change
>   Platform/AMD: Add instance of MpInitLib to OverdriveBoard.dsc
>   Platform/SoftIron: Add instance of MpInitLib to Overdrive1000Board.dsc
>   Platform/RaspberryPi: Add instance of MpInitLib to RPi3.dsc and
>     RPi4.dsc
>   Silicon/AMD: Update Styx code to work with changes ARM_CORE_INFO
>     struct
>   Silicon/Ampere: Add instance of MpInitLib to AmpereAltraPkg.dsc
>   Silicon/Ampere: Update ArmPlatformLib to work with changed
>     ARM_CORE_INFO
>   Silicon/Phytium: Add instance of MpInitLib to PhytiumCommonPkg.dsc.inf
>   Silicon/Phytium: Update FT2000-4Pkg PlatformLib for ARM_CORE_INFO
>     change
>   Silicon/Hisilicon: Add instance of MpInitLib to Hisilicon.dsc.inc
>
>  Platform/AMD/OverdriveBoard/OverdriveBoard.dsc                        |  1 +
>  Platform/ARM/JunoPkg/ArmJuno.dsc                                      |  1 +
>  Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJuno.c                     | 12 ++---
>  Platform/ARM/Morello/MorelloPlatform.dsc.inc                          |  1 +
>  Platform/ARM/N1Sdp/N1SdpPlatform.dsc                                  |  1 +
>  Platform/ARM/SgiPkg/SgiPlatform.dsc.inc                               |  1 +
>  Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc                          |  1 +
>  Platform/ARM/VExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7.c    | 16 +++----
>  Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSM.c            | 16 +++----
>  Platform/Qemu/SbsaQemu/SbsaQemu.dsc                                   |  1 +
>  Platform/RaspberryPi/RPi3/RPi3.dsc                                    |  1 +
>  Platform/RaspberryPi/RPi4/RPi4.dsc                                    |  1 +
>  Platform/Socionext/DeveloperBox/DeveloperBox.dsc                      |  1 +
>  Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc          |  1 +
>  Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc           |  1 +
>  Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatform.c               |  3 +-
>  Silicon/AMD/Styx/Drivers/PlatInitPei/PlatInitPei.c                    |  8 ++--
>  Silicon/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c          | 22 ++++-----
>  Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc                  |  1 +
>  Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c |  5 +-
>  Silicon/Hisilicon/Hisilicon.dsc.inc                                   |  1 +
>  Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc                         |  1 +
>  Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.c      |  8 ++--
>  Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/PlatformLib.c         |  2 +-
>  Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dsc.inc             |  1 +
>  Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.c               |  8 ++--
>  Silicon/Socionext/SynQuacer/Library/SynQuacerLib/SynQuacer.c          | 48 ++++++++++----------
>  27 files changed, 88 insertions(+), 76 deletions(-)
>
> --
> 2.31.1
>

Re: [PATCH v2 00/17] Update Arm platforms following addition of EFI_MP_SERVICES_PROTOCOL support in edk2

[Sami Mujawar]

[-- Attachment #1: Type: text/plain, Size: 7350 bytes --]

Hi Rebecca,

Please find my response inline marked [SAMI].

Regards,

Sami Mujawar

From: Ard Biesheuvel <ardb@kernel.org>
Date: Sunday, 30 January 2022 at 11:01
To: Rebecca Cran <rebecca@nuviainc.com>
Cc: edk2-devel-groups-io <devel@edk2.groups.io>, Ard Biesheuvel <ardb+tianocore@kernel.org>, Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>, Leif Lindholm <leif@nuviainc.com>, Sami Mujawar <Sami.Mujawar@arm.com>, Wenyi Xie <xiewenyi2@huawei.com>, Peng Xie <xiepeng@phytium.com.cn>, Ling Jia <jialing@phytium.com.cn>, Yiqi Shu <shuyiqi@phytium.com.cn>, Nhi Pham <nhi@os.amperecomputing.com>, Vu Nguyen <vunguyen@os.amperecomputing.com>, Thang Nguyen <thang@os.amperecomputing.com>, Chuong Tran <chuong@os.amperecomputing.com>, Pete Batard <pete@akeo.ie>, Masami Hiramatsu <masami.hiramatsu@linaro.org>, Graeme Gregory <graeme@nuviainc.com>, Radoslaw Biernacki <rad@semihalf.com>, Marcin Wojtas <mw@semihalf.com>
Subject: Re: [PATCH v2 00/17] Update Arm platforms following addition of EFI_MP_SERVICES_PROTOCOL support in edk2
On Thu, 16 Dec 2021 at 23:08, Rebecca Cran <rebecca@nuviainc.com> wrote:
>
> Changes from v1:
>
> Fixed Platform/SoftIron, Platform/RaspberryPi, Silicon/AMD,
> Silicon/Ampere, Silicon/Phytium, Silicon/Hisilicon.
>
> Patches 1/17 through 8/17 are the same as v1.
>
> --------
>
> The following platforms are already broken:
>
> o Drivers/OptionRomPkg/OptionRomPkg.dsc for AARCH64 and ARM: due to OptionRomPkg/Library/FrameBufferBltLib/FrameBufferBltLib.inf.
>
> o Features/Ext4Pkg/Ext4Pkg.dsc for ARM: edk2-platforms/Features/Ext4Pkg/Ext4Dxe/Inode.c:341: undefined reference to `__aeabi_uidivmod')
>
> o Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc for ARM
>
> o Platform/Hisilicon/{D03,D05,D06} for AARCH64: Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c:50:18: error: ‘EmHilink0Hccs1X8Width16’ undeclared here (not in a function))
>
> o Silicon/Marvell/Armada7k8k/Armada7k8kCapsule.dscfor AARCH64 and ARM: error C0DE: Unknown fatal error when processing [Silicon/Marvell/Armada7k8k/Armada7k8kCapsule.dsc]
>
> o Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc for ARM.
>
> o Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc for ARM.
>
> o Platform/ARM/SgiPkg/RdN2/RdN2.dsc for ARM.
>
> o Platform/ARM/SgiPkg/RdV1/RdV1.dsc for ARM.
>
> o Platform/ARM/SgiPkg/RdV1Mc/RdV1Mc.dsc for ARM.
>
> o Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc for ARM.

[SAMI] Thank you for reporting this issue. The firmware for Sgi platforms does not support AARCH32 and we will provide patches to disable this in the platform workspace files.
[/SAMI]

>
> o Platform/Comcast/RDKQemu/RDKQemu.dsc for AARCH64 and ARM due to ACPI
> issue.
>
> o Platform/Marvell/Cn913xDb/Cn913xDbA.dsc for AARCH64 and ARM: tries to
> use literal $(PLATFORM_NAME).
>
> o Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc for AARCH64
> and ARM: VariablePolicyHelperLib issue.
>
> o Platform/SolidRun/Cn913xCEx7Eval/Cn913xCEx7Eval.dsc for AARCH64 and ARM:
> T91 not found.
>
> --------
>
> This patch series depends on the "Add EFI_MP_SERVICES_PROTOCOL support
> for AARCH64" series which is in the process of being reviewed.
>
> With the addition of EFI_MP_SERVICES_PROTOCOL support for Arm, consumers
> of ArmPkg/Drivers/CpuDxe now need an instance of MpInitLib. This series
> adds ArmPkg/Library/MpInitLib/DxeMpInitLib.inf.
>
> Also, the ARM_CORE_INFO struct has changed so there's now an MPIDR field
> where there were previously separate cluster and core fields. This
> series updates the initializers and other code for the various instances.
>

I have pushed the ones that update the uses of ARM_CORE_INFO. The
remaining ones are hopefully unneeded if we make the MP services
protocol a separate driver.


>
> Rebecca Cran (17):
>   Platform/ARM: Add MpInitLib instance
>   Platform/Socionext: Add instance of MpInitLib
>   Silicon/Marvell: Add instance of MpInitLib
>   Platform/Qemu: Add instance of MpInitLib
>   Platform/ARM: Update ARM_CORE_INFO initializer for MPIDR field change
>   Silicon/Marvell: Update ARM_CORE_INFO initializer for MPIDR field
>     change
>   Silicon/Socionext: Update ARM_CORE_INFO initializer for MPIDR field
>     change
>   Silicon/Qemu: Update ARM_CORE_INFO initializer for MPIDR field change
>   Platform/AMD: Add instance of MpInitLib to OverdriveBoard.dsc
>   Platform/SoftIron: Add instance of MpInitLib to Overdrive1000Board.dsc
>   Platform/RaspberryPi: Add instance of MpInitLib to RPi3.dsc and
>     RPi4.dsc
>   Silicon/AMD: Update Styx code to work with changes ARM_CORE_INFO
>     struct
>   Silicon/Ampere: Add instance of MpInitLib to AmpereAltraPkg.dsc
>   Silicon/Ampere: Update ArmPlatformLib to work with changed
>     ARM_CORE_INFO
>   Silicon/Phytium: Add instance of MpInitLib to PhytiumCommonPkg.dsc.inf
>   Silicon/Phytium: Update FT2000-4Pkg PlatformLib for ARM_CORE_INFO
>     change
>   Silicon/Hisilicon: Add instance of MpInitLib to Hisilicon.dsc.inc
>
>  Platform/AMD/OverdriveBoard/OverdriveBoard.dsc                        |  1 +
>  Platform/ARM/JunoPkg/ArmJuno.dsc                                      |  1 +
>  Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJuno.c                     | 12 ++---
>  Platform/ARM/Morello/MorelloPlatform.dsc.inc                          |  1 +
>  Platform/ARM/N1Sdp/N1SdpPlatform.dsc                                  |  1 +
>  Platform/ARM/SgiPkg/SgiPlatform.dsc.inc                               |  1 +
>  Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc                          |  1 +
>  Platform/ARM/VExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7.c    | 16 +++----
>  Platform/ARM/VExpressPkg/Library/ArmVExpressLibRTSM/RTSM.c            | 16 +++----
>  Platform/Qemu/SbsaQemu/SbsaQemu.dsc                                   |  1 +
>  Platform/RaspberryPi/RPi3/RPi3.dsc                                    |  1 +
>  Platform/RaspberryPi/RPi4/RPi4.dsc                                    |  1 +
>  Platform/Socionext/DeveloperBox/DeveloperBox.dsc                      |  1 +
>  Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc          |  1 +
>  Platform/SoftIron/Overdrive1000Board/Overdrive1000Board.dsc           |  1 +
>  Silicon/AMD/Styx/Drivers/AcpiPlatformDxe/AcpiPlatform.c               |  3 +-
>  Silicon/AMD/Styx/Drivers/PlatInitPei/PlatInitPei.c                    |  8 ++--
>  Silicon/AMD/Styx/Library/StyxDtbLoaderLib/StyxDtbLoaderLib.c          | 22 ++++-----
>  Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc                  |  1 +
>  Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c |  5 +-
>  Silicon/Hisilicon/Hisilicon.dsc.inc                                   |  1 +
>  Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc                         |  1 +
>  Silicon/Marvell/Armada7k8k/Library/Armada7k8kLib/Armada7k8kLib.c      |  8 ++--
>  Silicon/Phytium/FT2000-4Pkg/Library/PlatformLib/PlatformLib.c         |  2 +-
>  Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dsc.inc             |  1 +
>  Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.c               |  8 ++--
>  Silicon/Socionext/SynQuacer/Library/SynQuacerLib/SynQuacer.c          | 48 ++++++++++----------
>  27 files changed, 88 insertions(+), 76 deletions(-)
>
> --
> 2.31.1
>

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