Re: [PATCH v2 08/17] Silicon/Qemu: Update ARM_CORE_INFO initializer for MPIDR field change

[Graeme Gregory <graeme@nuviainc.com>]

On Thu, Dec 16, 2021 at 03:07:51PM -0700, Rebecca Cran wrote:
> The ARM_CORE_INFO struct has been updated so the MPIDR is now a single
> field instead of separate cluster/core fields. Update the initializer.
> 
> Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>

Looks sane to me

Reviewed-by: Graeme Gregory <quic_ggregory@quicinc.com>

> ---
>  Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.c b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.c
> index fa9047020e6c..411f653913bd 100644
> --- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.c
> +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuLib/SbsaQemuLib.c
> @@ -15,7 +15,7 @@
>  ARM_CORE_INFO mArmPlatformNullMpCoreInfoTable[] = {
>    {
>      // Cluster 0, Core 0
> -    0x0, 0x0,
> +    0x000,
>  
>      // MP Core MailBox Set/Get/Clear Addresses and Clear Value
>      (EFI_PHYSICAL_ADDRESS)0,
> @@ -25,7 +25,7 @@ ARM_CORE_INFO mArmPlatformNullMpCoreInfoTable[] = {
>    },
>    {
>      // Cluster 0, Core 1
> -    0x0, 0x1,
> +    0x001,
>  
>      // MP Core MailBox Set/Get/Clear Addresses and Clear Value
>      (EFI_PHYSICAL_ADDRESS)0,
> @@ -35,7 +35,7 @@ ARM_CORE_INFO mArmPlatformNullMpCoreInfoTable[] = {
>    },
>    {
>      // Cluster 0, Core 2
> -    0x0, 0x2,
> +    0x002,
>  
>      // MP Core MailBox Set/Get/Clear Addresses and Clear Value
>      (EFI_PHYSICAL_ADDRESS)0,
> @@ -45,7 +45,7 @@ ARM_CORE_INFO mArmPlatformNullMpCoreInfoTable[] = {
>    },
>    {
>      // Cluster 0, Core 3
> -    0x0, 0x3,
> +    0x003,
>  
>      // MP Core MailBox Set/Get/Clear Addresses and Clear Value
>      (EFI_PHYSICAL_ADDRESS)0,
> -- 
> 2.31.1
>