[PATCH v1 1/4] MdeModulePkg: Replace Opcode with the corresponding instructions.

["Jason Lou" <yun.lou@intel.com>]

From: Jason Lou <yun.lou@intel.com>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3790

Replace Opcode with the corresponding instructions.
The code changes have been verified with CompareBuild.py tool, which
can be used to compare the results of two different EDK II builds to
determine if they generate the same binaries.
(the tool link: https://github.com/mdkinney/edk2)

Signed-off-by: Jason Lou <yun.lou@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
---
 MdeModulePkg/Universal/DebugSupportDxe/Ia32/AsmFuncs.nasm | 20 +++----------------
 MdeModulePkg/Universal/DebugSupportDxe/X64/AsmFuncs.nasm  | 21 +++-----------------
 2 files changed, 6 insertions(+), 35 deletions(-)

diff --git a/MdeModulePkg/Universal/DebugSupportDxe/Ia32/AsmFuncs.nasm b/MdeModulePkg/Universal/DebugSupportDxe/Ia32/AsmFuncs.nasm
index cfb418748f..45c6e49642 100644
--- a/MdeModulePkg/Universal/DebugSupportDxe/Ia32/AsmFuncs.nasm
+++ b/MdeModulePkg/Universal/DebugSupportDxe/Ia32/AsmFuncs.nasm
@@ -1,7 +1,7 @@
 ;/** @file
 ;  Low leve IA32 specific debug support functions.
 ;
-;  Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
+;  Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.<BR>
 ;  SPDX-License-Identifier: BSD-2-Clause-Patent
 ;
 ;**/
@@ -26,20 +26,6 @@
 
 %define FXSTOR_FLAG 0x1000000         ; bit cpuid 24 of feature flags
 
-;; The FXSTOR and FXRSTOR commands are used for saving and restoring the x87,
-;; MMX, SSE, SSE2, etc registers.  The initialization of the debugsupport driver
-;; MUST check the CPUID feature flags to see that these instructions are available
-;; and fail to init if they are not.
-
-;; fxstor [edi]
-%macro FXSTOR_EDI 0
-                         db 0xf, 0xae, 00000111y ; mod = 00, reg/op = 000, r/m = 111 = [edi]
-%endmacro
-
-;; fxrstor [esi]
-%macro FXRSTOR_ESI 0
-                         db 0xf, 0xae, 00001110y ; mod = 00, reg/op = 001, r/m = 110 = [esi]
-%endmacro
 SECTION .data
 
 global ASM_PFX(OrigVector)
@@ -348,7 +334,7 @@ ExtraPushDone:
                 ; IMPORTANT!! The debug stack has been carefully constructed to
                 ; insure that esp and edi are 16 byte aligned when we get here.
                 ; They MUST be.  If they are not, a GP fault will occur.
-                FXSTOR_EDI
+                fxsave  [edi]
 
 ;; UEFI calling convention for IA32 requires that Direction flag in EFLAGs is clear
                 cld
@@ -372,7 +358,7 @@ ExtraPushDone:
 
 ;; FX_SAVE_STATE_IA32 FxSaveState;
                 mov     esi, esp
-                FXRSTOR_ESI
+                fxrstor [esi]
                 add     esp, 512
 
 ;; UINT32  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
diff --git a/MdeModulePkg/Universal/DebugSupportDxe/X64/AsmFuncs.nasm b/MdeModulePkg/Universal/DebugSupportDxe/X64/AsmFuncs.nasm
index 9cc38a3128..59916335cd 100644
--- a/MdeModulePkg/Universal/DebugSupportDxe/X64/AsmFuncs.nasm
+++ b/MdeModulePkg/Universal/DebugSupportDxe/X64/AsmFuncs.nasm
@@ -1,7 +1,7 @@
 ;/** @file
 ;  Low level x64 routines used by the debug support driver.
 ;
-;  Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
+;  Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved.<BR>
 ;  SPDX-License-Identifier: BSD-2-Clause-Patent
 ;
 ;**/
@@ -26,21 +26,6 @@
 
 %define FXSTOR_FLAG 0x1000000         ; bit cpuid 24 of feature flags
 
-;; The FXSTOR and FXRSTOR commands are used for saving and restoring the x87,
-;; MMX, SSE, SSE2, etc registers.  The initialization of the debugsupport driver
-;; MUST check the CPUID feature flags to see that these instructions are available
-;; and fail to init if they are not.
-
-;; fxstor [rdi]
-%macro FXSTOR_RDI 0
-                         db 0xf, 0xae, 00000111y ; mod = 00, reg/op = 000, r/m = 111 = [rdi]
-%endmacro
-
-;; fxrstor [rsi]
-%macro FXRSTOR_RSI 0
-                         db 0xf, 0xae, 00001110y ; mod = 00, reg/op = 001, r/m = 110 = [rsi]
-%endmacro
-
 SECTION .data
 
 global ASM_PFX(OrigVector)
@@ -381,7 +366,7 @@ ExtraPushDone:
                 ; IMPORTANT!! The debug stack has been carefully constructed to
                 ; insure that rsp and rdi are 16 byte aligned when we get here.
                 ; They MUST be.  If they are not, a GP fault will occur.
-                FXSTOR_RDI
+                fxsave  [rdi]
 
 ;; UEFI calling convention for x64 requires that Direction flag in EFLAGs is clear
                 cld
@@ -404,7 +389,7 @@ ExtraPushDone:
 
 ;; FX_SAVE_STATE_X64 FxSaveState;
                 mov     rsi, rsp
-                FXRSTOR_RSI
+                fxrstor [rsi]
                 add     rsp, 512
 
 ;; UINT64  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
-- 
2.28.0.windows.1