From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by mx.groups.io with SMTP id smtpd.web10.46291.1640743854551463864 for ; Tue, 28 Dec 2021 18:10:56 -0800 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=aVQx4WK5; spf=pass (domain: intel.com, ip: 134.134.136.24, mailfrom: yun.lou@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1640743856; x=1672279856; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=j/gW2bvC/ZZ3GvC+ciL+ugT7mNPpeNV61L5GJKdlUZA=; b=aVQx4WK5gVKvbv9iv28MVWmFObOhUS1x6c0OaS8Mp5JsjRUeuH7KqC+D 6QF5rIduFZStqOAM+T/8EX+biaBQCiw8cDHzCwfPsDWQ8OLh976ijTRcX 1JqGfh8tJVM7o7Z33cz+bQc12er4xGhrA3Iedm2K62TQajWR+3BTXaIIN oGgaZs+thFPHvRFX8rVuWg8NTZzr9vCWDB9f8HmVF2XPW55mZ4V59pENp zcSuNithht62Ye//JVH6f38uJb0bdCvVHylcDkmStKabhxnPvSrwHSKcC 6NBEk9woZ4wc5UJNdQVm9lfKrW1tEzi0NOQDPaInWfTnRgK+RcHlJ1WdI g==; X-IronPort-AV: E=McAfee;i="6200,9189,10211"; a="241251895" X-IronPort-AV: E=Sophos;i="5.88,244,1635231600"; d="scan'208";a="241251895" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Dec 2021 18:10:32 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,244,1635231600"; d="scan'208";a="761247309" Received: from shwdeopenlab102.ccr.corp.intel.com ([10.239.56.73]) by fmsmga005.fm.intel.com with ESMTP; 28 Dec 2021 18:10:30 -0800 From: "Jason Lou" To: devel@edk2.groups.io Cc: Jason Lou , Ray Ni , Dandan Bi , Liming Gao Subject: [PATCH v1 1/4] MdeModulePkg: Replace Opcode with the corresponding instructions. Date: Wed, 29 Dec 2021 10:10:23 +0800 Message-Id: <20211229021026.3107-1-yun.lou@intel.com> X-Mailer: git-send-email 2.31.1.windows.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Jason Lou REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3790 Replace Opcode with the corresponding instructions. The code changes have been verified with CompareBuild.py tool, which can be used to compare the results of two different EDK II builds to determine if they generate the same binaries. (the tool link: https://github.com/mdkinney/edk2) Signed-off-by: Jason Lou Cc: Ray Ni Cc: Dandan Bi Cc: Liming Gao --- MdeModulePkg/Universal/DebugSupportDxe/Ia32/AsmFuncs.nasm | 20 +++--------= -------- MdeModulePkg/Universal/DebugSupportDxe/X64/AsmFuncs.nasm | 21 +++--------= --------- 2 files changed, 6 insertions(+), 35 deletions(-) diff --git a/MdeModulePkg/Universal/DebugSupportDxe/Ia32/AsmFuncs.nasm b/Md= eModulePkg/Universal/DebugSupportDxe/Ia32/AsmFuncs.nasm index cfb418748f..45c6e49642 100644 --- a/MdeModulePkg/Universal/DebugSupportDxe/Ia32/AsmFuncs.nasm +++ b/MdeModulePkg/Universal/DebugSupportDxe/Ia32/AsmFuncs.nasm @@ -1,7 +1,7 @@ ;/** @file=0D ; Low leve IA32 specific debug support functions.=0D ;=0D -; Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.
= =0D +; Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.
= =0D ; SPDX-License-Identifier: BSD-2-Clause-Patent=0D ;=0D ;**/=0D @@ -26,20 +26,6 @@ =0D %define FXSTOR_FLAG 0x1000000 ; bit cpuid 24 of feature flags=0D =0D -;; The FXSTOR and FXRSTOR commands are used for saving and restoring the x= 87,=0D -;; MMX, SSE, SSE2, etc registers. The initialization of the debugsupport = driver=0D -;; MUST check the CPUID feature flags to see that these instructions are a= vailable=0D -;; and fail to init if they are not.=0D -=0D -;; fxstor [edi]=0D -%macro FXSTOR_EDI 0=0D - db 0xf, 0xae, 00000111y ; mod =3D 00, reg/op =3D = 000, r/m =3D 111 =3D [edi]=0D -%endmacro=0D -=0D -;; fxrstor [esi]=0D -%macro FXRSTOR_ESI 0=0D - db 0xf, 0xae, 00001110y ; mod =3D 00, reg/op =3D = 001, r/m =3D 110 =3D [esi]=0D -%endmacro=0D SECTION .data=0D =0D global ASM_PFX(OrigVector)=0D @@ -348,7 +334,7 @@ ExtraPushDone: ; IMPORTANT!! The debug stack has been carefully construct= ed to=0D ; insure that esp and edi are 16 byte aligned when we get = here.=0D ; They MUST be. If they are not, a GP fault will occur.=0D - FXSTOR_EDI=0D + fxsave [edi]=0D =0D ;; UEFI calling convention for IA32 requires that Direction flag in EFLAGs= is clear=0D cld=0D @@ -372,7 +358,7 @@ ExtraPushDone: =0D ;; FX_SAVE_STATE_IA32 FxSaveState;=0D mov esi, esp=0D - FXRSTOR_ESI=0D + fxrstor [esi]=0D add esp, 512=0D =0D ;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;=0D diff --git a/MdeModulePkg/Universal/DebugSupportDxe/X64/AsmFuncs.nasm b/Mde= ModulePkg/Universal/DebugSupportDxe/X64/AsmFuncs.nasm index 9cc38a3128..59916335cd 100644 --- a/MdeModulePkg/Universal/DebugSupportDxe/X64/AsmFuncs.nasm +++ b/MdeModulePkg/Universal/DebugSupportDxe/X64/AsmFuncs.nasm @@ -1,7 +1,7 @@ ;/** @file=0D ; Low level x64 routines used by the debug support driver.=0D ;=0D -; Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
= =0D +; Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved.
= =0D ; SPDX-License-Identifier: BSD-2-Clause-Patent=0D ;=0D ;**/=0D @@ -26,21 +26,6 @@ =0D %define FXSTOR_FLAG 0x1000000 ; bit cpuid 24 of feature flags=0D =0D -;; The FXSTOR and FXRSTOR commands are used for saving and restoring the x= 87,=0D -;; MMX, SSE, SSE2, etc registers. The initialization of the debugsupport = driver=0D -;; MUST check the CPUID feature flags to see that these instructions are a= vailable=0D -;; and fail to init if they are not.=0D -=0D -;; fxstor [rdi]=0D -%macro FXSTOR_RDI 0=0D - db 0xf, 0xae, 00000111y ; mod =3D 00, reg/op =3D = 000, r/m =3D 111 =3D [rdi]=0D -%endmacro=0D -=0D -;; fxrstor [rsi]=0D -%macro FXRSTOR_RSI 0=0D - db 0xf, 0xae, 00001110y ; mod =3D 00, reg/op =3D = 001, r/m =3D 110 =3D [rsi]=0D -%endmacro=0D -=0D SECTION .data=0D =0D global ASM_PFX(OrigVector)=0D @@ -381,7 +366,7 @@ ExtraPushDone: ; IMPORTANT!! The debug stack has been carefully construct= ed to=0D ; insure that rsp and rdi are 16 byte aligned when we get = here.=0D ; They MUST be. If they are not, a GP fault will occur.=0D - FXSTOR_RDI=0D + fxsave [rdi]=0D =0D ;; UEFI calling convention for x64 requires that Direction flag in EFLAGs = is clear=0D cld=0D @@ -404,7 +389,7 @@ ExtraPushDone: =0D ;; FX_SAVE_STATE_X64 FxSaveState;=0D mov rsi, rsp=0D - FXRSTOR_RSI=0D + fxrstor [rsi]=0D add rsp, 512=0D =0D ;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;=0D --=20 2.28.0.windows.1