From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web11.9305.1641102583240960003 for ; Sat, 01 Jan 2022 21:49:45 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: jeremy.linton@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B82C3142F; Sat, 1 Jan 2022 21:49:44 -0800 (PST) Received: from u200856.usa.arm.com (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 525823F5A1; Sat, 1 Jan 2022 21:49:44 -0800 (PST) From: "Jeremy Linton" To: devel@edk2.groups.io Cc: pete@akeo.ie, ardb+tianocore@kernel.org, leif@nuviainc.com, awarkentin@vmware.com, Sunny.Wang@arm.com, samer.el-haj-mahmoud@arm.com, mariobalanica02@gmail.com, Jeremy Linton , Ard Biesheuvel Subject: [PATCH V2 09/10] Platform/RaspberryPi: Add SPI flash variable store. Date: Sat, 1 Jan 2022 23:49:23 -0600 Message-Id: <20220102054924.1195762-10-jeremy.linton@arm.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220102054924.1195762-1-jeremy.linton@arm.com> References: <20220102054924.1195762-1-jeremy.linton@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable The RPi4 has a 512KB SPI flash, which depending on RPi and firmware revision has 300-180K free. We can use this storage to persist variables when the OS is running or over firmware upgrades. The problem is that the SPI is pin mux'ed with the PWM audio, so we want to leave the PWM configured for OS use. And of course there is the problem of sharing the GPIO block with OS's that are aware of it. Hence a previous patch set which moves the GPIO and some of the low level i2c/etc devices into its own SSDT, and disables them by default. This patch, adds a few SPI access functions directly to the variable store rather than creating another runtime service since the early boot ordering is critical. These functions are of the form ReadSpi(), WriteSpi(), DisableSpiWp(), etc all with Spi in the name. On top of that a few "Flash" routines are created which provide high level functions for reading/writing and walking the portion of the SPI flash we use to clone the variable store region. Importantly WalkFlashVolume() walks the entire SPI flash region, which has a simple header structure containing filename+len for each region of the flash, to return how much of the capacity is being utilized by the existing bootloader/etc firmware. So, if this is a RPi4, and there is sufficient space, and that space doesn't have a valid varstore header we erase it and flush the RPI's varstore region to the SPI. Then we note its starting offset in mFvInstance->FlashOffset. >>From then on, writes to the EFI_FW_VOL_BLOCK_DEVICE are written to both the RAM copy as well as the SPI flash. If the empty region has a valid header we read the entire region overtop of the one being passed as part of the RPi's BL33, and continue as above. At ready to boot we re-enable the LDO, and then during the dump vars check, we check for DT or the GPIO being enabled and disable the runtime SPI updates because we can't be sure of what the OS might be doing with the GPIO. The dual ACPI and DT mode, leaves it enabled (if GPIO is disabled) so care should be taken. Now, one of the problems here is that with the LDO enabled any SPI accesses can be heard over the speakers as pops, buzzes, or scratchy tones. This is happening even without this patch because TFA and/or the rpi low level firmware doesn't itself assure the LDO is disabled during resets, so the early SoC startup is quite noisy. We add to this, but alongside that a couple fairly trivial TFA patchs, to mute it before reset, and again assure its off before releasing to us solve a large part of this problem. That said, this can now happen during runtime as well. Generally the OS's aren't doing a lot of variable updates, but when they do its generally barely noticable clicks since we aren't going through the long process of muting/unmuting the LDO which itself causes a pop. So, this patch fixes a whole bunch of bugs on github that exist because the variable store isn't persisted. It also fixes a rather large bug in the existing variable store code caused by the FaultTolerantWriteDxe erasing the entire variable store region when it garbage collects during startup. That latter bug is the result of FvbGetLbaAddress reading recently erased data from the VolumeHeader before its been recreated, and results in random UEFI crashes. Tested-by: Ard Biesheuvel Signed-off-by: Jeremy Linton --- .../Drivers/VarBlockServiceDxe/FvbInfo.c | 8 +- .../Drivers/VarBlockServiceDxe/VarBlockService.c | 650 +++++++++++++++= +++++- .../Drivers/VarBlockServiceDxe/VarBlockService.h | 10 + .../VarBlockServiceDxe/VarBlockServiceDxe.c | 38 +- .../VarBlockServiceDxe/VarBlockServiceDxe.inf | 6 + 5 files changed, 690 insertions(+), 22 deletions(-) diff --git a/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/FvbInfo.c b/= Platform/RaspberryPi/Drivers/VarBlockServiceDxe/FvbInfo.c index 0e0c108dba..ee18f327e6 100644 --- a/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/FvbInfo.c +++ b/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/FvbInfo.c @@ -11,12 +11,7 @@ #include #include #include - -typedef struct { - UINT64 FvLength; - EFI_FIRMWARE_VOLUME_HEADER FvbInfo; - EFI_FV_BLOCK_MAP_ENTRY End[1]; -} EFI_FVB_MEDIA_INFO; +#include "VarBlockService.h" =20 EFI_FVB_MEDIA_INFO mPlatformFvbMediaInfo[] =3D { // @@ -38,6 +33,7 @@ EFI_FVB_MEDIA_INFO mPlatformFvbMediaInfo[] =3D { FixedPcdGet32 (PcdNvStorageEventLogSize), EFI_FVH_SIGNATURE, EFI_FVB2_MEMORY_MAPPED | + EFI_FVB2_STICKY_WRITE | EFI_FVB2_READ_ENABLED_CAP | EFI_FVB2_READ_STATUS | EFI_FVB2_WRITE_ENABLED_CAP | diff --git a/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockServ= ice.c b/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockService.c index 572309439a..0cf204738f 100644 --- a/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockService.c +++ b/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockService.c @@ -7,17 +7,28 @@ * **/ =20 +#include + +#include +#include + #include #include +#include =20 #include #include #include #include #include +#include +#include #include +#include #include =20 +#include + #include "VarBlockService.h" =20 #define EFI_FVB2_STATUS \ @@ -85,6 +96,467 @@ EFI_FW_VOL_BLOCK_DEVICE mFvbDeviceTemplate =3D { } }; =20 +/* + * This is a derived approximation for the number of BCM2835_SPI_CS + * register reads that can be accomplished in 1US on a bcm2711. + */ +#define SPI_CS_READS_PER_US 25 + +STATIC +VOID +SpiDelay ( + IN UINTN micro_sec + ) +/*++ + + Routine Description: + Delay loop based on how fast we can read SPI controller + state rather than a hardcoded delay since we are a runtime + service. + + Arguments: + micro_sec - Approximate number of micro seconds to delay. + + Returns: +--*/ +{ + UINT32 looping; + for (looping =3D 0; looping < micro_sec; looping++) { + UINT32 looping2; + // + // RPi4 does about 25 reg reads per micro second + // + for (looping2 =3D 0; looping2 < SPI_CS_READS_PER_US; looping2++) { + MmioRead32 (mFvInstance->SpiBase+BCM2835_SPI_CS); + } + } +} + +STATIC +INT32 +DoSpiCommand ( + UINT8 *Buffer, + UINTN in_len, + UINTN out_len) +/*++ + + Routine Description: + Read and/or Write data on the SPI bus. A buffer with + data to write/read is passed and this routine then writes + out_len data on the SPI bus, and reads in_len data back + into the buffer starting at the first location. Obviously + this means that the buffer must be greater than the largest + of in_len or out_len + + Arguments: + in_len - bytes to read from the SPI to buffer + out_len - bytes to write on the SPI from buffer + + Returns: + number of bytes read into buffer. +--*/ +{ + int cur_byte; + UINT32 ret =3D 0; + + MmioWrite32 (mFvInstance->SpiBase + BCM2835_SPI_CS, BCM2835_SPI_CS_TA)= ; + + for (cur_byte =3D 0 ;cur_byte < in_len + out_len; cur_byte++) + { + int loop =3D 10000*SPI_CS_READS_PER_US; + + while ((MmioRead32 (mFvInstance->SpiBase + BCM2835_SPI_CS) & BCM2835= _SPI_CS_TXD) =3D=3D 0) { + loop--; + if (loop =3D=3D 0) { + DEBUG ((DEBUG_ERROR, "Write timeout %X\n", MmioRead32 (mFvInstan= ce->SpiBase+BCM2835_SPI_CS))); + ret =3D -1; + break; + } + } + + if (cur_byte < out_len) { + MmioWrite32 (mFvInstance->SpiBase + BCM2835_SPI_FIFO, Buffer[cur_b= yte]); + } else { + MmioWrite32 (mFvInstance->SpiBase + BCM2835_SPI_FIFO, 0); + } + + loop =3D 10000 * SPI_CS_READS_PER_US; + while ((MmioRead32 (mFvInstance->SpiBase + BCM2835_SPI_CS) & BCM2835= _SPI_CS_RXD) =3D=3D 0) { + loop--; + if (loop =3D=3D 0) { + DEBUG ((DEBUG_ERROR, "Read timeout %X\n", MmioRead32 (mFvInstanc= e->SpiBase+BCM2835_SPI_CS))); + ret =3D -1; + break; + } + } + + if (cur_byte < out_len) { + MmioRead32 (mFvInstance->SpiBase + BCM2835_SPI_FIFO); + } else { + ret++; + Buffer[cur_byte - out_len] =3D MmioRead32 (mFvInstance->SpiBase + = BCM2835_SPI_FIFO); + } + } + + MmioWrite32 (mFvInstance->SpiBase + BCM2835_SPI_CS, 0); + + SpiDelay (1); //wait for /CS to settle + + return ret; +} + +#if (RPI_MODEL =3D=3D 4) +STATIC +INT32 +ReadDeviceId (VOID) +/*++ + + Routine Description: + Sends the SPI device identification command then checks to see + if its a winbond we recognize, and returns the expected capacity. + + Arguments: + + Returns: + Capacity of attached device +--*/ +{ + UINT8 Buffer[32]; + Buffer[0] =3D 0x9F; + + DoSpiCommand (Buffer, 3, 1); //EF 30 31 is the winbond W25X40CL on t= he base rpi4 + if (Buffer[0] !=3D 0xEF) { + DEBUG ((DEBUG_INFO, "ReadDeviceId %02X %02X %02X\n", + Buffer[0], Buffer[1], Buffer[2])); + } + // Lets assume we understand JEDEC type 0x30 + if (Buffer[1] =3D=3D 0x30) { + // it should be 512K + return 1 << Buffer[2]; //not really standard... + } + + return 0; +} + +STATIC +INT32 +ReadSpi ( + UINT32 Addr, + UINT8 *Buffer, + UINT32 Len) +/*++ + + Routine Description: + Reads Len bytes of data at flash Addr into Buffer + + Arguments: + Addr - Flash device address + Buffer - Buffer where data is returned, this + buffer must be at least 5 bytes long to + hold the command. + Len - Number of bytes to read into Buffer + + Returns: + Number of bytes read +--*/ +{ + INT32 ret; + Buffer[0] =3D 0x0B; //send read data + Buffer[1] =3D (Addr >> 16) & 0xFF; // address MSB + Buffer[2] =3D (Addr >> 8) & 0xFF; // + Buffer[3] =3D Addr & 0xFF; // address LSB + Buffer[4] =3D 0; + + ret =3D DoSpiCommand (Buffer, Len, 5); + return ret; +} + +STATIC +UINT32 +WalkFlashVolume (VOID) +/*++ + + Routine Description: + Walk the RPi's SPI flash volume to determine if there is + free space we may consume as the backing store for a UEFI + variable store volume. This is fairly safe as the entire volume + can be recovered using the Raspberry Pi OS image tool to create + an EEPROM update disk. We aren't going to bother to + attempt to contain it in their volume format, rather hiding in + the free/unclaimed space. If this space is corrupted via an update + done outside of our control, we will fallback to the original + RPI_EFI.FD variables. AKA we should never really be worse off. + + Arguments: + None + + Returns: + A value that can be assigned to mFvInstance->FlashOffset + as the location we may right, otherwise 0. +--*/ +{ + UINT32 total_data; + UINT32 device_size; + UINT8 buffer[32]; + + device_size =3D ReadDeviceId (); + // newer write location 00051100 + + for (total_data =3D 0; total_data < device_size; ) { + UINT32 len; + if (ReadSpi (total_data, buffer, 24) =3D=3D 24) { + len =3D 0; + len +=3D (*(UINT8 *)&buffer[5]) << 16; + len +=3D (*(UINT8 *)&buffer[6]) << 8; + len +=3D (*(UINT8 *)&buffer[7]); + + // round up to nearest 8 byte align + len +=3D 7; + len &=3D 0xFFFFF8; + + buffer[24]=3D0; + DEBUG ((DEBUG_INFO, "%X len=3D%d filename=3D%a \n", *(UINT32 *)buf= fer, + len, (char *)&buffer[8])); + if (*(UINT32 *)buffer =3D=3D 0xFFFFFFFF) { + break; + } + total_data +=3D 8 + len; + } else { + DEBUG ((DEBUG_ERROR, "Didn't get correct amount of data from SPI, = abort its use\n")); + return 0; + } + } + + DEBUG ((DEBUG_INFO, "First free sector at %X free space remaining %dK = \n", total_data,(device_size-total_data)/1024)); + if ((device_size - total_data) > SIZE_128KB) { + //start at the next 4k page + total_data =3D (total_data + SIZE_4KB) & 0xFFFFE000; + DEBUG ((DEBUG_INFO, "Start of Fv at %X\n", total_data)); + } else { + total_data =3D 0; + } + + return total_data; +} + + +STATIC +INT32 +FlashRead ( + UINT32 Addr, + UINT8 *Buffer, + UINT32 Len) +/*++ + + Routine Description: + Reads Len data from variable storage area into Buffer + + Arguments: + Addr - Offset into variable store region + Buffer - Buffer where data is returned, this + buffer must be at least 5 bytes long to + hold the command. + Len - Number of bytes to read into Buffer + + Returns: + Number of bytes read +--*/ +{ + return ReadSpi (mFvInstance->FlashOffset + Addr, Buffer, Len); +} +#endif + +STATIC +VOID +DisableSpiWp (VOID) +/*++ + + Routine Description: + Sends SPI flash command to disable write protection + + Arguments: + + Returns: + +--*/ +{ + UINT8 Buffer[32]; + Buffer[0] =3D 0x06; + + DoSpiCommand (Buffer, 0, 1); +} + +STATIC +INT32 +ReadSpiStatus (VOID) +/*++ + + Routine Description: + Sends SPI get status command + Arguments: + + Returns: + Status of flash device +--*/ +{ + UINT8 Buffer[32]; + Buffer[0] =3D 0x05; + + DoSpiCommand (Buffer, 1, 1); + + return Buffer[0]; +} + + +STATIC +VOID +WriteSpi ( + UINT32 Addr, + UINT8 *SrcBuffer, + UINT32 Len) +/*++ + + Routine Description: + Writes Len bytes of SrcBuffer to SPI flash. The max write len is a = single + 256 byte block, but this routine deals with the case where its misa= ligned + across two flash blocks. + + Arguments: + Addr - Flash device address + SrcBuffer - Buffer from which data is written to the SPI flash + Len - Number of bytes to write + + Returns: + Nothing +--*/ +{ + UINT8 Buffer[280]; + UINTN loop; + int additional =3D 0; + + if (Len > 256) Len =3D 256; + + // check if request crosses boundary + if (((Addr + Len - 1) & 0xFFFFFF00) !=3D (Addr & 0xFFFFFF00)) { + additional =3D (Addr + Len) & 0xFF; + Len -=3D additional; + } + + do { + + DisableSpiWp (); + + while (ReadSpiStatus () !=3D 2) { + DEBUG ((DEBUG_INFO, "Spi status %X \n", ReadSpiStatus ())); + } + + Buffer[0] =3D 0x02; //write len + Buffer[1] =3D (Addr >> 16) & 0xFF; + Buffer[2] =3D (Addr >> 8) & 0xFF; + Buffer[3] =3D Addr & 0xFF; + + CopyMem (&Buffer[4], SrcBuffer, Len); + + DoSpiCommand (Buffer, 0, 4+Len); + + loop =3D Len * 30000 * SPI_CS_READS_PER_US; + while (ReadSpiStatus () & 0x3) { + loop--; + if (loop =3D=3D 0) { + DEBUG ((DEBUG_ERROR, "Write still busy, continue\n")); + break; + } + } + + // deal with second block + if (additional) { + Addr +=3D Len; + SrcBuffer +=3D Len; + Len =3D additional; + additional =3D 0; + } else { + Len =3D 0; + } + + } while (Len); +} + +STATIC +VOID +Erase4kSpi ( + UINT32 Addr) +/*++ + + Routine Description: + Erases a complete SPI flash page, which in this + case is 4k at the given address. + + Arguments: + Addr - Flash device address + + Returns: + Nothing +--*/ +{ + UINT8 Buffer[32]; + int loop =3D 300000 * SPI_CS_READS_PER_US; + + DisableSpiWp (); + + Buffer[0] =3D 0x20; //erase 4k + Buffer[1] =3D (Addr >> 16) & 0xFF; + Buffer[2] =3D (Addr >> 8) & 0xFF; + Buffer[3] =3D Addr & 0xFF; + + DoSpiCommand (Buffer, 0, 4); + + while (ReadSpiStatus () & 0x3) { + loop--; + if (loop =3D=3D 0) { + DEBUG ((DEBUG_ERROR, "Erase still busy \n")); + break; + } + } +} + +STATIC +VOID +FlashWrite ( + IN UINTN Address, + IN UINT8 *Buffer, + IN UINTN NumBytes + ) +/*++ + + Routine Description: + Writes Len bytes of SrcBuffer to flash variable storage. This routi= ne breaks + the writes into blocks <=3D 256 bytes, which is the max that can be= written with + the SPI flash commands we are using. + + Arguments: + Address - Variable store offset + Buffer - data buffer to write + NumBytes - bytes in buffer to write + + Returns: + +--*/ +{ + UINTN Off=3DAddress; + + while (NumBytes>0) { + int write_bytes =3D NumBytes; + if (write_bytes > 256) { + write_bytes =3D 256; + } + WriteSpi (mFvInstance->FlashOffset + Off, Buffer, write_bytes); + + Off +=3D write_bytes; + Buffer +=3D write_bytes; + NumBytes -=3D write_bytes; + } +} + =20 EFI_STATUS VarStoreWrite ( @@ -93,8 +565,47 @@ VarStoreWrite ( IN UINT8 *Buffer ) { + + if (AddressFvBase) { + return EFI_INVALID_PARAMETER; + } + CopyMem ((VOID*)Address, Buffer, *NumBytes); - mFvInstance->Dirty =3D TRUE; + + if (mFvInstance->FlashOffset) { + GpioPinFuncSet (40, GPIO_FSEL_ALT4); + GpioPinFuncSet (41, GPIO_FSEL_ALT4); + + FlashWrite (Address-mFvInstance->FvBase, Buffer, *NumBytes); + + GpioPinFuncSet (40, GPIO_FSEL_ALT0); + GpioPinFuncSet (41, GPIO_FSEL_ALT0); + } else { + mFvInstance->Dirty =3D TRUE; + } + + return EFI_SUCCESS; +} + +EFI_STATUS +FlashErase ( + IN UINTN Address, + IN UINTN LbaLength + ) + +{ + UINTN Off=3DAddress; + + while (LbaLength>0) { + int erase_bytes =3D LbaLength; + if (erase_bytes > 4096) { + erase_bytes =3D 4096; + } + Erase4kSpi (mFvInstance->FlashOffset + Off); + + Off +=3D erase_bytes; + LbaLength -=3D erase_bytes; + } =20 return EFI_SUCCESS; } @@ -106,8 +617,22 @@ VarStoreErase ( IN UINTN LbaLength ) { + if (AddressFvBase) { + return EFI_INVALID_PARAMETER; + } SetMem ((VOID*)Address, LbaLength, 0xff); - mFvInstance->Dirty =3D TRUE; + + if (mFvInstance->FlashOffset) { + GpioPinFuncSet (40, GPIO_FSEL_ALT4); + GpioPinFuncSet (41, GPIO_FSEL_ALT4); + + FlashErase (Address-mFvInstance->FvBase, LbaLength); + + GpioPinFuncSet (40, GPIO_FSEL_ALT0); + GpioPinFuncSet (41, GPIO_FSEL_ALT0); + } else { + mFvInstance->Dirty =3D TRUE; + } =20 return EFI_SUCCESS; } @@ -166,8 +691,16 @@ FvbGetLbaAddress ( // Parse the blockmap of the FV to find which map entry the Lba belong= s to. // while (TRUE) { - NumBlocks =3D BlockMap->NumBlocks; - BlockLength =3D BlockMap->Length; + if (BlockMap->NumBlocks=3D=3D0xFFFFFFFF) { + NumBlocks =3D mFvInstance->NumOfBlocks; + } else { + NumBlocks =3D BlockMap->NumBlocks; + } + if (BlockMap->Length=3D=3D0xFFFFFFFF) { + BlockLength =3D mFvInstance->BlockSize; + } else { + BlockLength =3D BlockMap->Length; + } =20 if (NumBlocks =3D=3D 0 || BlockLength =3D=3D 0) { return EFI_INVALID_PARAMETER; @@ -199,6 +732,7 @@ FvbGetLbaAddress ( Offset =3D Offset + NumBlocks * BlockLength; BlockMap++; } + } =20 =20 @@ -371,6 +905,19 @@ FvbSetVolumeAttributes ( *AttribPtr =3D (*AttribPtr) | NewStatus; *Attributes =3D *AttribPtr; =20 + if (mFvInstance->FlashOffset) { + GpioPinFuncSet (40, GPIO_FSEL_ALT4); + GpioPinFuncSet (41, GPIO_FSEL_ALT4); + + FlashErase (0, 0x1000); + FlashWrite (0, (UINT8*)mFvInstance->VolumeHeader, 0x1000); + + GpioPinFuncSet (40, GPIO_FSEL_ALT0); + GpioPinFuncSet (41, GPIO_FSEL_ALT0); + + } + + return EFI_SUCCESS; } =20 @@ -416,12 +963,16 @@ FvbProtocolGetBlockSize ( =20 --*/ { - return FvbGetLbaAddress ( - Lba, - NULL, - BlockSize, - NumOfBlocks - ); + EFI_STATUS Status; + + Status =3D FvbGetLbaAddress ( + Lba, + NULL, + BlockSize, + NumOfBlocks + ); + + return Status; } =20 =20 @@ -602,7 +1153,7 @@ FvbProtocolWrite ( EFI_FVB_ATTRIBUTES_2 Attributes; UINTN LbaAddress; UINTN LbaLength; - EFI_STATUS Status; + EFI_STATUS Status =3D EFI_SUCCESS; EFI_STATUS ReturnStatus; =20 // @@ -637,6 +1188,7 @@ FvbProtocolWrite ( return EFI_INVALID_PARAMETER; } =20 + // forces this write to split if (LbaLength < (*NumBytes + Offset)) { *NumBytes =3D (UINT32)(LbaLength - Offset); Status =3D EFI_BAD_BUFFER_SIZE; @@ -789,8 +1341,6 @@ ValidateFvHeader ( Expected =3D (UINT16)(((UINTN)FwVolHeader->Checksum + 0x10000 - Checksum) & 0xf= fff); =20 - DEBUG ((DEBUG_INFO, "FV@%p Checksum is 0x%x, expected 0x%x\n", - FwVolHeader, FwVolHeader->Checksum, Expected)); return EFI_NOT_FOUND; } =20 @@ -825,6 +1375,7 @@ FvbInitialize ( UINTN NumOfBlocks; RETURN_STATUS PcdStatus; UINTN StartOffset; + EFI_FIRMWARE_VOLUME_HEADER SpiBuffer[2]; =20 BaseAddress =3D PcdGet32 (PcdNvStorageVariableBase); Length =3D (FixedPcdGet32 (PcdFlashNvStorageVariableSize) + @@ -842,11 +1393,78 @@ FvbInitialize ( =20 mFvInstance->FvBase =3D (UINTN)BaseAddress; mFvInstance->FvLength =3D (UINTN)Length; - mFvInstance->Offset =3D StartOffset; + mFvInstance->BlockSize =3D FixedPcdGet32 (PcdFirmwareBlockSize); + mFvInstance->Offset =3D StartOffset; // Start offset of RPI_EFI.FD fi= le /* * Should I parse config.txt instead and find the real name? */ mFvInstance->MappedFile =3D L"RPI_EFI.FD"; + /* + * SPI Control + */ + mFvInstance->SpiBase =3D BCM2836_SPI0_BASE_ADDRESS; + mFvInstance->FlashOffset =3D 0; + mFvInstance->DisableRuntime =3D 0; + + ZeroMem (SpiBuffer, sizeof (EFI_FIRMWARE_VOLUME_HEADER) * 2); +#if (RPI_MODEL =3D=3D 4) + /* + * On the RPI4 there is a 512KB flash chip + * used to store the low level bcm2711 bootstrap code + * and the XHCI firmware on newer devices. It has between + * ~330K and ~180K available depending on model/version + * Possibly less as its consumed for other purposes. + * It shares a GPIO pin with the 3.5mm audio port (pwm) + * so accessing it causes pops, shzzzz and bzzz + * noices that are sometimes audible even without us. + * During reboot for example. Newer TFA's will presumably + * help us out and disable the audio amp at shutdown + * and leave it disabled during startup. That means + * that this code can bzzzz if TFA hasn't assured the + * audio is off for us. + * + * Runtime audio pops are audible although barely noticable + * in Windows and DT based linux boots. Although the larger + * problem is configuring the GPIO pins. As such we disable + * runtime persistance if either DT boot mode, or ACPI GPIO + * is enabled. + */ + + GpioPinFuncSet (40, GPIO_FSEL_ALT4); + GpioPinFuncSet (41, GPIO_FSEL_ALT4); + GpioPinFuncSet (42, GPIO_FSEL_ALT4); + GpioPinFuncSet (43, GPIO_FSEL_ALT4); + GpioPinFuncSet (44, GPIO_FSEL_ALT4); + GpioPinFuncSet (45, GPIO_FSEL_ALT4); + + GpioSetPull (43, GPIO_PULL_DOWN); + GpioSetPull (44, GPIO_PULL_DOWN); + GpioSetPull (45, GPIO_PULL_DOWN); + + mFvInstance->FlashOffset =3D WalkFlashVolume (); + + if (mFvInstance->FlashOffset) { + if (FlashRead (0, (UINT8*)SpiBuffer, sizeof (EFI_FIRMWARE_VOLUME_HEA= DER)*2) + !=3D sizeof (EFI_FIRMWARE_VOLUME_HEADER) * 2) { + DEBUG ((DEBUG_ERROR, "Unable to read data from SPI\n")); + mFvInstance->FlashOffset =3D 0; + } else { + Status =3D ValidateFvHeader (SpiBuffer); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_INFO, "Invalid header on SPI, recreate volume\n"))= ; + FlashErase (0, Length); + FlashWrite (0, (UINT8*)BaseAddress, Length); + } + + // read the entire varstore... + if (FlashRead (0, (UINT8*)BaseAddress, Length) !=3D Length) { + DEBUG ((DEBUG_ERROR, "Failed to read entire flash region\n")); + } + } + } + GpioPinFuncSet (40, GPIO_FSEL_ALT0); + GpioPinFuncSet (41, GPIO_FSEL_ALT0); +#endif =20 Status =3D ValidateFvHeader (mFvInstance->VolumeHeader); if (!EFI_ERROR (Status)) { @@ -903,7 +1521,9 @@ FvbInitialize ( } =20 // - // The total number of blocks in the FV. + // The total number of blocks in the FV. This should match: + // PcdFlashNvStorageVariableSize + PcdFlashNvStorageFtwWorkingSize + + // PcdFlashNvStorageFtwSpareSize + PcdNvStorageEventLogSize / PcdFirmw= areBlockSize // mFvInstance->NumOfBlocks =3D NumOfBlocks; =20 diff --git a/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockServ= ice.h b/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockService.h index b65c26453d..1b4f6bd877 100644 --- a/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockService.h +++ b/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockService.h @@ -30,9 +30,13 @@ typedef struct { UINTN FvLength; UINTN Offset; UINTN NumOfBlocks; + UINTN BlockSize; EFI_DEVICE_PATH_PROTOCOL *Device; CHAR16 *MappedFile; BOOLEAN Dirty; + UINTN SpiBase; + UINTN FlashOffset; + UINTN DisableRuntime; } EFI_FW_VOL_INSTANCE; =20 extern EFI_FW_VOL_INSTANCE *mFvInstance; @@ -208,4 +212,10 @@ FileClose ( IN EFI_FILE_PROTOCOL *File ); =20 +typedef struct { + UINT64 FvLength; + EFI_FIRMWARE_VOLUME_HEADER FvbInfo; + EFI_FV_BLOCK_MAP_ENTRY End[1]; +} EFI_FVB_MEDIA_INFO; + #endif diff --git a/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockServ= iceDxe.c b/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockServic= eDxe.c index 4071a3fca4..99ae78f158 100644 --- a/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockServiceDxe.= c +++ b/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockServiceDxe.= c @@ -8,8 +8,10 @@ * **/ =20 +#include +#include #include "VarBlockService.h" - +#include "ConfigVars.h" // // Minimum delay to enact before reset, when variables are dirty (in =CE= =BCs). // Needed to ensure that SSD-based USB 3.0 devices have time to flush th= eir @@ -104,9 +106,14 @@ FvbVirtualAddressChangeEvent ( =20 --*/ { + if (mFvInstance->DisableRuntime) { + mFvInstance->FlashOffset =3D 0; //disable flash writes + } + EfiConvertPointer (0x0, (VOID**)&mFvInstance->SpiBase); EfiConvertPointer (0x0, (VOID**)&mFvInstance->FvBase); EfiConvertPointer (0x0, (VOID**)&mFvInstance->VolumeHeader); EfiConvertPointer (0x0, (VOID**)&mFvInstance); + GpioSetupRuntime (); } =20 =20 @@ -175,6 +182,15 @@ DumpVars ( =20 if (!mFvInstance->Dirty) { DEBUG ((DEBUG_INFO, "Variables not dirty, not dumping!\n")); + // if there is a valid SPI flash volume in use, don't delay the rese= t + if (mFvInstance->FlashOffset) { + PcdSet32S (PcdPlatformResetDelay, 0); + } + if ((PcdGet32 (PcdSystemTableMode) =3D=3D SYSTEM_TABLE_MODE_DT) || + PcdGet32 (PcdEnableGpio)) { + mFvInstance->DisableRuntime =3D TRUE; + } + return; } =20 @@ -200,6 +216,24 @@ DumpVars ( mFvInstance->Dirty =3D FALSE; } =20 +STATIC +VOID +EnableAudioLdo (VOID) +{ + EFI_STATUS Status; + RASPBERRY_PI_FIRMWARE_PROTOCOL *mFwProtocol; + + Status =3D gBS->LocateProtocol (&gRaspberryPiFirmwareProtocolGuid, + NULL, (VOID**)&mFwProtocol); + ASSERT_EFI_ERROR (Status); + if (EFI_ERROR (Status)) { + return; + } + + mFwProtocol->SetLdoRegState (1); + ASSERT_EFI_ERROR (Status); +} + =20 VOID ReadyToBootHandler ( @@ -230,6 +264,8 @@ ReadyToBootHandler ( DumpVars (NULL, NULL); Status =3D gBS->CloseEvent (Event); ASSERT_EFI_ERROR (Status); + + EnableAudioLdo (); } =20 =20 diff --git a/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockServ= iceDxe.inf b/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockServ= iceDxe.inf index c2edb25bd4..6fe5a22dd3 100644 --- a/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockServiceDxe.= inf +++ b/Platform/RaspberryPi/Drivers/VarBlockServiceDxe/VarBlockServiceDxe.= inf @@ -37,6 +37,7 @@ MdePkg/MdePkg.dec MdeModulePkg/MdeModulePkg.dec Platform/RaspberryPi/RaspberryPi.dec + Silicon/Broadcom/Bcm283x/Bcm283x.dec =20 [LibraryClasses] BaseLib @@ -44,6 +45,7 @@ DebugLib DevicePathLib DxeServicesTableLib + GpioLib MemoryAllocationLib PcdLib UefiBootServicesTableLib @@ -61,6 +63,7 @@ gEfiBlockIoProtocolGuid gEfiFirmwareVolumeBlockProtocolGuid # PROTOCOL SOMETIMES_PRO= DUCED gEfiDevicePathProtocolGuid # PROTOCOL SOMETIMES_PRO= DUCED + gRaspberryPiFirmwareProtocolGuid ## CONSUMES =20 [FixedPcd] gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize @@ -75,12 +78,15 @@ gArmTokenSpaceGuid.PcdFdSize =20 [Pcd] + gBcm283xTokenSpaceGuid.PcdBcm283xRegistersAddress gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase gRaspberryPiTokenSpaceGuid.PcdNvStorageEventLogBase gRaspberryPiTokenSpaceGuid.PcdPlatformResetDelay gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64 + gRaspberryPiTokenSpaceGuid.PcdSystemTableMode + gRaspberryPiTokenSpaceGuid.PcdEnableGpio =20 [FeaturePcd] =20 --=20 2.13.7