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From: "Abner Chang" <abner.chang@hpe.com>
To: devel@edk2.groups.io
Cc: abner.chang@hpe.com
Subject: [PATCH 14/79] PlatformPkg/Library: Add FirmwareContextProcessorSpecificLib module
Date: Sat,  8 Jan 2022 12:10:34 +0800	[thread overview]
Message-ID: <20220108041121.16005-13-abner.chang@hpe.com> (raw)
In-Reply-To: <20220108041121.16005-1-abner.chang@hpe.com>

(This is migrated from edk2-platforms:Platform/RISC-V)
Add OpenSBI firmware context processor specific library which
provides interface to create processor specific firmware
context hob data.

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
---
 .../FirmwareContextProcessorSpecificLib.inf   |  31 +++++
 .../FirmwareContextProcessorSpecificLib.h     |  53 ++++++++
 .../FirmwareContextProcessorSpecificLib.c     | 119 ++++++++++++++++++
 3 files changed, 203 insertions(+)
 create mode 100644 Platform/RISC-V/PlatformPkg/Library/FirmwareContextProcessorSpecificLib/FirmwareContextProcessorSpecificLib.inf
 create mode 100644 Platform/RISC-V/PlatformPkg/Include/Library/FirmwareContextProcessorSpecificLib.h
 create mode 100644 Platform/RISC-V/PlatformPkg/Library/FirmwareContextProcessorSpecificLib/FirmwareContextProcessorSpecificLib.c

diff --git a/Platform/RISC-V/PlatformPkg/Library/FirmwareContextProcessorSpecificLib/FirmwareContextProcessorSpecificLib.inf b/Platform/RISC-V/PlatformPkg/Library/FirmwareContextProcessorSpecificLib/FirmwareContextProcessorSpecificLib.inf
new file mode 100644
index 0000000000..69568511ce
--- /dev/null
+++ b/Platform/RISC-V/PlatformPkg/Library/FirmwareContextProcessorSpecificLib/FirmwareContextProcessorSpecificLib.inf
@@ -0,0 +1,31 @@
+#/** @file
+#
+#  Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+
+[Defines]
+  INF_VERSION                    = 0x0001001b
+  BASE_NAME                      = FirmwareContextProcessorSpecificLib
+  FILE_GUID                      = 8BEC9FD7-C554-403A-94F1-0EBBFD81A242
+  MODULE_TYPE                    = PEIM
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = FirmwareContextProcessorSpecificLib
+
+[Sources.common]
+  FirmwareContextProcessorSpecificLib.c
+
+[Packages]
+  MdeModulePkg/MdeModulePkg.dec
+  MdePkg/MdePkg.dec
+  Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  PcdLib
+  MemoryAllocationLib
+  PrintLib
+
+
diff --git a/Platform/RISC-V/PlatformPkg/Include/Library/FirmwareContextProcessorSpecificLib.h b/Platform/RISC-V/PlatformPkg/Include/Library/FirmwareContextProcessorSpecificLib.h
new file mode 100644
index 0000000000..f3b096c257
--- /dev/null
+++ b/Platform/RISC-V/PlatformPkg/Include/Library/FirmwareContextProcessorSpecificLib.h
@@ -0,0 +1,53 @@
+/** @file
+  Firmware Context Processor-specific common library
+
+  Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+#ifndef FIRMWARE_CONTEXT_PROCESSOR_SPECIFIC_LIB_H
+#define FIRMWARE_CONTEXT_PROCESSOR_SPECIFIC_LIB_H
+
+#include <IndustryStandard/RiscVOpensbi.h>
+#include <PiPei.h>
+#include <ProcessorSpecificHobData.h>
+
+/**
+  Build up common firmware context processor-specific information
+
+  @param  FirmwareContextHartSpecific  Pointer to EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC
+  @param  ParentProcessorGuid          Pointer to GUID of Processor which contains this core
+  @param  ParentProcessorUid           Unique ID of pysical processor which owns this core.
+  @param  CoreGuid                     Pointer to GUID of core
+  @param  HartId                       Hart ID of this core.
+  @param  IsBootHart                   This is boot hart or not
+  @param  ProcessorSpecDataHob         Pointer to RISC_V_PROCESSOR_SPECIFIC_DATA_HOB
+
+  @return EFI_STATUS
+
+**/
+EFI_STATUS
+EFIAPI
+CommonFirmwareContextHartSpecificInfo (
+  EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC *FirmwareContextHartSpecific,
+  EFI_GUID  *ParentProcessorGuid,
+  UINTN     ParentProcessorUid,
+  EFI_GUID  *CoreGuid,
+  UINTN     HartId,
+  BOOLEAN   IsBootHart,
+  RISC_V_PROCESSOR_SPECIFIC_HOB_DATA *ProcessorSpecDataHob
+  );
+
+/**
+  Print debug information of the processor specific data for a hart
+
+  @param  ProcessorSpecificDataHob     Pointer to RISC_V_PROCESSOR_SPECIFIC_DATA_HOB
+**/
+VOID
+EFIAPI
+DebugPrintHartSpecificInfo (
+  RISC_V_PROCESSOR_SPECIFIC_HOB_DATA *ProcessorSpecificDataHob
+  );
+
+#endif
diff --git a/Platform/RISC-V/PlatformPkg/Library/FirmwareContextProcessorSpecificLib/FirmwareContextProcessorSpecificLib.c b/Platform/RISC-V/PlatformPkg/Library/FirmwareContextProcessorSpecificLib/FirmwareContextProcessorSpecificLib.c
new file mode 100644
index 0000000000..c62f77bc49
--- /dev/null
+++ b/Platform/RISC-V/PlatformPkg/Library/FirmwareContextProcessorSpecificLib/FirmwareContextProcessorSpecificLib.c
@@ -0,0 +1,119 @@
+/**@file
+  Common library to build upfirmware context processor-specific information
+
+  Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+//
+// The package level header files this module uses
+//
+#include <PiPei.h>
+
+//
+// The Library classes this module consumes
+//
+#include <IndustryStandard/RiscVOpensbi.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PeiServicesLib.h>
+#include <ProcessorSpecificHobData.h>
+#include <RiscVImpl.h>
+#include <sbi/sbi_hart.h>
+
+/**
+  Build up common firmware context processor-specific information
+
+  @param  FirmwareContextHartSpecific  Pointer to EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC
+  @param  ParentProcessorGuid          Pointer to GUID of Processor which contains this core
+  @param  ParentProcessorUid           Unique ID of pysical processor which owns this core.
+  @param  CoreGuid                     Pointer to GUID of core
+  @param  HartId                       Hart ID of this core.
+  @param  IsBootHart                   This is boot hart or not
+  @param  ProcessorSpecificDataHob     Pointer to RISC_V_PROCESSOR_SPECIFIC_DATA_HOB
+
+  @return EFI_STATUS
+
+**/
+EFI_STATUS
+EFIAPI
+CommonFirmwareContextHartSpecificInfo (
+  EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC *FirmwareContextHartSpecific,
+  EFI_GUID  *ParentProcessorGuid,
+  UINTN     ParentProcessorUid,
+  EFI_GUID  *CoreGuid,
+  UINTN     HartId,
+  BOOLEAN   IsBootHart,
+  RISC_V_PROCESSOR_SPECIFIC_HOB_DATA *ProcessorSpecificDataHob
+  )
+{
+  //
+  // Build up RISC_V_PROCESSOR_SPECIFIC_DATA_HOB.
+  //
+  CopyGuid (&ProcessorSpecificDataHob->ParentPrcessorGuid, ParentProcessorGuid);
+  ProcessorSpecificDataHob->ParentProcessorUid = ParentProcessorUid;
+  CopyGuid (&ProcessorSpecificDataHob->CoreGuid, CoreGuid);
+  ProcessorSpecificDataHob->Context = NULL;
+  ProcessorSpecificDataHob->ProcessorSpecificData.Revision =
+    SMBIOS_RISC_V_PROCESSOR_SPECIFIC_DATA_REVISION;
+  ProcessorSpecificDataHob->ProcessorSpecificData.Length =
+    sizeof (SMBIOS_RISC_V_PROCESSOR_SPECIFIC_DATA);
+  ProcessorSpecificDataHob->ProcessorSpecificData.HartId.Value64_L = (UINT64)HartId;
+  ProcessorSpecificDataHob->ProcessorSpecificData.HartId.Value64_H = 0;
+  ProcessorSpecificDataHob->ProcessorSpecificData.BootHartId = (UINT8)IsBootHart;
+  ProcessorSpecificDataHob->ProcessorSpecificData.InstSetSupported =
+    FirmwareContextHartSpecific->IsaExtensionSupported;
+  ProcessorSpecificDataHob->ProcessorSpecificData.PrivilegeModeSupported =
+    SMBIOS_RISC_V_PSD_MACHINE_MODE_SUPPORTED;
+  if ((ProcessorSpecificDataHob->ProcessorSpecificData.InstSetSupported &
+    RISC_V_ISA_SUPERVISOR_MODE_IMPLEMENTED) != 0) {
+    ProcessorSpecificDataHob->ProcessorSpecificData.PrivilegeModeSupported |=
+      SMBIOS_RISC_V_PSD_SUPERVISOR_MODE_SUPPORTED;
+  }
+  if ((ProcessorSpecificDataHob->ProcessorSpecificData.InstSetSupported &
+    RISC_V_ISA_USER_MODE_IMPLEMENTED) != 0) {
+    ProcessorSpecificDataHob->ProcessorSpecificData.PrivilegeModeSupported |=
+      SMBIOS_RISC_V_PSD_USER_MODE_SUPPORTED;
+  }
+  ProcessorSpecificDataHob->ProcessorSpecificData.MachineVendorId.Value64_L =
+    FirmwareContextHartSpecific->MachineVendorId.Value64_L;
+  ProcessorSpecificDataHob->ProcessorSpecificData.MachineVendorId.Value64_H =
+    FirmwareContextHartSpecific->MachineVendorId.Value64_H;
+  ProcessorSpecificDataHob->ProcessorSpecificData.MachineArchId.Value64_L =
+    FirmwareContextHartSpecific->MachineArchId.Value64_L;
+  ProcessorSpecificDataHob->ProcessorSpecificData.MachineArchId.Value64_H =
+    FirmwareContextHartSpecific->MachineArchId.Value64_H;
+  ProcessorSpecificDataHob->ProcessorSpecificData.MachineImplId.Value64_L =
+    FirmwareContextHartSpecific->MachineImplId.Value64_L;
+  ProcessorSpecificDataHob->ProcessorSpecificData.MachineImplId.Value64_H =
+    FirmwareContextHartSpecific->MachineImplId.Value64_H;
+  return EFI_SUCCESS;
+}
+
+/**
+  Print debug information of the processor specific data for a hart
+
+  @param  ProcessorSpecificDataHob     Pointer to RISC_V_PROCESSOR_SPECIFIC_DATA_HOB
+**/
+VOID
+EFIAPI
+DebugPrintHartSpecificInfo (
+  RISC_V_PROCESSOR_SPECIFIC_HOB_DATA *ProcessorSpecificDataHob
+  )
+{
+  DEBUG ((DEBUG_INFO, "        *HartId = 0x%x\n", ProcessorSpecificDataHob->ProcessorSpecificData.HartId.Value64_L));
+  DEBUG ((DEBUG_INFO, "        *Is Boot Hart? = 0x%x\n", ProcessorSpecificDataHob->ProcessorSpecificData.BootHartId));
+  DEBUG ((DEBUG_INFO, "        *PrivilegeModeSupported = 0x%x\n", ProcessorSpecificDataHob->ProcessorSpecificData.PrivilegeModeSupported));
+  DEBUG ((DEBUG_INFO, "        *MModeExcepDelegation = 0x%x\n", ProcessorSpecificDataHob->ProcessorSpecificData.MModeExcepDelegation.Value64_L));
+  DEBUG ((DEBUG_INFO, "        *MModeInterruptDelegation = 0x%x\n", ProcessorSpecificDataHob->ProcessorSpecificData.MModeInterruptDelegation.Value64_L));
+  DEBUG ((DEBUG_INFO, "        *HartXlen = 0x%x\n", ProcessorSpecificDataHob->ProcessorSpecificData.HartXlen ));
+  DEBUG ((DEBUG_INFO, "        *MachineModeXlen = 0x%x\n", ProcessorSpecificDataHob->ProcessorSpecificData.MachineModeXlen));
+  DEBUG ((DEBUG_INFO, "        *SupervisorModeXlen = 0x%x\n", ProcessorSpecificDataHob->ProcessorSpecificData.SupervisorModeXlen));
+  DEBUG ((DEBUG_INFO, "        *UserModeXlen = 0x%x\n", ProcessorSpecificDataHob->ProcessorSpecificData.UserModeXlen));
+  DEBUG ((DEBUG_INFO, "        *InstSetSupported = 0x%x\n", ProcessorSpecificDataHob->ProcessorSpecificData.InstSetSupported));
+  DEBUG ((DEBUG_INFO, "        *MachineVendorId = 0x%x\n", ProcessorSpecificDataHob->ProcessorSpecificData.MachineVendorId.Value64_L));
+  DEBUG ((DEBUG_INFO, "        *MachineArchId = 0x%x\n", ProcessorSpecificDataHob->ProcessorSpecificData.MachineArchId.Value64_L));
+  DEBUG ((DEBUG_INFO, "        *MachineImplId = 0x%x\n", ProcessorSpecificDataHob->ProcessorSpecificData.MachineImplId.Value64_L));
+}
-- 
2.31.1


  parent reply	other threads:[~2022-01-08  5:12 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-08  4:10 [PATCH 02/79] ProcessorPkg/Library: RISC-V CPU library Abner Chang
2022-01-08  4:10 ` [PATCH 03/79] ProcessorPkg/Library: Add RISC-V exception library Abner Chang
2022-01-08  4:10 ` [PATCH 04/79] ProcessorPkg/Library: Add RISC-V timer library Abner Chang
2022-01-08  4:10 ` [PATCH 05/79] ProcessorPkg/RiscVOpensbLib: Add opensbi submodule Abner Chang
2022-01-08  4:10 ` [PATCH 06/79] ProcessorPkg/Library: Add RiscVOpensbiLib Abner Chang
2022-01-08  4:10 ` [PATCH 07/79] ProcessorPkg/Library: Add RiscVEdk2SbiLib Abner Chang
2022-01-08  4:10 ` [PATCH 08/79] ProcessorPkg/Library: RISC-V PEI Service Table Pointer library Abner Chang
2022-01-08  4:10 ` [PATCH 09/79] ProcessorPkg/CpuDxe: Add RISC-V CPU DXE driver Abner Chang
2022-01-08  4:10 ` [PATCH 10/79] ProcessorPkg/SmbiosDxe: Generic SMBIOS DXE driver for RISC-V platforms Abner Chang
2022-01-08  4:10 ` [PATCH 11/79] ProcesorPkg/Library: NULL instance of RISC-V platform timer library Abner Chang
2022-01-08  4:10 ` [PATCH 12/79] RISC-V/ProcessorPkg: RISC-V package Abner Chang
2022-01-08  4:10 ` [PATCH 13/79] PlatformPkg/Library: RISC-V Platform Temporary Memory library Abner Chang
2022-01-08  4:10 ` Abner Chang [this message]
2022-01-08  4:10 ` [PATCH 15/79] PlatformPkg/Library: NULL instance of RiscVOpensbiPlatformLib Abner Chang
2022-01-08  4:10 ` [PATCH 16/79] PlatformPkg/Library: NULL instance of PlatformMemoryTestLib Abner Chang
2022-01-08  4:10 ` [PATCH 17/79] PlatformPkg/Library: NULL instance of PlatformUpdateProgressLib Abner Chang
2022-01-08  4:10 ` [PATCH 18/79] PlatformPkg/Library: Platform Boot Manager library Abner Chang
2022-01-08  4:10 ` [PATCH 19/79] PlatformPkg/SecMain: RISC-V SecMain module Abner Chang
2022-01-08  4:10 ` [PATCH 20/79] PlatformPkg: Add RiscVPlatformPkg Abner Chang
2022-01-08  4:10 ` [PATCH 21/79] RISC-V/PlatformPkg: Revise Readme.md Abner Chang
2022-01-08  4:10 ` [PATCH 22/79] Silicon/SiFive: Handle case of NULL FirmwareContext Abner Chang
2022-01-08  4:10 ` [PATCH 23/79] Silicon/RISC-V: Update old SMBIOS struct filed name Abner Chang
2022-01-08  4:10 ` [PATCH 24/79] Platform/RISC-V: Consume MdeLibs.dsc.inc for RegisterFilterLib Abner Chang
2022-01-08  4:10 ` [PATCH 25/79] Silicon/RISC_V: " Abner Chang
2022-01-08  4:10 ` [PATCH 26/79] RISC-V/CpuDxe: Ignore set memory attributes failure Abner Chang
2022-01-08  4:10 ` [PATCH 27/79] Signal EndOfDxe in boot manager Abner Chang
2022-01-08  4:10 ` [PATCH 28/79] U5SeriesPkg: Deduplicate PlatformPei Abner Chang
2022-01-08  4:10 ` [PATCH 29/79] RISC-V: Split SMBIOS out of PlatformPei Abner Chang
2022-01-08  4:10 ` [PATCH 30/79] RISC-V: Use U5 SMBIOS library only for those platforms Abner Chang
2022-01-08  4:10 ` [PATCH 31/79] Silicon/RISC-V: Introduce FirmwareContext library Abner Chang
2022-01-08  4:10 ` [PATCH 32/79] Silicon/RISC-V: PeiServiceTableLib uses RiscVFirmwareContextLib Abner Chang
2022-01-08  4:10 ` [PATCH 33/79] RISC-V/PlatformPkg: Build DeviceTree and use that in SEC Abner Chang
2022-01-08  4:10 ` [PATCH 34/79] RISC-V/PlatformPkg: Add FdtPeim to pass DTB from PEI to DXE via HOB Abner Chang
2022-01-08  4:10 ` [PATCH 35/79] RISC-V/PlatformPkg: Fixup FDT from HOB and install into config table Abner Chang
2022-01-08  4:10 ` [PATCH 36/79] RISC-V: Switch to latest OpenSBI Abner Chang
2022-01-08  4:10 ` [PATCH 37/79] RISC-V: Implement ResetSystem RT call Abner Chang
2022-01-08  4:10 ` [PATCH 38/79] Move OpenSbiPlatformLib to RISC-V/PlatformPkg Abner Chang
2022-01-08  4:10 ` [PATCH 39/79] RISC-V/PlatformPkg: Update document Abner Chang
2022-01-08  4:11 ` [PATCH 40/79] RISC-V: Add RISC-V PeiCoreEntryPoint library Abner Chang

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