From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0b-002e3701.pphosted.com (mx0b-002e3701.pphosted.com [148.163.143.35]) by mx.groups.io with SMTP id smtpd.web10.2663.1641618762713026509 for ; Fri, 07 Jan 2022 21:12:42 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@hpe.com header.s=pps0720 header.b=iGcAMbAm; spf=permerror, err=parse error for token &{10 18 %{ir}.%{v}.%{d}.spf.has.pphosted.com}: invalid domain name (domain: hpe.com, ip: 148.163.143.35, mailfrom: prvs=000704d8ca=abner.chang@hpe.com) Received: from pps.filterd (m0148664.ppops.net [127.0.0.1]) by mx0b-002e3701.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 2084us7l010349 for ; Sat, 8 Jan 2022 05:12:42 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=hpe.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : content-transfer-encoding : mime-version; s=pps0720; bh=UGqmwPgumWdTRl8+r4svZdlpmj3KE7cvhf6mxdnTLu8=; b=iGcAMbAmkIE3n2jf1RPosS+K2wxrnpJ1A95jFWrLnjTSuWEuXQN0jmEoLrTVHPAzcPMQ MiQ7IGNWb1qkHnaV8WWQpvfMMVO3zhPXje30rf64Acyprz/17o1nIgGnEVS9A5Lm7qZ6 0Wtf6jy/P8pCG5oWfzLMAcKnT+tc5SY9bI9xB78KfGlZrdjUkPK0yGXJhpLF+RzgmnOn 40TtQ8zuIfmpjhdVSpKVm9x+FseEi22gAVQmxkcvWI3jrjgE9CblD2fMq9G1BhwCKMGk 4OV3woCayX9LeYp6+2aNjDyyUymsd930MGwhlBEQpxaGV1kOII9I6mnmYmMqt9eg+KIg IQ== Received: from g2t2353.austin.hpe.com (g2t2353.austin.hpe.com [15.233.44.26]) by mx0b-002e3701.pphosted.com (PPS) with ESMTPS id 3df1qw8ky7-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Sat, 08 Jan 2022 05:12:41 +0000 Received: from g2t2360.austin.hpecorp.net (g2t2360.austin.hpecorp.net [16.196.225.135]) by g2t2353.austin.hpe.com (Postfix) with ESMTP id 27F5065 for ; Sat, 8 Jan 2022 05:12:41 +0000 (UTC) Received: from UB16Abner.asiapacific.hpqcorp.net (ub16abner.asiapacific.hpqcorp.net [15.119.209.229]) by g2t2360.austin.hpecorp.net (Postfix) with ESMTP id 70C6739; Sat, 8 Jan 2022 05:12:40 +0000 (UTC) From: "Abner Chang" To: devel@edk2.groups.io Cc: abner.chang@hpe.com Subject: [PATCH 20/79] PlatformPkg: Add RiscVPlatformPkg Date: Sat, 8 Jan 2022 12:10:40 +0800 Message-Id: <20220108041121.16005-19-abner.chang@hpe.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220108041121.16005-1-abner.chang@hpe.com> References: <20220108041121.16005-1-abner.chang@hpe.com> X-Proofpoint-ORIG-GUID: ddZlMG-sowClMTVT0al5UjboSzhN2o7K X-Proofpoint-GUID: ddZlMG-sowClMTVT0al5UjboSzhN2o7K X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-HPE-SCL: -1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-01-08_01,2022-01-07_01,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 adultscore=0 priorityscore=1501 lowpriorityscore=0 mlxscore=0 phishscore=0 malwarescore=0 clxscore=1015 suspectscore=0 impostorscore=0 mlxlogscore=999 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2110150000 definitions=main-2201080036 Content-Transfer-Encoding: quoted-printable (This is migrated from edk2-platforms:Platform/RISC-V) Add RISC-V platform package. Signed-off-by: Abner Chang Co-authored-by: Daniel Schaefer Co-authored-by: Gilbert Chen Reviewed-by: Leif Lindholm Cc: Leif Lindholm Cc: Gilbert Chen --- .../RISC-V/PlatformPkg/RiscVPlatformPkg.dec | 77 +++++++++++++ .../RISC-V/PlatformPkg/RiscVPlatformPkg.dsc | 81 ++++++++++++++ Platform/RISC-V/PlatformPkg/Readme.md | 104 ++++++++++++++++++ .../RISC-V/PlatformPkg/RiscVPlatformPkg.uni | 15 +++ .../PlatformPkg/RiscVPlatformPkgExtra.uni | 12 ++ 5 files changed, 289 insertions(+) create mode 100644 Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec create mode 100644 Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dsc create mode 100644 Platform/RISC-V/PlatformPkg/Readme.md create mode 100644 Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.uni create mode 100644 Platform/RISC-V/PlatformPkg/RiscVPlatformPkgExtra.uni diff --git a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec b/Platform/RI= SC-V/PlatformPkg/RiscVPlatformPkg.dec new file mode 100644 index 0000000000..48aeb97431 --- /dev/null +++ b/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec @@ -0,0 +1,77 @@ +## @file RiscVPlatformPkg.dec=0D +# This Package provides UEFI RISC-V platform modules and libraries.=0D +#=0D +# Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All right= s reserved.
=0D +#=0D +# SPDX-License-Identifier: BSD-2-Clause-Patent=0D +#=0D +##=0D +=0D +[Defines]=0D + DEC_SPECIFICATION =3D 0x0001001b=0D + PACKAGE_NAME =3D RiscVPlatformPkg=0D + PACKAGE_UNI_FILE =3D RiscVPlatformPkg.uni=0D + PACKAGE_GUID =3D B51DBDBB-B43D-4D45-8CDD-1D6D1C691003= =0D + PACKAGE_VERSION =3D 1.0=0D +=0D +[Includes]=0D + Include=0D +=0D +[LibraryClasses]=0D + FirmwareContextProcessorSpecificLib|Include/Library/FirmwareContextProce= ssorSpecificLib.h=0D + RiscVPlatformTempMemoryInitLib|Include/Library/RiscVPlatformTempMemoryIn= itLib.h=0D +=0D +[Guids]=0D + gUefiRiscVPlatformPkgTokenSpaceGuid =3D {0x6A67AF99, 0x4592, 0x40F8, { = 0xB6, 0xBE, 0x62, 0xBC, 0xA1, 0x0D, 0xA1, 0xEC}}=0D +=0D +[PcdsFixedAtBuild]=0D + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVSecFvBase|0x0|UINT32|0x00001= 000=0D + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVSecFvSize|0x0|UINT32|0x00001= 001=0D + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVPeiFvBase|0x0|UINT32|0x00001= 002=0D + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVPeiFvSize|0x0|UINT32|0x00001= 003=0D + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDxeFvBase|0x0|UINT32|0x00001= 004=0D + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDxeFvSize|0x0|UINT32|0x00001= 005=0D +=0D +#=0D +# Definition of EFI Variable region=0D +#=0D + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdVariableFdBaseAddress|0|UINT32|0x= 00001010=0D + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdVariableFdSize|0|UINT32|0x0000101= 1=0D + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdVariableFdBlockSize|0|UINT32|0x00= 001012=0D + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdPlatformFlashNvStorageVariableBas= e|0|UINT32|0x00001013=0D + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdPlatformFlashNvStorageFtwWorkingB= ase|0|UINT32|0x00001014=0D + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdPlatformFlashNvStorageFtwSpareBas= e|0|UINT32|0x00001015=0D +#=0D +# Firmware region which is protected by PMP.=0D +#=0D + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdFwBlockSize|0|UINT32|0x00001020=0D + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdFwStartAddress|0|UINT32|0x0000102= 1=0D + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdFwEndAddress|0|UINT32|0x00001022= =0D +#=0D +# Definition of RISC-V Hart=0D +#=0D + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdHartCount|0|UINT32|0x00001023=0D + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootHartId|0|UINT32|0x00001024=0D +#=0D +# The bootable hart core number, which is incorporate with OpenSBI platfor= m hart_index2id value.=0D +#=0D + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootableHartNumber|0|UINT32|0x000= 01025=0D +#=0D +# Definitions for OpenSbi=0D +#=0D + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdScratchRamBase|0|UINT32|0x0000110= 0=0D + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdScratchRamSize|0|UINT32|0x0000110= 1=0D + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdOpenSbiStackSize|0|UINT32|0x00001= 102=0D + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdTemporaryRamBase|0|UINT32|0x00001= 103=0D + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdTemporaryRamSize|0|UINT32|0x00001= 104=0D + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdPeiCorePrivilegeMode|0|UINT32|0x0= 0001105=0D +=0D +[PcdsPatchableInModule]=0D +=0D +[PcdsFeatureFlag]=0D + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootlogoOnlyEnable|FALSE|BOOLEAN|= 0x00001006=0D +=0D +[PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]=0D +=0D +[UserExtensions.TianoCore."ExtraFiles"]=0D + RiscVPlatformPkgExtra.uni=0D diff --git a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dsc b/Platform/RI= SC-V/PlatformPkg/RiscVPlatformPkg.dsc new file mode 100644 index 0000000000..092717d2ef --- /dev/null +++ b/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dsc @@ -0,0 +1,81 @@ +#/** @file=0D +# RISC-V platform package.=0D +#=0D +# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All right= s reserved.
=0D +#=0D +# SPDX-License-Identifier: BSD-2-Clause-Patent=0D +#=0D +#**/=0D +=0D +##########################################################################= ######=0D +#=0D +# Defines Section=0D +#=0D +##########################################################################= ######=0D +[Defines]=0D + PLATFORM_NAME =3D RiscVPlatform=0D + PLATFORM_GUID =3D 840A9576-5869-491E-9210-89769DED4650= =0D + PLATFORM_VERSION =3D 0.1=0D + DSC_SPECIFICATION =3D 0x0001001c=0D + OUTPUT_DIRECTORY =3D Build/$(PLATFORM_NAME)=0D + SUPPORTED_ARCHITECTURES =3D RISCV64=0D + BUILD_TARGETS =3D DEBUG|RELEASE|NOOPT=0D + SKUID_IDENTIFIER =3D DEFAULT=0D +=0D +[BuildOptions]=0D + GCC:RELEASE_*_*_CC_FLAGS =3D -DMDEPKG_NDEBUG=0D +!ifdef $(SOURCE_DEBUG_ENABLE)=0D + GCC:*_*_RISCV64_GENFW_FLAGS =3D --keepexceptiontable=0D +!endif=0D +=0D +##########################################################################= ######=0D +#=0D +# SKU Identification section - list of all SKU IDs supported by this Platf= orm.=0D +#=0D +##########################################################################= ######=0D +[SkuIds]=0D + 0|DEFAULT=0D +=0D +[LibraryClasses.common]=0D + RiscVOpensbiPlatformLib|Platform/RISC-V/PlatformPkg/Library/OpensbiPlatf= ormLibNull/OpensbiPlatformLibNull.inf=0D + RiscVCpuLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/RiscVCpuLib.= inf=0D + RiscVEdk2SbiLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/Risc= VEdk2SbiLib.inf=0D + RiscVOpensbiLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/Risc= VOpensbiLib.inf=0D + BaseLib|MdePkg/Library/BaseLib/BaseLib.inf=0D + BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf=0D + DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.i= nf=0D + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf=0D + HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf=0D + IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf=0D + MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAll= ocationLib.inf=0D + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf=0D + PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeC= offExtraActionLibNull.inf=0D + PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf=0D + PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf=0D + SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull= .inf=0D + TimerLib|MdePkg/Library/BaseTimerLibNullTemplate/BaseTimerLibNullTemplat= e.inf=0D + PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeC= offGetEntryPointLib.inf=0D +=0D +[LibraryClasses.common.PEIM]=0D + FirmwareContextProcessorSpecificLib|Platform/RISC-V/PlatformPkg/Library/= FirmwareContextProcessorSpecificLib/FirmwareContextProcessorSpecificLib.inf= =0D + HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf=0D + MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAlloc= ationLib.inf=0D + PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf=0D +=0D +[LibraryClasses.common.SEC]=0D + ExtractGuidedSectionLib|MdePkg/Library/BaseExtractGuidedSectionLib/BaseE= xtractGuidedSectionLib.inf=0D +=0D +[LibraryClasses.common.DXE_DRIVER]=0D + PlatformBootManagerLib|Platform/RISC-V/PlatformPkg/Library/PlatformBootM= anagerLib/PlatformBootManagerLib.inf=0D +=0D +[Components.common]=0D + Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLibNull/OpensbiPlatfo= rmLibNull.inf=0D + Platform/RISC-V/PlatformPkg/Library/PlatformMemoryTestLibNull/PlatformMe= moryTestLibNull.inf=0D + Platform/RISC-V/PlatformPkg/Library/PlatformBootManagerLib/PlatformBootM= anagerLib.inf=0D + Platform/RISC-V/PlatformPkg/Library/PlatformUpdateProgressLibNull/Platfo= rmUpdateProgressLibNull.inf=0D + Platform/RISC-V/PlatformPkg/Library/FirmwareContextProcessorSpecificLib/= FirmwareContextProcessorSpecificLib.inf=0D + Platform/RISC-V/PlatformPkg/Library/RiscVPlatformTempMemoryInitLibNull/R= iscVPlatformTempMemoryInitLibNull.inf=0D +=0D +[Components.common.SEC]=0D + Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf=0D +=0D diff --git a/Platform/RISC-V/PlatformPkg/Readme.md b/Platform/RISC-V/Platfo= rmPkg/Readme.md new file mode 100644 index 0000000000..2632ebeb28 --- /dev/null +++ b/Platform/RISC-V/PlatformPkg/Readme.md @@ -0,0 +1,104 @@ +# Introduction=0D +=0D +## EDK2 RISC-V Platform Packages=0D +RISC-V platform package provides the generic and common modules for RISC-V= =0D +platforms. RISC-V platform package could include RiscPlatformPkg.dec to=0D +use the common drivers, libraries, definitions, PCDs and etc. for the=0D +platform development.=0D +=0D +There are two packages to support RISC-V:=0D +- `edk2-platforms/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec`=0D +- `edk2-platforms/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec`=0D +=0D +`RiscVPlatformPkg` provides SEC phase and NULL libs.=0D +`RiscVProcessorPkg` provides many libraries, PEIMs and DXE drivers.=0D +=0D +### Download the sources ###=0D +```=0D +git clone https://github.com/tianocore/edk2.git=0D +=0D +git clone https://github.com/changab/edk2-platforms.git=0D +# Check out branch: riscv-smode-lib=0D +```=0D +=0D +To build it, you have to follow the regular steps for EDK2 and additionall= y set=0D +an environmen variable to point to your RISC-V toolchain installation,=0D +including the binary prefixes:=0D +=0D +```=0D +export GCC5_RISCV64_PREFIX=3D/riscv-gnu-toolchain-binaries/bin/riscv64-unk= nown-elf-=0D +```=0D +=0D +Then you can build the image for the SiFive HifiveUnleashed platform:=0D +=0D +```=0D +build -a RISCV64 -t GCC5 -p Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveU= nleashedBoard/U540.dsc=0D +```=0D +=0D +### EDK2 project=0D +All changes in edk2 are upstream, however, most of the RISC-V code is in=0D +edk2-platforms. Therefore you have to check out the branch `riscv-smode-li= b` on=0D +`github.com/changab/edk2-platforms`.=0D +=0D +The build architecture which is supported and verified so far is `RISCV64`= .=0D +The latest master of the RISC-V toolchain https://github.com/riscv/riscv-g= nu-toolchain=0D +should work but the latest verified commit is `b468107e701433e1caca3dbc8ae= f8d40`.=0D +Toolchain tag is "GCC5" declared in `tools_def.txt`=0D +=0D +## RISC-V Platform PCD settings=0D +### EDK2 Firmware Volume Settings=0D +EDK2 Firmware volume related PCDs which declared in platform FDF file.=0D +=0D +| **PCD name** |**Usage**|=0D +|--------------|---------|=0D +|PcdRiscVSecFvBase| The base address of SEC Firmware Volume|=0D +|PcdRiscVSecFvSize| The size of SEC Firmware Volume|=0D +|PcdRiscVPeiFvBase| The base address of PEI Firmware Volume|=0D +|PcdRiscVPeiFvSize| The size of SEC Firmware Volume|=0D +|PcdRiscVDxeFvBase| The base address of DXE Firmware Volume|=0D +|PcdRiscVDxeFvSize| The size of SEC Firmware Volume|=0D +=0D +### EDK2 EFI Variable Region Settings=0D +The PCD settings regard to EFI Variable=0D +=0D +| **PCD name** |**Usage**|=0D +|--------------|---------|=0D +|PcdVariableFdBaseAddress| The EFI variable firmware device base address|= =0D +|PcdVariableFdSize| The EFI variable firmware device size|=0D +|PcdVariableFdBlockSize| The block size of EFI variable firmware device|=0D +|PcdPlatformFlashNvStorageVariableBase| EFI variable base address within f= irmware device|=0D +|PcdPlatformFlashNvStorageFtwWorkingBase| The base address of EFI variable= fault tolerance worksapce (FTW) within firmware device|=0D +|PcdPlatformFlashNvStorageFtwSpareBase| The base address of EFI variable s= pare FTW within firmware device|=0D +=0D +### RISC-V Physical Memory Protection (PMP) Region Settings=0D +Below PCDs could be set in platform FDF file.=0D +=0D +| **PCD name** |**Usage**|=0D +|--------------|---------|=0D +|PcdFwStartAddress| The starting address of firmware region to protected b= y PMP|=0D +|PcdFwEndAddress| The ending address of firmware region to protected by PM= P|=0D +=0D +### RISC-V Processor HART Settings=0D +=0D +| **PCD name** |**Usage**|=0D +|--------------|---------|=0D +|PcdHartCount| Number of RISC-V HARTs, the value is processor-implementati= on specific|=0D +|PcdBootHartId| The ID of RISC-V HART to execute main fimrware code and bo= ot system to OS|=0D +=0D +### RISC-V OpenSBI Settings=0D +=0D +| **PCD name** |**Usage**|=0D +|--------------|---------|=0D +|PcdScratchRamBase| The base address of OpenSBI scratch buffer for all RIS= C-V HARTs|=0D +|PcdScratchRamSize| The total size of OpenSBI scratch buffer for all RISC-= V HARTs|=0D +|PcdOpenSbiStackSize| The size of initial stack of each RISC-V HART for bo= oting system use OpenSBI|=0D +|PcdTemporaryRamBase| The base address of temporary memory for PEI phase|= =0D +|PcdTemporaryRamSize| The temporary memory size for PEI phase|=0D +=0D +## Supported Operating Systems=0D +Only support to boot to EFI Shell so far.=0D +=0D +Porting GRUB2 and Linux EFISTUB is in progress.=0D +=0D +## Known Issues and Limitations=0D +Only RISC-V RV64 is verified.=0D diff --git a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.uni b/Platform/RI= SC-V/PlatformPkg/RiscVPlatformPkg.uni new file mode 100644 index 0000000000..deb91fa10c --- /dev/null +++ b/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.uni @@ -0,0 +1,15 @@ +// /** @file=0D +// RISC-V Package Localized Strings and Content.=0D +//=0D +// Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
=0D +//=0D +// SPDX-License-Identifier: BSD-2-Clause-Patent=0D +//=0D +// **/=0D +=0D +=0D +#string STR_PACKAGE_ABSTRACT #language en-US "Provides UEFI com= patible RISC-V platform modules and libraries"=0D +=0D +#string STR_PACKAGE_DESCRIPTION #language en-US "This Package prov= ides UEFI compatible RISC-V platform modules and libraries."=0D +=0D +=0D diff --git a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkgExtra.uni b/Platfo= rm/RISC-V/PlatformPkg/RiscVPlatformPkgExtra.uni new file mode 100644 index 0000000000..493f5f42fe --- /dev/null +++ b/Platform/RISC-V/PlatformPkg/RiscVPlatformPkgExtra.uni @@ -0,0 +1,12 @@ +// /** @file=0D +// RISC-V Package Localized Strings and Content.=0D +//=0D +// Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
=0D +//=0D +// SPDX-License-Identifier: BSD-2-Clause-Patent=0D +//=0D +// **/=0D +=0D +#string STR_PROPERTIES_PACKAGE_NAME=0D +#language en-US=0D +"RISC-V platform package"=0D --=20 2.31.1