From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0b-002e3701.pphosted.com (mx0b-002e3701.pphosted.com [148.163.143.35]) by mx.groups.io with SMTP id smtpd.web10.2665.1641618767742324719 for ; Fri, 07 Jan 2022 21:12:47 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@hpe.com header.s=pps0720 header.b=VBzYzUXU; spf=permerror, err=parse error for token &{10 18 %{ir}.%{v}.%{d}.spf.has.pphosted.com}: invalid domain name (domain: hpe.com, ip: 148.163.143.35, mailfrom: prvs=000704d8ca=abner.chang@hpe.com) Received: from pps.filterd (m0150245.ppops.net [127.0.0.1]) by mx0b-002e3701.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 2084ffau020515 for ; Sat, 8 Jan 2022 05:12:47 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=hpe.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : content-transfer-encoding : mime-version; s=pps0720; bh=GdJyeqp0BgsZ7lWTuQtKhHmDJlWmPi6IbNjhaKwqzAM=; b=VBzYzUXUnbmoL33pUx/ev4QphZPGwCxoWfE2RkmcJt86l+qCVDydY91hbRisxdNAoSec K/gUgUU8YfxL5Gn5B6+VSFDvbe9cbGgbhfWvBNVfdR9r7dINCQxZ0b1vgn5/fc/tnB1k Gf0v2WeMAjq+aF6tgIxgbgmAtWDcR9yt2Xyyney2bf3dH1EQu60KfZVoN6gzhnu4wNzq yxPARbFpFfDZFHl6cd/06U/ijw/b1TQk6Ns5UjjKDBc09p6uJ48isKIApE6Lm9dAnRHu XbwbgNS9iLzsfgNvSE46OpHmsF9xl0iWWcKmaoTPSqv0zdu45UTPuhry0XrRb1WaJCym gQ== Received: from g2t2353.austin.hpe.com (g2t2353.austin.hpe.com [15.233.44.26]) by mx0b-002e3701.pphosted.com (PPS) with ESMTPS id 3df3tfg4bw-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Sat, 08 Jan 2022 05:12:46 +0000 Received: from g2t2360.austin.hpecorp.net (g2t2360.austin.hpecorp.net [16.196.225.135]) by g2t2353.austin.hpe.com (Postfix) with ESMTP id 5AF4B84 for ; Sat, 8 Jan 2022 05:12:46 +0000 (UTC) Received: from UB16Abner.asiapacific.hpqcorp.net (ub16abner.asiapacific.hpqcorp.net [15.119.209.229]) by g2t2360.austin.hpecorp.net (Postfix) with ESMTP id A371439; Sat, 8 Jan 2022 05:12:45 +0000 (UTC) From: "Abner Chang" To: devel@edk2.groups.io Cc: abner.chang@hpe.com Subject: [PATCH 25/79] Silicon/RISC_V: Consume MdeLibs.dsc.inc for RegisterFilterLib Date: Sat, 8 Jan 2022 12:10:45 +0800 Message-Id: <20220108041121.16005-24-abner.chang@hpe.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220108041121.16005-1-abner.chang@hpe.com> References: <20220108041121.16005-1-abner.chang@hpe.com> X-Proofpoint-GUID: FmAqyEWGAY3ZBUNmSxlbzplp_JXIspt4 X-Proofpoint-ORIG-GUID: FmAqyEWGAY3ZBUNmSxlbzplp_JXIspt4 X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-HPE-SCL: -1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-01-08_01,2022-01-07_01,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 malwarescore=0 phishscore=0 spamscore=0 mlxscore=0 lowpriorityscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 clxscore=1015 priorityscore=1501 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2110150000 definitions=main-2201080036 Content-Transfer-Encoding: quoted-printable From: Dandan Bi (This is migrated from edk2-platforms:Silicon) REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3246 MdeLibs.dsc.inc was added for some basic/default library instances provided by MdePkg and RegisterFilterLibNull Library was also added into it as the first version of MdeLibs.dsc.inc. So update platform dsc to consume MdeLibs.dsc.inc for RegisterFilterLibNull which will be consumed by IoLib and BaseLib. Cc: Abner Chang Cc: Daniel Schaefer Cc: Gilbert Chen Signed-off-by: Dandan Bi Reviewed-by: Michael D Kinney Reviewed-by: Abner Chang --- Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc b/Silicon/RI= SC-V/ProcessorPkg/RiscVProcessorPkg.dsc index 5f88f5e89f..5c5cfcb525 100644 --- a/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc +++ b/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc @@ -36,6 +36,8 @@ [SkuIds]=0D 0|DEFAULT=0D =0D +!include MdePkg/MdeLibs.dsc.inc=0D +=0D [LibraryClasses.common]=0D CpuExceptionHandlerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVExceptio= nLib/CpuExceptionHandlerDxeLib.inf=0D RiscVCpuLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/RiscVCpuLib.= inf=0D --=20 2.31.1