From: "Abner Chang" <abner.chang@hpe.com>
To: devel@edk2.groups.io
Cc: abner.chang@hpe.com
Subject: [PATCH 38/79] Move OpenSbiPlatformLib to RISC-V/PlatformPkg
Date: Sat, 8 Jan 2022 12:10:58 +0800 [thread overview]
Message-ID: <20220108041121.16005-37-abner.chang@hpe.com> (raw)
In-Reply-To: <20220108041121.16005-1-abner.chang@hpe.com>
(This is migrated from edk2-platforms)
It's a generic platform file. Only the device tree decides what happens.
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
Cc: Abner Chang <abner.chang@hpe.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Abner Chang <abner.chang@hpe.com>
Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
---
.../OpensbiPlatformLib/OpensbiPlatformLib.inf | 56 +++++
.../OpensbiPlatformLib/PlatformOverride.h | 30 +++
.../Library/OpensbiPlatformLib/Platform.c | 224 ++++++++++++++++++
.../Library/OpensbiPlatformLib/SifiveFu540.c | 47 ++++
4 files changed, 357 insertions(+)
create mode 100644 Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf
create mode 100644 Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/PlatformOverride.h
create mode 100644 Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/Platform.c
create mode 100644 Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/SifiveFu540.c
diff --git a/Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf b/Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf
new file mode 100644
index 0000000000..f9f2073a5b
--- /dev/null
+++ b/Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf
@@ -0,0 +1,56 @@
+## @file
+# RISC-V OpenSBI Platform Library
+# This is the the library which provides platform
+# level opensbi functions follow RISC-V OpenSBI implementation.
+#
+# Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001b
+ BASE_NAME = RiscVOpensbiPlatformLib
+ FILE_GUID = 80C09428-44DD-437F-8252-F7AB64711AA5
+ MODULE_TYPE = SEC
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = RiscVOpensbiPlatformLib
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = RISCV64
+#
+
+[Sources]
+ Platform.c
+ SifiveFu540.c
+ PlatformOverride.h
+
+[Packages]
+ EmbeddedPkg/EmbeddedPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Platform/SiFive/U5SeriesPkg/U5SeriesPkg.dec
+ Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec
+ Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec
+
+[LibraryClasses]
+ BaseLib
+ BaseMemoryLib
+ DebugLib
+ DebugAgentLib
+ FdtLib
+ PcdLib
+ PrintLib
+ RiscVCpuLib
+
+[FixedPcd]
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootHartId
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdHartCount
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootableHartNumber
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdOpenSbiStackSize
+
+ gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdU5UartBase
+ gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdU5PlatformSystemClock
diff --git a/Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/PlatformOverride.h b/Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/PlatformOverride.h
new file mode 100644
index 0000000000..2fbb8ca45d
--- /dev/null
+++ b/Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/PlatformOverride.h
@@ -0,0 +1,30 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ * Anup Patel <anup.patel@wdc.com>
+ */
+
+#ifndef __PLATFORM_OVERRIDE_H__
+#define __PLATFORM_OVERRIDE_H__
+
+#include <sbi/sbi_types.h>
+
+struct platform_override {
+ const struct fdt_match *match_table;
+ u64 (*features)(const struct fdt_match *match);
+ u64 (*tlbr_flush_limit)(const struct fdt_match *match);
+ int (*early_init)(bool cold_boot, const struct fdt_match *match);
+ int (*final_init)(bool cold_boot, const struct fdt_match *match);
+ void (*early_exit)(const struct fdt_match *match);
+ void (*final_exit)(const struct fdt_match *match);
+ int (*system_reset_check)(u32 reset_type, u32 reset_reason,
+ const struct fdt_match *match);
+ void (*system_reset)(u32 reset_type, u32 reset_reason,
+ const struct fdt_match *match);
+ int (*fdt_fixup)(void *fdt, const struct fdt_match *match);
+};
+
+#endif
diff --git a/Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/Platform.c b/Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/Platform.c
new file mode 100644
index 0000000000..79a78b834e
--- /dev/null
+++ b/Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/Platform.c
@@ -0,0 +1,224 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ * Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <libfdt.h>
+#include <PlatformOverride.h>
+#include <sbi/riscv_asm.h>
+#include <sbi/sbi_hartmask.h>
+#include <sbi/sbi_platform.h>
+#include <sbi/sbi_string.h>
+#include <sbi/sbi_math.h>
+#include <sbi_utils/fdt/fdt_domain.h>
+#include <sbi_utils/fdt/fdt_fixup.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/irqchip/fdt_irqchip.h>
+#include <sbi_utils/serial/fdt_serial.h>
+#include <sbi_utils/timer/fdt_timer.h>
+#include <sbi_utils/ipi/fdt_ipi.h>
+#include <sbi_utils/reset/fdt_reset.h>
+
+extern const struct platform_override sifive_fu540;
+
+static const struct platform_override *special_platforms[] = {
+ &sifive_fu540,
+};
+
+static const struct platform_override *generic_plat = NULL;
+static const struct fdt_match *generic_plat_match = NULL;
+
+static void fw_platform_lookup_special(void *fdt, int root_offset)
+{
+ int pos, noff;
+ const struct platform_override *plat;
+ const struct fdt_match *match;
+
+ for (pos = 0; pos < array_size(special_platforms); pos++) {
+ plat = special_platforms[pos];
+ if (!plat->match_table)
+ continue;
+
+ noff = fdt_find_match(fdt, -1, plat->match_table, &match);
+ if (noff < 0)
+ continue;
+
+ generic_plat = plat;
+ generic_plat_match = match;
+ break;
+ }
+}
+
+extern struct sbi_platform platform;
+static u32 generic_hart_index2id[SBI_HARTMASK_MAX_BITS] = { 0 };
+
+/*
+ * The fw_platform_init() function is called very early on the boot HART
+ * OpenSBI reference firmwares so that platform specific code get chance
+ * to update "platform" instance before it is used.
+ *
+ * The arguments passed to fw_platform_init() function are boot time state
+ * of A0 to A4 register. The "arg0" will be boot HART id and "arg1" will
+ * be address of FDT passed by previous booting stage.
+ *
+ * The return value of fw_platform_init() function is the FDT location. If
+ * FDT is unchanged (or FDT is modified in-place) then fw_platform_init()
+ * can always return the original FDT location (i.e. 'arg1') unmodified.
+ */
+unsigned long fw_platform_init(unsigned long arg0, unsigned long arg1,
+ unsigned long arg2, unsigned long arg3,
+ unsigned long arg4)
+{
+ const char *model;
+ void *fdt = (void *)arg1;
+ u32 hartid, hart_count = 0;
+ int rc, root_offset, cpus_offset, cpu_offset, len;
+
+ root_offset = fdt_path_offset(fdt, "/");
+ if (root_offset < 0)
+ goto fail;
+
+ fw_platform_lookup_special(fdt, root_offset);
+
+ model = fdt_getprop(fdt, root_offset, "model", &len);
+ if (model)
+ sbi_strncpy(platform.name, model, sizeof(platform.name));
+
+ if (generic_plat && generic_plat->features)
+ platform.features = generic_plat->features(generic_plat_match);
+
+ cpus_offset = fdt_path_offset(fdt, "/cpus");
+ if (cpus_offset < 0)
+ goto fail;
+
+ fdt_for_each_subnode(cpu_offset, fdt, cpus_offset) {
+ rc = fdt_parse_hart_id(fdt, cpu_offset, &hartid);
+ if (rc)
+ continue;
+
+ if (SBI_HARTMASK_MAX_BITS <= hartid)
+ continue;
+
+ generic_hart_index2id[hart_count++] = hartid;
+ }
+
+ platform.hart_count = hart_count;
+
+ /* Return original FDT pointer */
+ return arg1;
+
+fail:
+ while (1)
+ wfi();
+}
+
+static int generic_early_init(bool cold_boot)
+{
+ int rc;
+
+ if (generic_plat && generic_plat->early_init) {
+ rc = generic_plat->early_init(cold_boot, generic_plat_match);
+ if (rc)
+ return rc;
+ }
+
+ if (!cold_boot)
+ return 0;
+
+ return fdt_reset_init();
+}
+
+static int generic_final_init(bool cold_boot)
+{
+ void *fdt;
+ int rc;
+
+ if (generic_plat && generic_plat->final_init) {
+ rc = generic_plat->final_init(cold_boot, generic_plat_match);
+ if (rc)
+ return rc;
+ }
+
+ if (!cold_boot)
+ return 0;
+
+ fdt = sbi_scratch_thishart_arg1_ptr();
+
+ fdt_cpu_fixup(fdt);
+ fdt_fixups(fdt);
+ fdt_domain_fixup(fdt);
+
+ if (generic_plat && generic_plat->fdt_fixup) {
+ rc = generic_plat->fdt_fixup(fdt, generic_plat_match);
+ if (rc)
+ return rc;
+ }
+
+ return 0;
+}
+
+static void generic_early_exit(void)
+{
+ if (generic_plat && generic_plat->early_exit)
+ generic_plat->early_exit(generic_plat_match);
+}
+
+static void generic_final_exit(void)
+{
+ if (generic_plat && generic_plat->final_exit)
+ generic_plat->final_exit(generic_plat_match);
+}
+
+static int generic_domains_init(void)
+{
+ return fdt_domains_populate(sbi_scratch_thishart_arg1_ptr());
+}
+
+static u64 generic_tlbr_flush_limit(void)
+{
+ if (generic_plat && generic_plat->tlbr_flush_limit)
+ return generic_plat->tlbr_flush_limit(generic_plat_match);
+ return SBI_PLATFORM_TLB_RANGE_FLUSH_LIMIT_DEFAULT;
+}
+
+const struct sbi_platform_operations platform_ops = {
+ .early_init = generic_early_init,
+ .final_init = generic_final_init,
+ .early_exit = generic_early_exit,
+ .final_exit = generic_final_exit,
+ .domains_init = generic_domains_init,
+ .console_init = fdt_serial_init,
+ .irqchip_init = fdt_irqchip_init,
+ .irqchip_exit = fdt_irqchip_exit,
+ .ipi_init = fdt_ipi_init,
+ .ipi_exit = fdt_ipi_exit,
+ .get_tlbr_flush_limit = generic_tlbr_flush_limit,
+ .timer_init = fdt_timer_init,
+ .timer_exit = fdt_timer_exit,
+};
+
+#if FixedPcdGet32(PcdBootableHartNumber) == 4
+#define U540_BOOTABLE_HART_COUNT FixedPcdGet32(PcdBootableHartNumber)
+static u32 U540_hart_index2id[U540_BOOTABLE_HART_COUNT] = {1, 2, 3, 4};
+#endif
+
+struct sbi_platform platform = {
+ .opensbi_version = OPENSBI_VERSION,
+ .platform_version = SBI_PLATFORM_VERSION(0x0, 0x01),
+ .name = "Generic",
+ .features = SBI_PLATFORM_DEFAULT_FEATURES,
+ .hart_count = SBI_HARTMASK_MAX_BITS,
+// TODO: Workaround for U540. Not sure why we need this. OpenSBI doesn't need it.
+#if FixedPcdGet32(PcdBootableHartNumber) == 4
+ .hart_index2id = U540_hart_index2id,
+#else
+ .hart_index2id = generic_hart_index2id,
+#endif
+ // TODO: Any reason why it shouldn't just be SBI_PLATFORM_DEFAULT_HART_STACK_SIZE?
+ .hart_stack_size = FixedPcdGet32(PcdOpenSbiStackSize),
+ .platform_ops_addr = (unsigned long)&platform_ops
+};
diff --git a/Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/SifiveFu540.c b/Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/SifiveFu540.c
new file mode 100644
index 0000000000..748b058840
--- /dev/null
+++ b/Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/SifiveFu540.c
@@ -0,0 +1,47 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ * Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <PlatformOverride.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+#include <sbi_utils/fdt/fdt_fixup.h>
+
+static u64 sifive_fu540_tlbr_flush_limit(const struct fdt_match *match)
+{
+ /*
+ * The sfence.vma by virtual address does not work on
+ * SiFive FU540 so we return remote TLB flush limit as zero.
+ */
+ return 0;
+}
+
+static int sifive_fu540_fdt_fixup(void *fdt, const struct fdt_match *match)
+{
+ /*
+ * SiFive Freedom U540 has an erratum that prevents S-mode software
+ * to access a PMP protected region using 1GB page table mapping, so
+ * always add the no-map attribute on this platform.
+ */
+ fdt_reserved_memory_nomap_fixup(fdt);
+
+ return 0;
+}
+
+static const struct fdt_match sifive_fu540_match[] = {
+ { .compatible = "sifive,fu540" },
+ { .compatible = "sifive,fu540g" },
+ { .compatible = "sifive,fu540-c000" },
+ { .compatible = "sifive,hifive-unleashed-a00" },
+ { },
+};
+
+const struct platform_override sifive_fu540 = {
+ .match_table = sifive_fu540_match,
+ .tlbr_flush_limit = sifive_fu540_tlbr_flush_limit,
+ .fdt_fixup = sifive_fu540_fdt_fixup,
+};
--
2.31.1
next prev parent reply other threads:[~2022-01-08 5:13 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-08 4:10 [PATCH 02/79] ProcessorPkg/Library: RISC-V CPU library Abner Chang
2022-01-08 4:10 ` [PATCH 03/79] ProcessorPkg/Library: Add RISC-V exception library Abner Chang
2022-01-08 4:10 ` [PATCH 04/79] ProcessorPkg/Library: Add RISC-V timer library Abner Chang
2022-01-08 4:10 ` [PATCH 05/79] ProcessorPkg/RiscVOpensbLib: Add opensbi submodule Abner Chang
2022-01-08 4:10 ` [PATCH 06/79] ProcessorPkg/Library: Add RiscVOpensbiLib Abner Chang
2022-01-08 4:10 ` [PATCH 07/79] ProcessorPkg/Library: Add RiscVEdk2SbiLib Abner Chang
2022-01-08 4:10 ` [PATCH 08/79] ProcessorPkg/Library: RISC-V PEI Service Table Pointer library Abner Chang
2022-01-08 4:10 ` [PATCH 09/79] ProcessorPkg/CpuDxe: Add RISC-V CPU DXE driver Abner Chang
2022-01-08 4:10 ` [PATCH 10/79] ProcessorPkg/SmbiosDxe: Generic SMBIOS DXE driver for RISC-V platforms Abner Chang
2022-01-08 4:10 ` [PATCH 11/79] ProcesorPkg/Library: NULL instance of RISC-V platform timer library Abner Chang
2022-01-08 4:10 ` [PATCH 12/79] RISC-V/ProcessorPkg: RISC-V package Abner Chang
2022-01-08 4:10 ` [PATCH 13/79] PlatformPkg/Library: RISC-V Platform Temporary Memory library Abner Chang
2022-01-08 4:10 ` [PATCH 14/79] PlatformPkg/Library: Add FirmwareContextProcessorSpecificLib module Abner Chang
2022-01-08 4:10 ` [PATCH 15/79] PlatformPkg/Library: NULL instance of RiscVOpensbiPlatformLib Abner Chang
2022-01-08 4:10 ` [PATCH 16/79] PlatformPkg/Library: NULL instance of PlatformMemoryTestLib Abner Chang
2022-01-08 4:10 ` [PATCH 17/79] PlatformPkg/Library: NULL instance of PlatformUpdateProgressLib Abner Chang
2022-01-08 4:10 ` [PATCH 18/79] PlatformPkg/Library: Platform Boot Manager library Abner Chang
2022-01-08 4:10 ` [PATCH 19/79] PlatformPkg/SecMain: RISC-V SecMain module Abner Chang
2022-01-08 4:10 ` [PATCH 20/79] PlatformPkg: Add RiscVPlatformPkg Abner Chang
2022-01-08 4:10 ` [PATCH 21/79] RISC-V/PlatformPkg: Revise Readme.md Abner Chang
2022-01-08 4:10 ` [PATCH 22/79] Silicon/SiFive: Handle case of NULL FirmwareContext Abner Chang
2022-01-08 4:10 ` [PATCH 23/79] Silicon/RISC-V: Update old SMBIOS struct filed name Abner Chang
2022-01-08 4:10 ` [PATCH 24/79] Platform/RISC-V: Consume MdeLibs.dsc.inc for RegisterFilterLib Abner Chang
2022-01-08 4:10 ` [PATCH 25/79] Silicon/RISC_V: " Abner Chang
2022-01-08 4:10 ` [PATCH 26/79] RISC-V/CpuDxe: Ignore set memory attributes failure Abner Chang
2022-01-08 4:10 ` [PATCH 27/79] Signal EndOfDxe in boot manager Abner Chang
2022-01-08 4:10 ` [PATCH 28/79] U5SeriesPkg: Deduplicate PlatformPei Abner Chang
2022-01-08 4:10 ` [PATCH 29/79] RISC-V: Split SMBIOS out of PlatformPei Abner Chang
2022-01-08 4:10 ` [PATCH 30/79] RISC-V: Use U5 SMBIOS library only for those platforms Abner Chang
2022-01-08 4:10 ` [PATCH 31/79] Silicon/RISC-V: Introduce FirmwareContext library Abner Chang
2022-01-08 4:10 ` [PATCH 32/79] Silicon/RISC-V: PeiServiceTableLib uses RiscVFirmwareContextLib Abner Chang
2022-01-08 4:10 ` [PATCH 33/79] RISC-V/PlatformPkg: Build DeviceTree and use that in SEC Abner Chang
2022-01-08 4:10 ` [PATCH 34/79] RISC-V/PlatformPkg: Add FdtPeim to pass DTB from PEI to DXE via HOB Abner Chang
2022-01-08 4:10 ` [PATCH 35/79] RISC-V/PlatformPkg: Fixup FDT from HOB and install into config table Abner Chang
2022-01-08 4:10 ` [PATCH 36/79] RISC-V: Switch to latest OpenSBI Abner Chang
2022-01-08 4:10 ` [PATCH 37/79] RISC-V: Implement ResetSystem RT call Abner Chang
2022-01-08 4:10 ` Abner Chang [this message]
2022-01-08 4:10 ` [PATCH 39/79] RISC-V/PlatformPkg: Update document Abner Chang
2022-01-08 4:11 ` [PATCH 40/79] RISC-V: Add RISC-V PeiCoreEntryPoint library Abner Chang
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