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From: "Abner Chang" <abner.chang@hpe.com>
To: devel@edk2.groups.io
Cc: abner.chang@hpe.com
Subject: [PATCH 39/79] RISC-V/PlatformPkg: Update document
Date: Sat,  8 Jan 2022 12:10:59 +0800
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(This is migrated from edk2-platforms:Platform)
Update EDK2 RISC-V port architectural diagrams.

Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Reviewed-by: Daniel Schaefer <daniel.schaefer@hpe.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
---
 Platform/RISC-V/PlatformPkg/Readme.md         |  132 +-
 .../Documents/Media/RiscVEdk2BootProcess.svg  | 1928 +++++++++++++++++
 .../Documents/Media/RiscVEdk2FwDomain.svg     | 1290 +++++++++++
 3 files changed, 3336 insertions(+), 14 deletions(-)
 create mode 100644 Platform/RISC-V/PlatformPkg/Documents/Media/RiscVEdk2Bo=
otProcess.svg
 create mode 100644 Platform/RISC-V/PlatformPkg/Documents/Media/RiscVEdk2Fw=
Domain.svg

diff --git a/Platform/RISC-V/PlatformPkg/Readme.md b/Platform/RISC-V/Platfo=
rmPkg/Readme.md
index 4b933a2e0f..66fba15544 100644
--- a/Platform/RISC-V/PlatformPkg/Readme.md
+++ b/Platform/RISC-V/PlatformPkg/Readme.md
@@ -2,6 +2,113 @@
 =0D
 ## EDK2 RISC-V Platform Project=0D
 =0D
+### EDK2 RISC-V Design and the Boot Processes=0D
+RISC-V edk2 port is designed base on edk2 boot phases and leverage [RISC-V=
 OpenSBI](https://github.com/riscv/opensbi) (which is the implementation of=
 [RISC-V SBI](https://github.com/riscv/riscv-sbi-doc)) as an edk2 library. =
The design concept is to leverage RISC-V SBI implementation, the basic RISC=
-V HARTs and the platform initialization. However, it still keeps the edk2 =
build mechanism and the boot processes. RISC-V OpenSBI is built as=0D
+an library and linked with edk2 SEC module. The design diagram and the boo=
t flow is shown in below figure,=0D
+=0D
+#### RISC-V EDK2 Port Design Diagrams=0D
+![RISC-V EDK2 Port](https://github.com/tianocore/edk2-platforms/blob/maste=
r/Platform/RISC-V/PlatformPkg/Documents/Media/RiscVEdk2BootProcess.svg?raw=
=3Dtrue)=0D
+=0D
+#### SEC Phase=0D
+As the most of edk2 platforms SEC implementations, RISC-V edk2 port SEC mo=
dule initiates the fundamental platform=0D
+boot environment. RISC-V edk2 SEC module linked with [RiscVOpensbiLib](#ri=
scvopensbilib-library) that pulls in the OpenSBI core source files into the=
 build as a library. SEC module invokes sbi_init() to execute through the O=
penSBI=0D
+initialization flow. Afterwards, SEC phase hands off to PEI phase via Open=
SBI with the ***NextAddress*** and ***NextMode*** are configured.=0D
+The entire SEC phase with ***RiscVOpensbiLib*** is executed in the Machine=
-mode (M-mode) which is the highest=0D
+and the mandatory privilege mode of RISC-V HART. The SBI implementation is=
 also executed in the M-mode that=0D
+provides the Supervisor Binary Interface for the entities run in the Super=
visor-mode (S-mode). The default=0D
+privilege mode is configured to S-mode for the next phase after SEC, that =
says the PEI, DXE and BDS phases are=0D
+default executed in S-mode unless the corresponding [PCDs](#risc-v-platfor=
m-pcd-settings) are configured=0D
+differently from the default settings according to the OEM platform design=
.=0D
+=0D
+##### RiscVOpensbiLib Library=0D
+[Indicated as #1 in the figure](#risc-v-edk2-port-design-diagrams)=0D
+> ***RiscVOpensbiLib*** is a edk2 wrapper library of OpenSBI. SEC module i=
s the only consumer of ***RiscVOpensbiLib*** across the entire edk2 boot pr=
ocesses. The sub-module under ***RiscVOpensbiLib*** is updated=0D
+to align with OpenSBI project. As mentioned earlier, ***RiscVOpensbiLib***=
 provides the RISC-V SBI=0D
+implementation and initialize the OpenSBI boot flow. SEC module is also li=
nked with below libraries,=0D
+- edk2 [OpenSbiPlatformLib](#OpenSbiPlatformLib-library) library that prov=
ides the generic RISC-V platform initialization code.=0D
+- edk2 [RiscVSpecifialPlatformLib](#RiscVSpecifialPlatformLib-library) lib=
rary which is provided by the RISC-V=0D
+platform vendor for the platform-specific initialization. The underlying i=
mplementation of above two edk2 libraries=0D
+are from OpenSBI project. edk2 libraries are introduced as the wrapper lib=
raries that separates and organizes OpenSBI core and platform code based on=
 edk2 framework and the the build mechanism for edk2 RISC-V platforms. ***R=
iscVOpensbiLib*** library is located under [RISC-V ProcessorPkg](https://gi=
thub.com/tianocore/edk2-platforms/tree/master/Silicon/RISC-V/ProcessorPkg) =
while the platform code (e.g. OpenSbiPlatformLib) is located under [RISC-V =
PlatformPkg](https://github.com/tianocore/edk2-platforms/tree/master/Platfo=
rm/RISC-V/PlatformPkg).=0D
+- edk2 [RiscVSpecifialPlatformLib](#riscvspecifialplatformlib) library is =
provided by the platform vendor and located under edk2 RISC-V platform-spec=
ific folder.=0D
+=0D
+##### OpenSbiPlatformLib Library=0D
+[Indicated as #2 in the figure](#risc-v-edk2-port-design-diagrams)=0D
+> ***OpenSbiPlatformLib*** provides the generic RISC-V platform initializa=
tion code. Platform vendor can just utilize this library if they don't have=
 additional requirements on the platform initialization.=0D
+=0D
+##### RiscVSpecifialPlatformLib Library=0D
+[Indicated as #3 in the figure](#risc-v-edk2-port-design-diagrams)=0D
+> The major use case of this library is to facilitate the interfaces for p=
latform vendors to provide the special=0D
+platform initialization based on the generic platform initialization libra=
ry.=0D
+=0D
+##### Edk2OpensbiPlatformWrapperLib Library=0D
+[Indicated as #4 in the figure](#risc-v-edk2-port-design-diagrams)=0D
+> In order to providing the flexibility to edk2 RISC-V firmware solution, =
***Edk2OpensbiPlatformWrapperLib*** is the wrapper library of [OpenSbiPlatf=
ormLib](#OpenSbiPlatformLib-library) to provide the interfaces for OEM. The=
 ***platform_ops_address***in the generic platform structure is replaced wi=
th ***Edk2OpensbiplatformOps*** in SEC=0D
+module. The platform function invoked by OpenSBI core is hooked to ***Edk2=
OpensbiPlatformWrapperLib***. This gives=0D
+a change to OEM for implementing platform-specific initialization before a=
nd after the generic platform code. OEM=0D
+can override this library under their platform folder on demand without to=
uching ***RiscVOpensbiLib*** library=0D
+source files and other common source files.=0D
+=0D
+##### Next Phase Address and Privilege Mode=0D
+[Indicated as #5 in the figure](#risc-v-edk2-port-design-diagrams)=0D
+> Once OpenSBI finishes the boot initialization, it will jump to the next =
phase with the default privilege set to=0D
+S-mode. In order to facilitate the flexibility for a variant of platform d=
emands. EDK2 RISC-V provides the [PCDs](#risc-v-platform-pcd-settings) as t=
he configurable privilege for the next phase. Whether to have PEI or later=
=0D
+phases executed in the default S-mode or to keep the RISC-V edk2 boot phas=
e privilege in M-mode is at platform design discretion. The SEC module sets=
 the next phase address to the PEI Core entry point with a configurable=0D
+privilege according to the PCD.=0D
+=0D
+#### PEI Phase=0D
+SEC module hands off the boot process to PEI core in the privilege configu=
red by ***PcdPeiCorePrivilegeMode*** PCD *(TODO, currently the privilege is=
 forced to S-mode)*. PEI and later phases are allowed to executed in M-mode=
=0D
+if the platform doesn't require Hypervisor-extended Supervisor mode (HS-mo=
de) for the virtualization. RISC-V edk2 port provides its own instance ***P=
eiCoreEntryPoint*** library [(indicated as #7 in the figure)](#risc-v-edk2-=
port-design-diagrams) and linked with [PlatformSecPpiLib](#platformsecppili=
b-library) in order to support the S-mode PEI phase. PEI core requires [Ris=
cVFirmwareContextLib](#riscVfirmwarecontextlib-library) library to retrieve=
 the information of RISC-V HARTs and platform (e.g. FDT) configurations tha=
t built up in SEC phase. ***PeiServicePointer*** is also maintained in the =
***RISC-V OpenSBI FirmwareContext*** structure and the pointer is retrieved=
 by [PeiServiceTablePointerOpensbi](#peiservicetablepointeropensbi-library)=
 library.=0D
+=0D
+##### PlatformSecPpiLib Library=0D
+[Indicated as #8 in the figure](#risc-v-edk2-port-design-diagrams)=0D
+=0D
+> Some platform has the PEI protocol interface (PPI) prepared in SEC phase=
 and pass the PPI description to PEI phase for the installation. That means=
 the PPI code resides in SEC module and executed in PEI phase. Due to the S=
EC=0D
+(with OpenSBI) is protected by the RISC-V Physical Memory Protection (PMP)=
 through [OpenSBI firmware domain](#edk2-opensbi-firmware-domain), the SEC =
can be only accessed and executed when RISC-V HART is operated in M-mode. T=
he SEC PPI passed to PEI is not able to be executed by any PEI modules. Thu=
s we have ***PlatformSecPpiLib*** library for the platforms that requires t=
o install the PPI at the early stage of PEI core instead of installing PPI=
=0D
+during PEI dispatcher that maybe too late for some platform use cases. ***=
PlatformSecPpiLib*** is currently=0D
+executed in S-mode because we force to switch RISC-V boot HART to S-mode w=
hen SEC hands of boot process to PEI=0D
+phase. ***PlatformSecPpiLib*** can also executed in M-mode once we have th=
e full implementation of [***PcdPeiCorePrivilegeMode***.](#risc-v-platform-=
pcd-settings)=0D
+=0D
+##### RiscVFirmwareContextLib Library=0D
+[Indicated as #9 in the figure](#risc-v-edk2-port-design-diagrams)=0D
+=0D
+> The ***OpenSBI FirmwareContext*** is a structure member in sbi_platform,=
 that can carry the firmware=0D
+solution-defined information to edk2 boot phases after SEC. edk2 defines i=
ts own ***FirmwareContext*** as below in=0D
+the current implementation.=0D
+=0D
+    typedef struct {=0D
+        UINT64              BootHartId;=0D
+        VOID                *PeiServiceTable;      // PEI Service table=0D
+        UINT64              FlattenedDeviceTree;   // Pointer to Flattened=
 Device tree=0D
+        UINT64              SecPeiHandOffData;     // This is EFI_SEC_PEI_=
HAND_OFF passed to PEI Core.=0D
+        EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC  *HartSpecific[RISC_V_MAX=
_HART_SUPPORTED];=0D
+    } EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT;=0D
+=0D
+> ***RiscVFirmwareContextLib*** library is used by PEI module for obtainin=
g the ***FirmwareContext*** pointer.=0D
+=0D
+##### PeiServiceTablePointerOpensbi Library=0D
+[Indicated as #10 in the figure](#risc-v-edk2-port-design-diagrams)=0D
+=0D
+> ***PeiServiceTablePointerOpensbi*** is the library that provides Get/Set=
 PeiServiceTablePointer. ***RiscVFirmwareContextLib*** is the underlying li=
brary for the operations on PEI service table pointer.=0D
+=0D
+##### PEI OpenSBI PPI=0D
+[Indicated as #11 in the figure](#risc-v-edk2-port-design-diagrams)=0D
+=0D
+> edk2 PEI OpenSBI PPI *(TODO)* provides the unified interface for all PEI=
 drivers to invoke SBI services.=0D
+=0D
+#### DXE Phase=0D
+DXE IPL PEI module hands off the boot process to DXE Core in the privilege=
 configured by PcdDxeCorePrivilegeMode PCD *(TODO, currently is not impleme=
nted yet)*. edk2 DXE OpenSBI protocol *(TODO, indicated as #12 in the figur=
e)* provides the unified interface for all DXE drivers to invoke SBI servic=
es.=0D
+=0D
+#### BDS Phase=0D
+The implementation of RISC-V edk2 port in BDS phase is the same as it is i=
n DXE phase which is executed in the=0D
+privilege configured by PcdDxeCorePrivilegeMode PCD *(TODO, currently the =
privilege is forced to S-mode)*. The=0D
+OpenSBI is also provided through edk2 DXE OpenSBI Protocol*(TODO, indicate=
d as #12 in the figure)*. However, BDS must transits the privilege mode to =
S-mode before it handing off the boot process to S-mode OS, OS boot loader =
or EFI application.=0D
+=0D
+#### EDK2 OpenSBI Firmware Domain=0D
+=0D
+![RISC-V EDK2 FW Domain](https://github.com/tianocore/edk2-platforms/blob/=
master/Platform/RISC-V/PlatformPkg/Documents/Media/RiscVEdk2FwDomain.svg?ra=
w=3Dtrue)=0D
+=0D
+OpenSBI implements the firmware domain mechanism to protect the root firmw=
are (which is the OpenSBI itself) as the M-mode only access and execute reg=
ion. RISC-V edk2 port configures the root firmware domain via [PCDs](#risc-=
v-platform-pcd-settings) to protect SEC firmware volume, memory and OpenSBI=
 stuff. The firmware region (non-root firmware) that accommodates PEI and D=
XE phase FV regions, while EFI variable region is reported as a separate fi=
rmware region as it shows in above figure.=0D
+=0D
 ### EDK2 Build Architecture for RISC-V=0D
 The edk2 build architecture which is supported and verified on edk2 code b=
ase for=0D
 RISC-V platforms is `RISCV64`.=0D
@@ -49,18 +156,9 @@ Then you can build the edk2 firmware image for RISC-V p=
latforms.
 build -a RISCV64 -t GCC5 -p Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveU=
nleashedBoard/U540.dsc=0D
 ```=0D
 =0D
-## RISC-V OpenSBI Library=0D
-RISC-V [OpenSBI](https://github.com/riscv/opensbi) is the implementation o=
f=0D
-[RISC-V SBI (Supervisor Binary Interface) specification](https://github.co=
m/riscv/riscv-sbi-doc).=0D
-For EDK2 UEFI firmware solution, RISC-V OpenSBI is integrated as a library=
=0D
-[(submoudule)](Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/opensbi=
) in EDK2=0D
-RISC-V Processor Package. The RISC-V OpenSBI library is built in SEC drive=
r without=0D
-any modifications and provides the interfaces for supervisor mode executio=
n environment=0D
-to execute privileged operations.=0D
-=0D
 ## RISC-V Platform PCD settings=0D
 ### EDK2 Firmware Volume Settings=0D
-EDK2 Firmware volume related PCDs which declared in platform FDF file.=0D
+EDK2 Firmware volume related PCDs which is declared in platform FDF file.=
=0D
 =0D
 | **PCD name** |**Usage**|=0D
 |--------------|---------|=0D
@@ -86,10 +184,14 @@ The PCD settings regard to EFI Variable
 ### RISC-V Physical Memory Protection (PMP) Region Settings=0D
 Below PCDs could be set in platform FDF file.=0D
 =0D
-| **PCD name** |**Usage**|=0D
-|--------------|---------|=0D
-|PcdFwStartAddress| The starting address of firmware region to protected b=
y PMP|=0D
-|PcdFwEndAddress| The ending address of firmware region to protected by PM=
P|=0D
+| **PCD name** |**Usage**|**Access Permission in M-mode**|**Access Permiss=
ion in S-mode**|=0D
+|--------------|---------|---------|---------|=0D
+|PcdRootFirmwareDomainBaseAddress| The starting address of root firmware d=
omain protected by PMP|Full access|No Access|=0D
+|PcdRootFirmwareDomainSize| The size of root firmware domain|-|-|=0D
+|PcdFirmwareDomainBaseAddress| The starting address of firmware domain tha=
t can be accessed and executed in S-mode|Full access|Readable and Executabl=
e|=0D
+|PcdFirmwareDomainSize| The size of firmware domain|-|-|=0D
+|PcdVariableFirmwareRegionBaseAddress| The starting address of EFI variabl=
e region that can be accessed in S-mode|Full access|Readale and Writable|=0D
+|PcdVariableFirmwareRegionSize| The size of EFI variable firmware region|-=
|-|=0D
 =0D
 ### RISC-V Processor HART Settings=0D
 =0D
@@ -98,6 +200,7 @@ Below PCDs could be set in platform FDF file.
 |PcdHartCount| Number of RISC-V HARTs, the value is processor-implementati=
on specific|=0D
 |PcdBootHartId| The ID of RISC-V HART to execute main fimrware code and bo=
ot system to OS|=0D
 |PcdBootableHartNumber|The bootable HART number, which is incorporate with=
 RISC-V OpenSBI platform hart_index2id value|=0D
+|PcdBootableHartIndexToId| if PcdBootableHartNumber =3D=3D 0, hart_index2i=
d is built from Device Tree, otherwise this is an array of HART index to HA=
RT ID|=0D
 =0D
 ### RISC-V OpenSBI Settings=0D
 =0D
@@ -109,6 +212,7 @@ Below PCDs could be set in platform FDF file.
 |PcdTemporaryRamBase| The base address of temporary memory for PEI phase|=
=0D
 |PcdTemporaryRamSize| The temporary memory size for PEI phase|=0D
 |PcdPeiCorePrivilegeMode|The target RISC-V privilege mode for edk2 PEI pha=
se|=0D
+|PcdDxeCorePrivilegeMode (TODO)|The target RISC-V privilege mode for edk2 =
DXE phase|=0D
 =0D
 ## Supported Operating Systems=0D
 Currently support boot to EFI Shell and Linux kernel.=0D
diff --git a/Platform/RISC-V/PlatformPkg/Documents/Media/RiscVEdk2BootProce=
ss.svg b/Platform/RISC-V/PlatformPkg/Documents/Media/RiscVEdk2BootProcess.s=
vg
new file mode 100644
index 0000000000..dfd47a75b9
--- /dev/null
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+            <v:textRect cx=3D"36" cy=3D"466.621" width=3D"72" height=3D"70=
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tspan></text>       </g>=0D
+        <g id=3D"shape228-146" v:mID=3D"228" v:groupContext=3D"shape" tran=
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+        <g id=3D"shape209-151" v:mID=3D"209" v:groupContext=3D"shape" tran=
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+            <title>Sheet.209</title>=0D
+            <path d=3D"M0 502.11 L598.5 502.11" class=3D"st29"/>=0D
+        </g>=0D
+        <g id=3D"shape224-154" v:mID=3D"224" v:groupContext=3D"shape" tran=
sform=3D"translate(388.808,-115.74)">=0D
+            <title>Rounded Rectangle.224</title>=0D
+            <desc>PEI SBI PPI</desc>=0D
+            <v:userDefs>=0D
+                <v:ud v:nameU=3D"CTypeTopLeftSnip" v:prompt=3D"" v:val=3D"=
VT0(0):5"/>=0D
+                <v:ud v:nameU=3D"CTypeTopRightSnip" v:prompt=3D"" v:val=3D=
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+                <v:ud v:nameU=3D"CTypeBotLeftSnip" v:prompt=3D"" v:val=3D"=
VT0(0):5"/>=0D
+                <v:ud v:nameU=3D"CTypeBotRightSnip" v:prompt=3D"" v:val=3D=
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+                <v:ud v:nameU=3D"CornerLockHoriz" v:prompt=3D"" v:val=3D"V=
T0(1):5"/>=0D
+                <v:ud v:nameU=3D"CornerLockVert" v:prompt=3D"" v:val=3D"VT=
0(1):5"/>=0D
+                <v:ud v:nameU=3D"CornerLockDiag" v:prompt=3D"" v:val=3D"VT=
0(0):5"/>=0D
+                <v:ud v:nameU=3D"TopLeftOffset" v:prompt=3D"" v:val=3D"VT0=
(0.15):1"/>=0D
+                <v:ud v:nameU=3D"TopRightOffset" v:prompt=3D"" v:val=3D"VT=
0(0.15):1"/>=0D
+                <v:ud v:nameU=3D"BotLeftOffset" v:prompt=3D"" v:val=3D"VT0=
(0.15):1"/>=0D
+                <v:ud v:nameU=3D"BotRightOffset" v:prompt=3D"" v:val=3D"VT=
0(0.15):1"/>=0D
+                <v:ud v:nameU=3D"visVersion" v:prompt=3D"" v:val=3D"VT0(15=
):26"/>=0D
+                <v:ud v:nameU=3D"TopLeftOffset" v:prompt=3D"" v:val=3D"VT0=
(0.093749999999999):1"/>=0D
+                <v:ud v:nameU=3D"TopRightOffset" v:prompt=3D"" v:val=3D"VT=
0(0.093749999999999):1"/>=0D
+                <v:ud v:nameU=3D"BotLeftOffset" v:prompt=3D"" v:val=3D"VT0=
(0.093749999999999):1"/>=0D
+                <v:ud v:nameU=3D"BotRightOffset" v:prompt=3D"" v:val=3D"VT=
0(0.093749999999999):1"/>=0D
+            </v:userDefs>=0D
+            <v:textBlock v:margins=3D"rect(4,4,4,4)" v:verticalAlign=3D"0"=
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+            <v:textRect cx=3D"36" cy=3D"466.621" width=3D"72" height=3D"70=
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+            <path d=3D"M6.75 502.11 L65.25 502.11 A6.74989 6.74989 -180 0 =
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+        <g id=3D"shape198-157" v:mID=3D"198" v:groupContext=3D"shape" tran=
sform=3D"translate(391.058,-122.49)">=0D
+            <title>Rounded Rectangle.198</title>=0D
+            <desc>SBI Implementation</desc>=0D
+            <v:userDefs>=0D
+                <v:ud v:nameU=3D"CTypeTopLeftSnip" v:prompt=3D"" v:val=3D"=
VT0(0):5"/>=0D
+                <v:ud v:nameU=3D"CTypeTopRightSnip" v:prompt=3D"" v:val=3D=
"VT0(0):5"/>=0D
+                <v:ud v:nameU=3D"CTypeBotLeftSnip" v:prompt=3D"" v:val=3D"=
VT0(0):5"/>=0D
+                <v:ud v:nameU=3D"CTypeBotRightSnip" v:prompt=3D"" v:val=3D=
"VT0(0):5"/>=0D
+                <v:ud v:nameU=3D"CornerLockHoriz" v:prompt=3D"" v:val=3D"V=
T0(1):5"/>=0D
+                <v:ud v:nameU=3D"CornerLockVert" v:prompt=3D"" v:val=3D"VT=
0(1):5"/>=0D
+                <v:ud v:nameU=3D"CornerLockDiag" v:prompt=3D"" v:val=3D"VT=
0(0):5"/>=0D
+                <v:ud v:nameU=3D"TopLeftOffset" v:prompt=3D"" v:val=3D"VT0=
(0.15):1"/>=0D
+                <v:ud v:nameU=3D"TopRightOffset" v:prompt=3D"" v:val=3D"VT=
0(0.15):1"/>=0D
+                <v:ud v:nameU=3D"BotLeftOffset" v:prompt=3D"" v:val=3D"VT0=
(0.15):1"/>=0D
+                <v:ud v:nameU=3D"BotRightOffset" v:prompt=3D"" v:val=3D"VT=
0(0.15):1"/>=0D
+                <v:ud v:nameU=3D"visVersion" v:prompt=3D"" v:val=3D"VT0(15=
):26"/>=0D
+                <v:ud v:nameU=3D"TopLeftOffset" v:prompt=3D"" v:val=3D"VT0=
(0.09375):1"/>=0D
+                <v:ud v:nameU=3D"TopRightOffset" v:prompt=3D"" v:val=3D"VT=
0(0.09375):1"/>=0D
+                <v:ud v:nameU=3D"BotLeftOffset" v:prompt=3D"" v:val=3D"VT0=
(0.09375):1"/>=0D
+                <v:ud v:nameU=3D"BotRightOffset" v:prompt=3D"" v:val=3D"VT=
0(0.09375):1"/>=0D
+            </v:userDefs>=0D
+            <v:textBlock v:margins=3D"rect(4,4,4,4)"/>=0D
+            <v:textRect cx=3D"33.75" cy=3D"486.36" width=3D"67.5" height=
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+            <path d=3D"M6.75 502.11 L60.75 502.11 A6.74989 6.74989 -180 0 =
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+        <g id=3D"shape226-161" v:mID=3D"226" v:groupContext=3D"shape" tran=
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+            <v:userDefs>=0D
+                <v:ud v:nameU=3D"CTypeTopLeftSnip" v:prompt=3D"" v:val=3D"=
VT0(0):5"/>=0D
+                <v:ud v:nameU=3D"CTypeTopRightSnip" v:prompt=3D"" v:val=3D=
"VT0(0):5"/>=0D
+                <v:ud v:nameU=3D"CTypeBotLeftSnip" v:prompt=3D"" v:val=3D"=
VT0(0):5"/>=0D
+                <v:ud v:nameU=3D"CTypeBotRightSnip" v:prompt=3D"" v:val=3D=
"VT0(0):5"/>=0D
+                <v:ud v:nameU=3D"CornerLockHoriz" v:prompt=3D"" v:val=3D"V=
T0(1):5"/>=0D
+                <v:ud v:nameU=3D"CornerLockVert" v:prompt=3D"" v:val=3D"VT=
0(1):5"/>=0D
+                <v:ud v:nameU=3D"CornerLockDiag" v:prompt=3D"" v:val=3D"VT=
0(0):5"/>=0D
+                <v:ud v:nameU=3D"TopLeftOffset" v:prompt=3D"" v:val=3D"VT0=
(0.15):1"/>=0D
+                <v:ud v:nameU=3D"TopRightOffset" v:prompt=3D"" v:val=3D"VT=
0(0.15):1"/>=0D
+                <v:ud v:nameU=3D"BotLeftOffset" v:prompt=3D"" v:val=3D"VT0=
(0.15):1"/>=0D
+                <v:ud v:nameU=3D"BotRightOffset" v:prompt=3D"" v:val=3D"VT=
0(0.15):1"/>=0D
+                <v:ud v:nameU=3D"visVersion" v:prompt=3D"" v:val=3D"VT0(15=
):26"/>=0D
+                <v:ud v:nameU=3D"TopLeftOffset" v:prompt=3D"" v:val=3D"VT0=
(0.09375):1"/>=0D
+                <v:ud v:nameU=3D"TopRightOffset" v:prompt=3D"" v:val=3D"VT=
0(0.09375):1"/>=0D
+                <v:ud v:nameU=3D"BotLeftOffset" v:prompt=3D"" v:val=3D"VT0=
(0.09375):1"/>=0D
+                <v:ud v:nameU=3D"BotRightOffset" v:prompt=3D"" v:val=3D"VT=
0(0.09375):1"/>=0D
+            </v:userDefs>=0D
+            <v:textBlock v:margins=3D"rect(4,4,4,4)"/>=0D
+            <v:textRect cx=3D"33.75" cy=3D"486.36" width=3D"67.5" height=
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+        <g id=3D"shape215-165" v:mID=3D"215" v:groupContext=3D"shape" tran=
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+            <title>Sheet.215</title>=0D
+            <path d=3D"M0 502.11 L375.75 502.11" class=3D"st28"/>=0D
+        </g>=0D
+        <g id=3D"shape231-168" v:mID=3D"231" v:groupContext=3D"shape" tran=
sform=3D"translate(-267.99,348.12) rotate(-90)">=0D
+            <title>Sheet.231</title>=0D
+            <path d=3D"M0 502.11 L70.86 502.11" class=3D"st22"/>=0D
+        </g>=0D
+        <g id=3D"shape237-171" v:mID=3D"237" v:groupContext=3D"shape" tran=
sform=3D"translate(166.495,747.361) rotate(180)">=0D
+            <title>Sheet.237</title>=0D
+            <path d=3D"M0 502.11 L11.12 502.11" class=3D"st22"/>=0D
+        </g>=0D
+        <g id=3D"shape239-174" v:mID=3D"239" v:groupContext=3D"shape" v:la=
yerMember=3D"0" transform=3D"translate(130.62,-309.887)">=0D
+            <title>Bottom to top 1.239</title>=0D
+            <v:userDefs>=0D
+                <v:ud v:nameU=3D"TextPos" v:val=3D"VT0(1):26"/>=0D
+                <v:ud v:nameU=3D"visVersion" v:val=3D"VT0(15):26"/>=0D
+            </v:userDefs>=0D
+            <path d=3D"M0 480.26 L0 502.59 L54 502.59 L54 502.11" class=3D=
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+        </g>=0D
+        <g id=3D"shape240-177" v:mID=3D"240" v:groupContext=3D"shape" tran=
sform=3D"translate(166.466,-254.054)">=0D
+            <title>Link</title>=0D
+            <v:userDefs>=0D
+                <v:ud v:nameU=3D"msvShapeCategories" v:prompt=3D"" v:val=
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+                <v:ud v:nameU=3D"visVersion" v:prompt=3D"" v:val=3D"VT0(15=
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+            </v:userDefs>=0D
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+            <v:userDefs>=0D
+                <v:ud v:nameU=3D"msvShapeCategories" v:prompt=3D"" v:val=
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+        <g id=3D"shape244-181" v:mID=3D"244" v:groupContext=3D"shape" v:la=
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+            <title>Bottom to top 1.244</title>=0D
+            <v:userDefs>=0D
+                <v:ud v:nameU=3D"TextPos" v:val=3D"VT0(1):26"/>=0D
+                <v:ud v:nameU=3D"visVersion" v:val=3D"VT0(15):26"/>=0D
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+            <path d=3D"M0 484.09 L0 484.65 L18.02 484.65 L18.02 502.11" cl=
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+        <g id=3D"shape245-184" v:mID=3D"245" v:groupContext=3D"shape" tran=
sform=3D"translate(191.37,747.361) rotate(180)">=0D
+            <title>Sheet.245</title>=0D
+            <path d=3D"M0 502.11 L11.13 502.11" class=3D"st22"/>=0D
+        </g>=0D
+        <g id=3D"shape249-187" v:mID=3D"249" v:groupContext=3D"shape" tran=
sform=3D"translate(209.37,-320.49)">=0D
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+            <desc>OEM can override this library instance to hook before/af=
ter e...</desc>=0D
+            <v:userDefs>=0D
+                <v:ud v:nameU=3D"CTypeTopLeftSnip" v:prompt=3D"" v:val=3D"=
VT0(0):5"/>=0D
+                <v:ud v:nameU=3D"CTypeTopRightSnip" v:prompt=3D"" v:val=3D=
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+                <v:ud v:nameU=3D"CTypeBotLeftSnip" v:prompt=3D"" v:val=3D"=
VT0(0):5"/>=0D
+                <v:ud v:nameU=3D"CTypeBotRightSnip" v:prompt=3D"" v:val=3D=
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+                <v:ud v:nameU=3D"CornerLockHoriz" v:prompt=3D"" v:val=3D"V=
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+                <v:ud v:nameU=3D"CornerLockVert" v:prompt=3D"" v:val=3D"VT=
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+                <v:ud v:nameU=3D"CornerLockDiag" v:prompt=3D"" v:val=3D"VT=
0(0):5"/>=0D
+                <v:ud v:nameU=3D"TopLeftOffset" v:prompt=3D"" v:val=3D"VT0=
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+                <v:ud v:nameU=3D"TopRightOffset" v:prompt=3D"" v:val=3D"VT=
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+                <v:ud v:nameU=3D"BotLeftOffset" v:prompt=3D"" v:val=3D"VT0=
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+                <v:ud v:nameU=3D"BotRightOffset" v:prompt=3D"" v:val=3D"VT=
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+                <v:ud v:nameU=3D"TopLeftOffset" v:prompt=3D"" v:val=3D"VT0=
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+                <v:ud v:nameU=3D"TopRightOffset" v:prompt=3D"" v:val=3D"VT=
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+                <v:ud v:nameU=3D"BotLeftOffset" v:prompt=3D"" v:val=3D"VT0=
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+                <v:ud v:nameU=3D"BotRightOffset" v:prompt=3D"" v:val=3D"VT=
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