From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0b-002e3701.pphosted.com (mx0b-002e3701.pphosted.com [148.163.143.35]) by mx.groups.io with SMTP id smtpd.web11.3755.1641630359708604214 for ; Sat, 08 Jan 2022 00:25:59 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@hpe.com header.s=pps0720 header.b=nOmEXN9E; spf=permerror, err=parse error for token &{10 18 %{ir}.%{v}.%{d}.spf.has.pphosted.com}: invalid domain name (domain: hpe.com, ip: 148.163.143.35, mailfrom: prvs=000704d8ca=abner.chang@hpe.com) Received: from pps.filterd (m0150245.ppops.net [127.0.0.1]) by mx0b-002e3701.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 2084g4pK021171 for ; Sat, 8 Jan 2022 08:25:59 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=hpe.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=pps0720; bh=PCkm2D+AVYy2xC3rF+HFMjnOdGYTDdUoi291c1s7oBE=; b=nOmEXN9EnpwED8F1TAjoPLPeUgOmaXDFS6c41Wn83maBqnifJ8UMCb4/PumCO6y0rxqt v9LueXtKoqsO+9ttH4Kj0c7A+3F9shXRFBJ0oSc0r6uZW5Nx6A7to3RmFNRvmkdBPdPY mg6CSGeHrQwDejtJ8IiS4xiK2Df9YI4UMtVcGP+5QHMd+k9uYmuTtTGtB0kUoIlwrCRD V0isVJ/jdbuDbNzezRCItSNTe0oUBK49Cdue71CBhay6oggZ/TICrdTaaJ/KmWArf9iL wvmfhlLMho1L1rkLBMVQ1vpr1VAoWbyZnrKjkgDckMpVX3mI0txUDwaeIEyTGvnvdvJz eg== Received: from g2t2352.austin.hpe.com (g2t2352.austin.hpe.com [15.233.44.25]) by mx0b-002e3701.pphosted.com (PPS) with ESMTPS id 3df3tfgrmg-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Sat, 08 Jan 2022 08:25:58 +0000 Received: from g2t2360.austin.hpecorp.net (g2t2360.austin.hpecorp.net [16.196.225.135]) by g2t2352.austin.hpe.com (Postfix) with ESMTP id 408B985 for ; Sat, 8 Jan 2022 08:25:58 +0000 (UTC) Received: from UB16Abner.asiapacific.hpqcorp.net (ub16abner.asiapacific.hpqcorp.net [15.119.209.229]) by g2t2360.austin.hpecorp.net (Postfix) with ESMTP id 878CF39; Sat, 8 Jan 2022 08:25:57 +0000 (UTC) From: "Abner Chang" To: devel@edk2.groups.io Cc: abner.chang@hpe.com Subject: [PATCH 54/79] RiscV/ProcessorPkg: Create read mtime CSR library instances Date: Sat, 8 Jan 2022 15:24:37 +0800 Message-Id: <20220108072444.17879-13-abner.chang@hpe.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220108072444.17879-1-abner.chang@hpe.com> References: <20220108072444.17879-1-abner.chang@hpe.com> MIME-Version: 1.0 X-Proofpoint-GUID: -fxrwbSRqTqLyYJ1k-Grqk_M6kreIr28 X-Proofpoint-ORIG-GUID: -fxrwbSRqTqLyYJ1k-Grqk_M6kreIr28 X-HPE-SCL: -1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-01-08_03,2022-01-07_01,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 malwarescore=0 phishscore=0 spamscore=0 mlxscore=0 lowpriorityscore=0 impostorscore=0 mlxlogscore=990 adultscore=0 clxscore=1015 priorityscore=1501 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2110150000 definitions=main-2201080064 Content-Transfer-Encoding: quoted-printable (This is migrated from edk2-platforms:Silicon) Create library instances of reading Machine mode timer. - MacineModeTimerLib is used to read mtime CSR through platfrom library. - EmulatedMacineModeTimerLib is used to read mtime CSR through shadow CSR. Cc: Sunil V L Cc: Daniel Schaefer Signed-off-by: Abner Chang Reviewed-by: Daniel Schaefer Reviewed-by: Sunil V L --- .../RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc | 2 + .../EmulatedMachineModeTimerLib.inf | 34 +++++++++++++++++ .../MachineModeTimerLib.inf | 38 +++++++++++++++++++ .../Include/IndustryStandard/RiscV.h | 5 +++ .../Include/Library/RiscVCpuLib.h | 3 ++ .../EmulatedMachineModeTimerLib.S | 24 ++++++++++++ .../MachineModeTimerLib/MachineModeTimerLib.S | 25 ++++++++++++ 7 files changed, 131 insertions(+) create mode 100644 Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineMod= eTimer/EmulatedMachineModeTimerLib/EmulatedMachineModeTimerLib.inf create mode 100644 Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineMod= eTimer/MachineModeTimerLib/MachineModeTimerLib.inf create mode 100644 Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineMod= eTimer/EmulatedMachineModeTimerLib/EmulatedMachineModeTimerLib.S create mode 100644 Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineMod= eTimer/MachineModeTimerLib/MachineModeTimerLib.S diff --git a/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc b/Silicon/RI= SC-V/ProcessorPkg/RiscVProcessorPkg.dsc index 531319322c..3b5738957d 100644 --- a/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc +++ b/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc @@ -44,6 +44,8 @@ RiscVEdk2SbiLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/Risc= VEdk2SbiLib.inf=0D RiscVOpensbiLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/Risc= VOpensbiLib.inf=0D TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTime= rLib.inf=0D + MachineModeTimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachine= ModeTimer/MachineModeTimerLib/MachineModeTimerLib.inf=0D + #MachineModeTimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachin= eModeTimer/EmulatedMachineModeTimerLib/EmulatedMachineModeTimerLib.inf=0D BaseLib|MdePkg/Library/BaseLib/BaseLib.inf=0D BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf=0D DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.i= nf=0D diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineModeTimer/= EmulatedMachineModeTimerLib/EmulatedMachineModeTimerLib.inf b/Silicon/RISC-= V/ProcessorPkg/Library/RiscVReadMachineModeTimer/EmulatedMachineModeTimerLi= b/EmulatedMachineModeTimerLib.inf new file mode 100644 index 0000000000..369028a9a6 --- /dev/null +++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineModeTimer/Emulate= dMachineModeTimerLib/EmulatedMachineModeTimerLib.inf @@ -0,0 +1,34 @@ +## @file=0D +# Library to read Machine Mode Timer.=0D +#=0D +# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All right= s reserved.
=0D +#=0D +# SPDX-License-Identifier: BSD-2-Clause-Patent=0D +#=0D +##=0D +=0D +[Defines]=0D + INF_VERSION =3D 0x0001001b=0D + BASE_NAME =3D EmulatedMachineModeTimerLib=0D + FILE_GUID =3D 81B82615-D85C-4377-8BFF-7442322E2835= =0D + MODULE_TYPE =3D BASE=0D + VERSION_STRING =3D 1.0=0D + LIBRARY_CLASS =3D MachineModeTimerLib=0D +=0D +#=0D +# The following information is for reference only and not required by the = build tools.=0D +#=0D +# VALID_ARCHITECTURES =3D RISCV64=0D +#=0D +=0D +[Sources]=0D +=0D +[Sources.RISCV64]=0D + EmulatedMachineModeTimerLib.S=0D +=0D +[Packages]=0D + MdePkg/MdePkg.dec=0D + Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec=0D +=0D +=0D +=0D diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineModeTimer/= MachineModeTimerLib/MachineModeTimerLib.inf b/Silicon/RISC-V/ProcessorPkg/L= ibrary/RiscVReadMachineModeTimer/MachineModeTimerLib/MachineModeTimerLib.inf new file mode 100644 index 0000000000..71d4315445 --- /dev/null +++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineModeTimer/Machine= ModeTimerLib/MachineModeTimerLib.inf @@ -0,0 +1,38 @@ +## @file=0D +# Library to read Machine Mode Timer.=0D +#=0D +# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All right= s reserved.
=0D +#=0D +# SPDX-License-Identifier: BSD-2-Clause-Patent=0D +#=0D +##=0D +=0D +[Defines]=0D + INF_VERSION =3D 0x0001001b=0D + BASE_NAME =3D MachineModeTimerLib=0D + FILE_GUID =3D 6390D8AA-E0E6-4625-A515-9BB2DC7BBCAB= =0D + MODULE_TYPE =3D BASE=0D + VERSION_STRING =3D 1.0=0D + LIBRARY_CLASS =3D MachineModeTimerLib=0D +=0D +#=0D +# The following information is for reference only and not required by the = build tools.=0D +#=0D +# VALID_ARCHITECTURES =3D RISCV64=0D +#=0D +=0D +[Sources]=0D +=0D +[Sources.RISCV64]=0D + MachineModeTimerLib.S=0D +=0D +[Packages]=0D + MdePkg/MdePkg.dec=0D + Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec=0D +=0D +[LibraryClasses]=0D + RiscVCpuLib=0D + RiscVPlatformTimerLib=0D +=0D +=0D +=0D diff --git a/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscV.h b= /Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscV.h index f6726bda24..c9715a2ee2 100644 --- a/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscV.h +++ b/Silicon/RISC-V/ProcessorPkg/Include/IndustryStandard/RiscV.h @@ -154,4 +154,9 @@ #define RISCV_CSR_MTOHOST 0x780=0D #define RISCV_CSR_MFROMHOST 0x781=0D =0D +//=0D +// User mode CSR=0D +//=0D +#define RISCV_CSR_CYCLE 0xc00=0D +#define RISCV_CSR_TIME 0xc01=0D #endif=0D diff --git a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h b/Si= licon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h index f70723567e..8d51152fa9 100644 --- a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h +++ b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h @@ -32,6 +32,9 @@ RiscVGetMachineTrapCause (VOID); UINT64=0D RiscVReadMachineTimer (VOID);=0D =0D +UINT64=0D +RiscVReadMachineTimerInterface (VOID);=0D +=0D VOID=0D RiscVSetMachineTimerCmp (UINT64);=0D =0D diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineModeTimer/= EmulatedMachineModeTimerLib/EmulatedMachineModeTimerLib.S b/Silicon/RISC-V/= ProcessorPkg/Library/RiscVReadMachineModeTimer/EmulatedMachineModeTimerLib/= EmulatedMachineModeTimerLib.S new file mode 100644 index 0000000000..1acd0ab062 --- /dev/null +++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineModeTimer/Emulate= dMachineModeTimerLib/EmulatedMachineModeTimerLib.S @@ -0,0 +1,24 @@ +//------------------------------------------------------------------------= ------=0D +//=0D +// Read Machine mode timer using shadow CSR.=0D +//=0D +// Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
=0D +//=0D +// SPDX-License-Identifier: BSD-2-Clause-Patent=0D +//=0D +//------------------------------------------------------------------------= ------=0D +#include =0D +=0D +.data=0D +=0D +.text=0D +.align 3=0D +=0D +.global ASM_PFX(RiscVReadMachineTimerInterface)=0D +//=0D +// Read machine mode timer CSR through shadow CSR.=0D +// @retval a0 : 64-bit machine timer.=0D +//=0D +ASM_PFX (RiscVReadMachineTimerInterface):=0D + csrr a0, RISCV_CSR_TIME=0D + ret=0D diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineModeTimer/= MachineModeTimerLib/MachineModeTimerLib.S b/Silicon/RISC-V/ProcessorPkg/Lib= rary/RiscVReadMachineModeTimer/MachineModeTimerLib/MachineModeTimerLib.S new file mode 100644 index 0000000000..16f8bdd70a --- /dev/null +++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineModeTimer/Machine= ModeTimerLib/MachineModeTimerLib.S @@ -0,0 +1,25 @@ +//------------------------------------------------------------------------= ------=0D +//=0D +// Read mtimer through platform library.=0D +//=0D +// Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
=0D +//=0D +// SPDX-License-Identifier: BSD-2-Clause-Patent=0D +//=0D +//------------------------------------------------------------------------= ------=0D +#include =0D +=0D +.data=0D +=0D +.text=0D +.align 3=0D +=0D +.global ASM_PFX(RiscVReadMachineTimerInterface)=0D +//=0D +// Read machine mode timer CSR.=0D +// @retval a0 : 64-bit machine timer.=0D +//=0D +ASM_PFX (RiscVReadMachineTimerInterface):=0D + call RiscVReadMachineTimer=0D + ret=0D +=0D --=20 2.31.1