From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0b-002e3701.pphosted.com (mx0b-002e3701.pphosted.com [148.163.143.35]) by mx.groups.io with SMTP id smtpd.web08.3784.1641630363234361560 for ; Sat, 08 Jan 2022 00:26:03 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@hpe.com header.s=pps0720 header.b=MrSOaugb; spf=permerror, err=parse error for token &{10 18 %{ir}.%{v}.%{d}.spf.has.pphosted.com}: invalid domain name (domain: hpe.com, ip: 148.163.143.35, mailfrom: prvs=000704d8ca=abner.chang@hpe.com) Received: from pps.filterd (m0150244.ppops.net [127.0.0.1]) by mx0b-002e3701.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 2087Kapu014280 for ; Sat, 8 Jan 2022 08:26:02 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=hpe.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=pps0720; bh=FmaNsRBQuYzCzzTgC3t6PQLpnKLY5snHkjr1Yfe++dc=; b=MrSOaugbyXtWHQfD5vO8Ayv5CbxWEpbMDyUsxBsj2GamiKqQlsCYMAtAFKiuCGkiHOwl C3U/EQFRJri4FQOPE9U9hIGicV5B390XJ425tc3ImiqMkpz3Iq4JMEXxKU1yKBvmsffN /y9M+HmqljUdKbalMacRQ/SIXskFy/wko7VHOdEzT2Z58RQp+VIhO5tLu5odknslFaZZ 2iMEPJGBe5EPNg1q4JRD5L1YxGpqOK8pXtwGgdKVLJS3kpkSnJdA7NE68QIn27aq793W DgcTqwDgdEYK/mx0dOeCLWsIc6UOEUDbJCmre3palqc9KUg3GE2owcNndTuP8Zq9D/gj Lw== Received: from g2t2353.austin.hpe.com (g2t2353.austin.hpe.com [15.233.44.26]) by mx0b-002e3701.pphosted.com (PPS) with ESMTPS id 3df395ruws-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Sat, 08 Jan 2022 08:26:02 +0000 Received: from g2t2360.austin.hpecorp.net (g2t2360.austin.hpecorp.net [16.196.225.135]) by g2t2353.austin.hpe.com (Postfix) with ESMTP id 927EE6D for ; Sat, 8 Jan 2022 08:26:01 +0000 (UTC) Received: from UB16Abner.asiapacific.hpqcorp.net (ub16abner.asiapacific.hpqcorp.net [15.119.209.229]) by g2t2360.austin.hpecorp.net (Postfix) with ESMTP id DAA4439; Sat, 8 Jan 2022 08:26:00 +0000 (UTC) From: "Abner Chang" To: devel@edk2.groups.io Cc: abner.chang@hpe.com Subject: [PATCH 57/79] PlatformPkg/Sec: Separate EDK2 Opensbi platform hook. Date: Sat, 8 Jan 2022 15:24:40 +0800 Message-Id: <20220108072444.17879-16-abner.chang@hpe.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220108072444.17879-1-abner.chang@hpe.com> References: <20220108072444.17879-1-abner.chang@hpe.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: YFdfj2ZDlMrKr1Far_6E3zO0zQ8k6U0u X-Proofpoint-GUID: YFdfj2ZDlMrKr1Far_6E3zO0zQ8k6U0u X-HPE-SCL: -1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-01-08_03,2022-01-07_01,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 phishscore=0 mlxlogscore=999 adultscore=0 lowpriorityscore=0 suspectscore=0 mlxscore=0 bulkscore=0 priorityscore=1501 clxscore=1015 impostorscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2110150000 definitions=main-2201080063 Content-Transfer-Encoding: quoted-printable (This is migrated from edk2-platforms:Platform) Separate EDK2 Opensbi platform operations hooks from Secmain as an individual library which can be override by OEM platform. Cc: Sunil V L Cc: Daniel Schaefer Signed-off-by: Abner Chang Reviewed-by: Daniel Schaefer Reviewed-by: Sunil V L --- .../RISC-V/PlatformPkg/RiscVPlatformPkg.dec | 1 + .../RISC-V/PlatformPkg/RiscVPlatformPkg.dsc | 4 +- .../Edk2OpensbiPlatformWrapperLib.inf | 44 ++ .../PlatformPkg/Universal/Sec/SecMain.inf | 10 +- .../Library/Edk2OpensbiPlatformWrapperLib.h | 16 + .../PlatformPkg/Universal/Sec/SecMain.h | 1 + .../Edk2OpensbiPlatformWrapperLib.c | 530 ++++++++++++++++++ .../Universal/Sec/Edk2OpenSbiPlatform.c | 277 --------- .../PlatformPkg/Universal/Sec/SecMain.c | 141 ----- 9 files changed, 598 insertions(+), 426 deletions(-) create mode 100644 Platform/RISC-V/PlatformPkg/Library/Edk2OpensbiPlatform= WrapperLib/Edk2OpensbiPlatformWrapperLib.inf create mode 100644 Platform/RISC-V/PlatformPkg/Include/Library/Edk2Opensbi= PlatformWrapperLib.h create mode 100644 Platform/RISC-V/PlatformPkg/Library/Edk2OpensbiPlatform= WrapperLib/Edk2OpensbiPlatformWrapperLib.c delete mode 100644 Platform/RISC-V/PlatformPkg/Universal/Sec/Edk2OpenSbiPl= atform.c diff --git a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec b/Platform/RI= SC-V/PlatformPkg/RiscVPlatformPkg.dec index 947ae40e20..19206556ce 100644 --- a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec +++ b/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec @@ -20,6 +20,7 @@ [LibraryClasses]=0D FirmwareContextProcessorSpecificLib|Include/Library/FirmwareContextProce= ssorSpecificLib.h=0D RiscVPlatformTempMemoryInitLib|Include/Library/RiscVPlatformTempMemoryIn= itLib.h=0D + Edk2OpensbiPlatformiLib|Include/Library/Edk2OpensbiPlatformiWrapperLib.h= =0D =0D [Guids]=0D gUefiRiscVPlatformPkgTokenSpaceGuid =3D {0x6A67AF99, 0x4592, 0x40F8, { = 0xB6, 0xBE, 0x62, 0xBC, 0xA1, 0x0D, 0xA1, 0xEC}}=0D diff --git a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dsc b/Platform/RI= SC-V/PlatformPkg/RiscVPlatformPkg.dsc index bbb043f9ed..47a0fc4494 100644 --- a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dsc +++ b/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dsc @@ -43,7 +43,6 @@ RiscVOpensbiPlatformLib|Platform/RISC-V/PlatformPkg/Library/OpensbiPlatf= ormLib/OpensbiPlatformLib.inf=0D RiscVCpuLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/RiscVCpuLib.= inf=0D RiscVEdk2SbiLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/Risc= VEdk2SbiLib.inf=0D - RiscVOpensbiLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/Risc= VOpensbiLib.inf=0D BaseLib|MdePkg/Library/BaseLib/BaseLib.inf=0D BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf=0D DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.i= nf=0D @@ -72,6 +71,8 @@ =0D [LibraryClasses.common.SEC]=0D ExtractGuidedSectionLib|MdePkg/Library/BaseExtractGuidedSectionLib/BaseE= xtractGuidedSectionLib.inf=0D + RiscVOpensbiLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/Risc= VOpensbiLib.inf=0D + Edk2OpensbiPlatformWrapperLib|Platform/RISC-V/PlatformPkg/Library/Edk2Op= ensbiPlatformWrapperLib/Edk2OpensbiPlatformWrapperLib.inf=0D RiscVSpecialPlatformLib|Platform/RISC-V/PlatformPkg/Library/RiscVSpecial= PlatformLibNull/RiscVSpecialPlatformLibNull.inf=0D =0D [LibraryClasses.common.DXE_DRIVER]=0D @@ -87,6 +88,7 @@ Platform/RISC-V/PlatformPkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.= inf=0D Platform/RISC-V/PlatformPkg/Library/PlatformSecPpiLibNull/PlatformSecPpi= LibNull.inf=0D Platform/RISC-V/PlatformPkg/Library/RiscVSpecialPlatformLibNull/RiscVSpe= cialPlatformLibNull.inf=0D + Platform/RISC-V/PlatformPkg/Library/Edk2OpensbiPlatformWrapperLib/Edk2Op= ensbiPlatformWrapperLib.inf=0D =0D [Components.common.SEC]=0D Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf=0D diff --git a/Platform/RISC-V/PlatformPkg/Library/Edk2OpensbiPlatformWrapper= Lib/Edk2OpensbiPlatformWrapperLib.inf b/Platform/RISC-V/PlatformPkg/Library= /Edk2OpensbiPlatformWrapperLib/Edk2OpensbiPlatformWrapperLib.inf new file mode 100644 index 0000000000..8c268c556d --- /dev/null +++ b/Platform/RISC-V/PlatformPkg/Library/Edk2OpensbiPlatformWrapperLib/Edk= 2OpensbiPlatformWrapperLib.inf @@ -0,0 +1,44 @@ +## @file=0D +# EDK2 OpenSBI generic platform wrapper library=0D +#=0D +# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
=0D +#=0D +# SPDX-License-Identifier: BSD-2-Clause-Patent=0D +#=0D +##=0D +=0D +[Defines]=0D + INF_VERSION =3D 0x0001001b=0D + BASE_NAME =3D Edk2OpensbiPlatformWrapperLib=0D + FILE_GUID =3D 364395A3-21BA-400C-96F7-5D9817F6FEE5= =0D + MODULE_TYPE =3D SEC=0D + VERSION_STRING =3D 1.0=0D + LIBRARY_CLASS =3D Edk2OpensbiPlatformWrapperLib=0D +=0D +#=0D +# The following information is for reference only and not required by the = build tools.=0D +#=0D +# VALID_ARCHITECTURES =3D RISCV64=0D +#=0D +=0D +[Sources]=0D + Edk2OpensbiPlatformWrapperLib.c=0D +=0D +[Packages]=0D + MdeModulePkg/MdeModulePkg.dec=0D + MdePkg/MdePkg.dec=0D + Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec=0D + Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec=0D +=0D +[Pcd]=0D + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdFirmwareDomainBaseAddress=0D + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdFirmwareDomainSize=0D + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdVariableFirmwareRegionBaseAddress= =0D + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdVariableFirmwareRegionSize=0D +=0D +[LibraryClasses]=0D + BaseLib=0D + DebugLib=0D + DebugAgentLib=0D + PcdLib=0D + PrintLib=0D diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf b/Platfo= rm/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf index dd5f01ab4d..ceb6d25222 100644 --- a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf +++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf @@ -23,7 +23,6 @@ =0D [Sources]=0D SecMain.c=0D - Edk2OpenSbiPlatform.c=0D =0D [Sources.RISCV64]=0D Riscv64/SecEntry.S=0D @@ -40,6 +39,7 @@ BaseMemoryLib=0D DebugAgentLib=0D DebugLib=0D + Edk2OpensbiPlatformWrapperLib=0D ExtractGuidedSectionLib=0D FdtLib=0D IoLib=0D @@ -62,14 +62,10 @@ [Pcd]=0D gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootHartId=0D gUefiRiscVPlatformPkgTokenSpaceGuid.PcdHartCount=0D - gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootableHartNumber=0D - gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootableHartIndexToId=0D gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRootFirmwareDomainBaseAddress=0D gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRootFirmwareDomainSize=0D - gUefiRiscVPlatformPkgTokenSpaceGuid.PcdFirmwareDomainBaseAddress=0D - gUefiRiscVPlatformPkgTokenSpaceGuid.PcdFirmwareDomainSize=0D - gUefiRiscVPlatformPkgTokenSpaceGuid.PcdVariableFirmwareRegionBaseAddress= =0D - gUefiRiscVPlatformPkgTokenSpaceGuid.PcdVariableFirmwareRegionSize=0D + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootableHartNumber=0D + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootableHartIndexToId=0D gUefiRiscVPlatformPkgTokenSpaceGuid.PcdOpenSbiStackSize=0D gUefiRiscVPlatformPkgTokenSpaceGuid.PcdScratchRamBase=0D gUefiRiscVPlatformPkgTokenSpaceGuid.PcdScratchRamSize=0D diff --git a/Platform/RISC-V/PlatformPkg/Include/Library/Edk2OpensbiPlatfor= mWrapperLib.h b/Platform/RISC-V/PlatformPkg/Include/Library/Edk2OpensbiPlat= formWrapperLib.h new file mode 100644 index 0000000000..4da0a64a8c --- /dev/null +++ b/Platform/RISC-V/PlatformPkg/Include/Library/Edk2OpensbiPlatformWrappe= rLib.h @@ -0,0 +1,16 @@ +/** @file=0D + Definition of EDK2 OpenSBI generic platform wrapper library=0D +=0D + Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All right= s reserved.
=0D +=0D + SPDX-License-Identifier: BSD-2-Clause-Patent=0D +**/=0D +=0D +#ifndef EDK2_OPENSBI_PLATFORM_WRAPPER_LIB_=0D +#define EDK2_OPENSBI_PLATFORM_WRAPPER_LIB_=0D +=0D +#include =0D +=0D +extern struct sbi_platform_operations Edk2OpensbiPlatformOps;=0D +=0D +#endif=0D diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.h b/Platform= /RISC-V/PlatformPkg/Universal/Sec/SecMain.h index 496799efc0..6188778fc4 100644 --- a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.h +++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.h @@ -16,6 +16,7 @@ #include =0D #include =0D #include =0D +#include =0D #include =0D #include =0D #include =0D diff --git a/Platform/RISC-V/PlatformPkg/Library/Edk2OpensbiPlatformWrapper= Lib/Edk2OpensbiPlatformWrapperLib.c b/Platform/RISC-V/PlatformPkg/Library/E= dk2OpensbiPlatformWrapperLib/Edk2OpensbiPlatformWrapperLib.c new file mode 100644 index 0000000000..6c5c1a789f --- /dev/null +++ b/Platform/RISC-V/PlatformPkg/Library/Edk2OpensbiPlatformWrapperLib/Edk= 2OpensbiPlatformWrapperLib.c @@ -0,0 +1,530 @@ +/*=0D + EDK2 OpenSBI generic platform wrapper library=0D +=0D + Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All right= s reserved.
=0D +=0D + SPDX-License-Identifier: BSD-2-Clause-Patent=0D +=0D + */=0D +=0D +#include =0D +#include =0D +#include =0D +#include =0D +#include =0D +#include =0D +#include =0D +#include =0D +=0D +extern struct sbi_platform_operations platform_ops;=0D +extern atomic_t BootHartDone;=0D +=0D +/**=0D + Add firmware memory domain.=0D +=0D + @retval OpenSBI error code.=0D +=0D +**/=0D +INT32=0D +SecSetEdk2FwMemoryRegions (=0D + VOID=0D + )=0D +{=0D + INT32 Ret;=0D + struct sbi_domain_memregion fw_memregs;=0D +=0D + Ret =3D 0;=0D +=0D + //=0D + // EDK2 PEI domain memory region=0D + //=0D + fw_memregs.order =3D log2roundup(FixedPcdGet32(PcdFirmwareDomainSize));= =0D + fw_memregs.base =3D FixedPcdGet32(PcdFirmwareDomainBaseAddress);=0D + fw_memregs.flags =3D SBI_DOMAIN_MEMREGION_EXECUTABLE | SBI_DOMAIN_MEMREG= ION_READABLE;=0D + Ret =3D sbi_domain_root_add_memregion ((CONST struct sbi_domain_memregio= n *)&fw_memregs);=0D + if (Ret !=3D 0) {=0D + DEBUG ((DEBUG_ERROR, "%a: Add firmware regiosn of FW Domain fail\n", _= _FUNCTION__));=0D + }=0D +=0D + //=0D + // EDK2 EFI Variable domain memory region=0D + //=0D + fw_memregs.order =3D log2roundup(FixedPcdGet32(PcdVariableFirmwareRegion= Size));=0D + fw_memregs.base =3D FixedPcdGet32(PcdVariableFirmwareRegionBaseAddress);= =0D + fw_memregs.flags =3D SBI_DOMAIN_MEMREGION_READABLE | SBI_DOMAIN_MEMREGIO= N_WRITEABLE;=0D + Ret =3D sbi_domain_root_add_memregion ((CONST struct sbi_domain_memregio= n *)&fw_memregs);=0D + if (Ret !=3D 0) {=0D + DEBUG ((DEBUG_ERROR, "%a: Add firmware regiosn of variable FW Domain f= ail\n", __FUNCTION__));=0D + }=0D + return Ret;=0D +}=0D +/**=0D + OpenSBI platform early init hook.=0D +=0D + @param[in] ColdBoot Is cold boot path or warm boot path.=0D + @retval OpenSBI error code.=0D +=0D +**/=0D +INT32=0D +SecPostOpenSbiPlatformEarlylInit(=0D + IN BOOLEAN ColdBoot=0D + )=0D +{=0D + UINT32 HartId;=0D +=0D + if (!ColdBoot) {=0D + HartId =3D current_hartid();=0D + DEBUG ((DEBUG_INFO, "%a: Non boot hart %d.\n", __FUNCTION__, HartId));= =0D + return 0;=0D + }=0D + //=0D + // Setup firmware memory region.=0D + //=0D + if (SecSetEdk2FwMemoryRegions () !=3D 0) {=0D + ASSERT (FALSE);=0D + }=0D +=0D + //=0D + // Boot HART is already in the process of OpenSBI initialization.=0D + // We can let other HART to keep booting.=0D + //=0D + DEBUG ((DEBUG_INFO, "%a: Set boot hart done.\n", __FUNCTION__));=0D + atomic_write (&BootHartDone, (UINT64)TRUE);=0D + return 0;=0D +}=0D +=0D +/**=0D + OpenSBI platform final init hook.=0D + We restore the next_arg1 to the pointer of EFI_RISCV_OPENSBI_FIRMWARE_CO= NTEXT.=0D +=0D + @param[in] ColdBoot Is cold boot path or warm boot path.=0D + @retval OpenSBI error code.=0D +=0D +**/=0D +INT32=0D +SecPostOpenSbiPlatformFinalInit (=0D + IN BOOLEAN ColdBoot=0D + )=0D +{=0D + UINT32 HartId;=0D + struct sbi_scratch *SbiScratch;=0D + struct sbi_scratch *ScratchSpace;=0D + struct sbi_platform *SbiPlatform;=0D + EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT *FirmwareContext;=0D +=0D + if (!ColdBoot) {=0D + HartId =3D current_hartid();=0D + DEBUG ((DEBUG_INFO, "%a: Non boot hart %d.\n", __FUNCTION__, HartId));= =0D + return 0;=0D + }=0D +=0D + DEBUG((DEBUG_INFO, "%a: Entry, preparing to jump to PEI Core\n\n", __FUN= CTION__));=0D +=0D + SbiScratch =3D sbi_scratch_thishart_ptr();=0D + SbiPlatform =3D (struct sbi_platform *)sbi_platform_ptr(SbiScratch);=0D + FirmwareContext =3D (EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT *)SbiPlatform->f= irmware_context;=0D +=0D + //=0D + // Print out scratch address of each hart=0D + //=0D + DEBUG ((DEBUG_INFO, "%a: OpenSBI scratch address for each hart:\n", __FU= NCTION__));=0D + for (HartId =3D 0; HartId < SBI_HARTMASK_MAX_BITS; HartId ++) {=0D + if (sbi_platform_hart_invalid(SbiPlatform, HartId)) {=0D + continue;=0D + }=0D + ScratchSpace =3D sbi_hartid_to_scratch (HartId);=0D + if(ScratchSpace !=3D NULL) {=0D + DEBUG((DEBUG_INFO, " Hart %d: 0x%x\n", HartId, ScratchSpace= ));=0D + } else {=0D + DEBUG((DEBUG_INFO, " Hart %d not initialized yet\n", HartId= ));=0D + }=0D + }=0D +=0D + //=0D + // Set firmware context Hart-specific pointer=0D + //=0D + for (HartId =3D 0; HartId < SBI_HARTMASK_MAX_BITS; HartId ++) {=0D + if (sbi_platform_hart_invalid(SbiPlatform, HartId)) {=0D + continue;=0D + }=0D + ScratchSpace =3D sbi_hartid_to_scratch (HartId);=0D + if (ScratchSpace !=3D NULL) {=0D + FirmwareContext->HartSpecific[HartId] =3D=0D + (EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC *)((UINT8 *)ScratchSpace= - FIRMWARE_CONTEXT_HART_SPECIFIC_SIZE);=0D + DEBUG ((DEBUG_INFO, "%a: OpenSBI Hart %d Firmware Context Hart-spe= cific at address: 0x%x\n",=0D + __FUNCTION__,=0D + HartId,=0D + FirmwareContext->HartSpecific [HartId]=0D + ));=0D + }=0D + }=0D +=0D + DEBUG((DEBUG_INFO, "%a: Will jump to PEI Core in OpenSBI with \n", __FUN= CTION__));=0D + DEBUG((DEBUG_INFO, " sbi_scratch =3D %x\n", SbiScratch));=0D + DEBUG((DEBUG_INFO, " sbi_platform =3D %x\n", SbiPlatform));=0D + DEBUG((DEBUG_INFO, " FirmwareContext =3D %x\n", FirmwareContext));=0D + SbiScratch->next_arg1 =3D (unsigned long)FirmwareContext;=0D +=0D + return 0;=0D +}=0D +/**=0D + OpenSBI platform early init hook.=0D +=0D + @param[in] ColdBoot Is cold boot path or warm boot path.=0D + @retval OpenSBI error code.=0D +=0D +**/=0D +INT32=0D +Edk2OpensbiPlatformEarlyInit (=0D + IN BOOLEAN ColdBoot=0D + )=0D +{=0D + INT32 ReturnCode;=0D +=0D + DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));=0D +=0D + if (platform_ops.early_init) {=0D + ReturnCode =3D platform_ops.early_init (ColdBoot);=0D + if (ReturnCode) {=0D + return ReturnCode;=0D + }=0D + }=0D + if (ColdBoot =3D=3D TRUE) {=0D + return SecPostOpenSbiPlatformEarlylInit(ColdBoot);=0D + }=0D + return 0;=0D +}=0D +/**=0D + OpenSBI platform final init hook.=0D +=0D + @param[in] ColdBoot Is cold boot path or warm boot path.=0D + @retval OpenSBI error code.=0D +=0D +**/=0D +INT32=0D +Edk2OpensbiPlatformFinalInit (=0D + IN BOOLEAN ColdBoot=0D + )=0D +{=0D + INT32 ReturnCode;=0D +=0D + DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));=0D +=0D + if (platform_ops.final_init) {=0D + ReturnCode =3D platform_ops.final_init (ColdBoot);=0D + if (ReturnCode) {=0D + return ReturnCode;=0D + }=0D + }=0D + if (ColdBoot =3D=3D TRUE) {=0D + return SecPostOpenSbiPlatformFinalInit(ColdBoot);=0D + }=0D + return 0;=0D +}=0D +/**=0D + OpenSBI platform early exit hook.=0D +=0D +**/=0D +VOID=0D +Edk2OpensbiPlatformEarlyExit (=0D + VOID=0D +)=0D +{=0D + DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));=0D +=0D + if (platform_ops.early_exit) {=0D + return platform_ops.early_exit ();=0D + }=0D +}=0D +=0D +/**=0D + Platform final exit hook=0D +=0D + **/=0D +VOID=0D +Edk2OpensbiPlatformFinalExit (=0D + VOID=0D + )=0D +{=0D + DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));=0D +=0D + if (platform_ops.early_exit) {=0D + return platform_ops.early_exit ();=0D + }=0D +}=0D +=0D +/**=0D + For platforms that do not implement misa, non-standard=0D + methods are needed to determine cpu extension.=0D +=0D + @param[in] Extension Check ISA extension.=0D + @retval OpenSBI error code.=0D +=0D +**/=0D +INT32=0D +Edk2OpensbiPlatforMMISACheckExtension (=0D + IN CHAR8 Extension=0D + )=0D +{=0D + if (platform_ops.misa_check_extension) {=0D + return platform_ops.misa_check_extension (Extension);=0D + }=0D + return 0;=0D +}=0D +=0D +/**=0D + Get the XLEN.=0D +=0D + @retval Return the XLEN=0D +=0D +**/=0D +INT32=0D +Edk2OpensbiPlatforMMISAGetXLEN (=0D + VOID=0D +)=0D +{=0D + if (platform_ops.misa_get_xlen) {=0D + return platform_ops.misa_get_xlen ();=0D + }=0D + return 0;=0D +}=0D +=0D +/**=0D + Initialize (or populate) domains for the platform*=0D +=0D + @retval OpenSBI error code.=0D +=0D +**/=0D +INT32=0D +Edk2OpensbiPlatformDomainsInit (=0D + VOID=0D +)=0D +{=0D + DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));=0D +=0D + if (platform_ops.domains_init) {=0D + return platform_ops.domains_init ();=0D + }=0D + return 0;=0D +}=0D +=0D +/**=0D + Initialize the platform console=0D +=0D + @retval OpenSBI error code.=0D +=0D +**/=0D +INT32=0D +Edk2OpensbiPlatformSerialInit (=0D + VOID=0D +)=0D +{=0D + DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));=0D +=0D + if (platform_ops.console_init) {=0D + return platform_ops.console_init ();=0D + }=0D + return 0;=0D +}=0D +=0D +/**=0D + Initialize the platform interrupt controller for current HART=0D +=0D + @param[in] ColdBoot Is cold boot path or warm boot path.=0D + @retval OpenSBI error code.=0D +=0D +**/=0D +INT32=0D +Edk2OpensbiPlatformIrqchipInit (=0D + IN BOOLEAN ColdBoot=0D +)=0D +{=0D + DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));=0D +=0D + if (platform_ops.irqchip_init) {=0D + return platform_ops.irqchip_init (ColdBoot);=0D + }=0D + return 0;=0D +}=0D +=0D +/**=0D + Exit the platform interrupt controller for current HART=0D +=0D +**/=0D +VOID=0D +Edk2OpensbiPlatformIrqchipExit (=0D + VOID=0D +)=0D +{=0D + DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));=0D +=0D + if (platform_ops.irqchip_exit) {=0D + return platform_ops.irqchip_exit ();=0D + }=0D +}=0D +=0D +/**=0D + Initialize IPI for current HART=0D +=0D + @param[in] ColdBoot Is cold boot path or warm boot path.=0D + @retval OpenSBI error code.=0D +=0D +**/=0D +INT32=0D +Edk2OpensbiPlatformIpiInit (=0D + IN BOOLEAN ColdBoot=0D +)=0D +{=0D + DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));=0D +=0D + if (platform_ops.ipi_init) {=0D + return platform_ops.ipi_init (ColdBoot);=0D + }=0D + return 0;=0D +}=0D +=0D +/**=0D + Exit IPI for current HART=0D +=0D +**/=0D +VOID=0D +Edk2OpensbiPlatformIpiExit (=0D + VOID=0D +)=0D +{=0D + DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));=0D +=0D + if (platform_ops.ipi_exit) {=0D + return platform_ops.ipi_exit ();=0D + }=0D +}=0D +=0D +/**=0D + Get tlb flush limit value=0D +=0D + @retval Cache flush limit value.=0D +=0D +**/=0D +UINT64=0D +Edk2OpensbiPlatformTlbrFlushLimit (=0D + VOID=0D +)=0D +{=0D + DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));=0D +=0D + if (platform_ops.get_tlbr_flush_limit) {=0D + return platform_ops.get_tlbr_flush_limit ();=0D + }=0D + return 0;=0D +}=0D +=0D +/**=0D + Initialize platform timer for current HART=0D +=0D + @param[in] ColdBoot Is cold boot path or warm boot path.=0D + @retval OpenSBI error code.=0D +=0D +**/=0D +INT32=0D +Edk2OpensbiPlatformTimerInit (=0D + IN BOOLEAN ColdBoot=0D +)=0D +{=0D + DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));=0D +=0D + if (platform_ops.timer_init) {=0D + return platform_ops.timer_init (ColdBoot);=0D + }=0D + return 0;=0D +}=0D +=0D +/**=0D + Exit platform timer for current HART=0D +=0D +**/=0D +VOID=0D +Edk2OpensbiPlatformTimerExit (=0D + VOID=0D +)=0D +{=0D + DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));=0D +=0D + if (platform_ops.timer_exit) {=0D + return platform_ops.timer_exit ();=0D + }=0D +}=0D +=0D +/**=0D + Check platform vendor SBI extension.=0D +=0D + @param[in] ExtId Extension ID.=0D + @retval OpenSBI error code.=0D +=0D + **/=0D +INT32=0D +Edk2OpensbiPlatformVendorExtCheck (=0D + IN long ExtId=0D +)=0D +{=0D + DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));=0D +=0D + if (platform_ops.vendor_ext_check) {=0D + return platform_ops.vendor_ext_check (ExtId);=0D + }=0D + return 0;=0D +}=0D +=0D +/**=0D + Platform specific SBI extension implementation provider=0D +=0D + @param[in] ExtId SBI extension ID.=0D + @param[in] FuncId Function ID.=0D + @param[in] Regs The trap register.=0D + @param[in] OutValue Value returned from SBI.=0D + @param[in] OutTrap The trap infomation after calling to SBI.=0D +=0D + @retval OpenSBI error code.=0D +=0D +**/=0D +INT32=0D +Edk2OpensbiPlatformVendorExtProvider (=0D + IN long ExtId,=0D + IN long FuncId,=0D + IN CONST struct sbi_trap_regs *Regs,=0D + IN unsigned long *OutValue,=0D + IN struct sbi_trap_info *OutTrap=0D +)=0D +{=0D + DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));=0D +=0D + if (platform_ops.vendor_ext_provider) {=0D + return platform_ops.vendor_ext_provider (=0D + ExtId,=0D + FuncId,=0D + Regs,=0D + OutValue,=0D + OutTrap=0D + );=0D + }=0D + return 0;=0D +}=0D +=0D +CONST struct sbi_platform_operations Edk2OpensbiPlatformOps =3D {=0D + .early_init =3D Edk2OpensbiPlatformEarlyInit,=0D + .final_init =3D Edk2OpensbiPlatformFinalInit,=0D + .early_exit =3D Edk2OpensbiPlatformEarlyExit,=0D + .final_exit =3D Edk2OpensbiPlatformFinalExit,=0D + .misa_check_extension =3D Edk2OpensbiPlatforMMISACheckExtension,=0D + .misa_get_xlen =3D Edk2OpensbiPlatforMMISAGetXLEN,=0D + .domains_init =3D Edk2OpensbiPlatformDomainsInit,=0D + .console_init =3D Edk2OpensbiPlatformSerialInit,=0D + .irqchip_init =3D Edk2OpensbiPlatformIrqchipInit,=0D + .irqchip_exit =3D Edk2OpensbiPlatformIrqchipExit,=0D + .ipi_init =3D Edk2OpensbiPlatformIpiInit,=0D + .ipi_exit =3D Edk2OpensbiPlatformIpiExit,=0D + .get_tlbr_flush_limit =3D Edk2OpensbiPlatformTlbrFlushLimit,=0D + .timer_init =3D Edk2OpensbiPlatformTimerInit,=0D + .timer_exit =3D Edk2OpensbiPlatformTimerExit,=0D + .vendor_ext_check =3D Edk2OpensbiPlatformVendorExtCheck,=0D + .vendor_ext_provider =3D Edk2OpensbiPlatformVendorExtProvider,=0D +};=0D diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/Edk2OpenSbiPlatform.= c b/Platform/RISC-V/PlatformPkg/Universal/Sec/Edk2OpenSbiPlatform.c deleted file mode 100644 index 779705489c..0000000000 --- a/Platform/RISC-V/PlatformPkg/Universal/Sec/Edk2OpenSbiPlatform.c +++ /dev/null @@ -1,277 +0,0 @@ -/*=0D - Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All right= s reserved.
=0D -=0D - SPDX-License-Identifier: BSD-2-Clause-Patent=0D -=0D - */=0D -=0D -#include =0D -#include =0D -=0D -#include =0D -#include =0D -#include =0D -#include =0D -#include =0D -#include =0D -#include =0D -#include =0D -#include =0D -#include =0D -#include =0D -#include =0D -#include =0D -#include =0D -#include =0D -=0D -#include "SecMain.h"=0D -=0D -extern struct sbi_platform_operations platform_ops;=0D -=0D -int Edk2OpensbiPlatformEarlyInit (=0D - BOOLEAN ColdBoot=0D - )=0D -{=0D - int ReturnCode;=0D -=0D - DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));=0D -=0D - if (platform_ops.early_init) {=0D - ReturnCode =3D platform_ops.early_init (ColdBoot);=0D - if (ReturnCode) {=0D - return ReturnCode;=0D - }=0D - }=0D - if (ColdBoot =3D=3D TRUE) {=0D - return SecPostOpenSbiPlatformEarlylInit(ColdBoot);=0D - }=0D - return 0;=0D -}=0D -=0D -int Edk2OpensbiPlatformFinalInit (=0D - BOOLEAN ColdBoot=0D - )=0D -{=0D - int ReturnCode;=0D -=0D - DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));=0D -=0D - if (platform_ops.final_init) {=0D - ReturnCode =3D platform_ops.final_init (ColdBoot);=0D - if (ReturnCode) {=0D - return ReturnCode;=0D - }=0D - }=0D - if (ColdBoot =3D=3D TRUE) {=0D - return SecPostOpenSbiPlatformFinalInit(ColdBoot);=0D - }=0D - return 0;=0D -}=0D -=0D -VOID Edk2OpensbiPlatformEarlyExit (=0D - VOID=0D - )=0D -{=0D - DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));=0D -=0D - if (platform_ops.early_exit) {=0D - return platform_ops.early_exit ();=0D - }=0D -}=0D -=0D -/** Platform final exit */=0D -VOID Edk2OpensbiPlatformFinalExit (=0D - VOID=0D - )=0D -{=0D - DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));=0D -=0D - if (platform_ops.early_exit) {=0D - return platform_ops.early_exit ();=0D - }=0D -}=0D -=0D -/**=0D - For platforms that do not implement misa, non-standard=0D - methods are needed to determine cpu extension.=0D -**/=0D -int Edk2OpensbiPlatforMMISACheckExtension (=0D - CHAR8 Extension=0D - )=0D -{=0D - if (platform_ops.misa_check_extension) {=0D - return platform_ops.misa_check_extension (Extension);=0D - }=0D - return 0;=0D -}=0D -=0D -/**=0D - For platforms that do not implement misa, non-standard=0D - methods are needed to get MXL field of misa.=0D -**/=0D -int Edk2OpensbiPlatforMMISAGetXLEN (VOID)=0D -{=0D - if (platform_ops.misa_get_xlen) {=0D - return platform_ops.misa_get_xlen ();=0D - }=0D - return 0;=0D -}=0D -=0D -/** Initialize (or populate) domains for the platform */=0D -int Edk2OpensbiPlatformDomainsInit (VOID)=0D -{=0D - DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));=0D -=0D - if (platform_ops.domains_init) {=0D - return platform_ops.domains_init ();=0D - }=0D - return 0;=0D -}=0D -=0D -/** Initialize the platform console */=0D -int Edk2OpensbiPlatformSerialInit (VOID)=0D -{=0D - DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));=0D -=0D - if (platform_ops.console_init) {=0D - return platform_ops.console_init ();=0D - }=0D - return 0;=0D -}=0D -=0D -/** Initialize the platform interrupt controller for current HART */=0D -int Edk2OpensbiPlatformIrqchipInit (=0D - BOOLEAN ColdBoot=0D - )=0D -{=0D - DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));=0D -=0D - if (platform_ops.irqchip_init) {=0D - return platform_ops.irqchip_init (ColdBoot);=0D - }=0D - return 0;=0D -}=0D -=0D -/** Exit the platform interrupt controller for current HART */=0D -VOID Edk2OpensbiPlatformIrqchipExit (VOID)=0D -{=0D - DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));=0D -=0D - if (platform_ops.irqchip_exit) {=0D - return platform_ops.irqchip_exit ();=0D - }=0D -}=0D -=0D -/** Initialize IPI for current HART */=0D -int Edk2OpensbiPlatformIpiInit (=0D - BOOLEAN ColdBoot=0D - )=0D -{=0D - DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));=0D -=0D - if (platform_ops.ipi_init) {=0D - return platform_ops.ipi_init (ColdBoot);=0D - }=0D - return 0;=0D -}=0D -=0D -/** Exit IPI for current HART */=0D -VOID Edk2OpensbiPlatformIpiExit (VOID)=0D -{=0D - DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));=0D -=0D - if (platform_ops.ipi_exit) {=0D - return platform_ops.ipi_exit ();=0D - }=0D -}=0D -=0D -/** Get tlb flush limit value **/=0D -UINT64 Edk2OpensbiPlatformTlbrFlushLimit (VOID)=0D -{=0D - DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));=0D -=0D - if (platform_ops.get_tlbr_flush_limit) {=0D - return platform_ops.get_tlbr_flush_limit ();=0D - }=0D - return 0;=0D -}=0D -=0D -/** Initialize platform timer for current HART */=0D -int Edk2OpensbiPlatformTimerInit (=0D - BOOLEAN ColdBoot=0D - )=0D -{=0D - DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));=0D -=0D - if (platform_ops.timer_init) {=0D - return platform_ops.timer_init (ColdBoot);=0D - }=0D - return 0;=0D -}=0D -=0D -/** Exit platform timer for current HART */=0D -VOID Edk2OpensbiPlatformTimerExit (VOID)=0D -{=0D - DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));=0D -=0D - if (platform_ops.timer_exit) {=0D - return platform_ops.timer_exit ();=0D - }=0D -}=0D -=0D -/** platform specific SBI extension implementation probe function */=0D -int Edk2OpensbiPlatformVendorExtCheck (=0D - long ExtId=0D - )=0D -{=0D - DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));=0D -=0D - if (platform_ops.vendor_ext_check) {=0D - return platform_ops.vendor_ext_check (ExtId);=0D - }=0D - return 0;=0D -}=0D -=0D -=0D -/** platform specific SBI extension implementation provider */=0D -int Edk2OpensbiPlatformVendorExtProvider (=0D - long ExtId,=0D - long FuncId,=0D - const struct sbi_trap_regs *Regs,=0D - unsigned long *OutValue,=0D - struct sbi_trap_info *OutTrap=0D - )=0D -{=0D - DEBUG((DEBUG_INFO, "%a: Entry\n", __FUNCTION__));=0D -=0D - if (platform_ops.vendor_ext_provider) {=0D - return platform_ops.vendor_ext_provider (=0D - ExtId,=0D - FuncId,=0D - Regs,=0D - OutValue,=0D - OutTrap=0D - );=0D - }=0D - return 0;=0D -}=0D -=0D -const struct sbi_platform_operations Edk2OpensbiPlatformOps =3D {=0D - .early_init =3D Edk2OpensbiPlatformEarlyInit,=0D - .final_init =3D Edk2OpensbiPlatformFinalInit,=0D - .early_exit =3D Edk2OpensbiPlatformEarlyExit,=0D - .final_exit =3D Edk2OpensbiPlatformFinalExit,=0D - .misa_check_extension =3D Edk2OpensbiPlatforMMISACheckExtension,=0D - .misa_get_xlen =3D Edk2OpensbiPlatforMMISAGetXLEN,=0D - .domains_init =3D Edk2OpensbiPlatformDomainsInit,=0D - .console_init =3D Edk2OpensbiPlatformSerialInit,=0D - .irqchip_init =3D Edk2OpensbiPlatformIrqchipInit,=0D - .irqchip_exit =3D Edk2OpensbiPlatformIrqchipExit,=0D - .ipi_init =3D Edk2OpensbiPlatformIpiInit,=0D - .ipi_exit =3D Edk2OpensbiPlatformIpiExit,=0D - .get_tlbr_flush_limit =3D Edk2OpensbiPlatformTlbrFlushLimit,=0D - .timer_init =3D Edk2OpensbiPlatformTimerInit,=0D - .timer_exit =3D Edk2OpensbiPlatformTimerExit,=0D - .vendor_ext_check =3D Edk2OpensbiPlatformVendorExtCheck,=0D - .vendor_ext_provider =3D Edk2OpensbiPlatformVendorExtProvider,=0D -};=0D diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c b/Platform= /RISC-V/PlatformPkg/Universal/Sec/SecMain.c index 3bc3690047..f2b2c7b583 100644 --- a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c +++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c @@ -25,49 +25,12 @@ #include // Reference to header file in opensbi=0D #include // Reference to header file in opensbi=0D =0D -extern struct sbi_platform_operations Edk2OpensbiPlatformOps;=0D -=0D //=0D // Indicates the boot hart (PcdBootHartId) OpenSBI initialization is done.= =0D //=0D atomic_t BootHartDone =3D ATOMIC_INITIALIZER(0);=0D atomic_t NonBootHartMessageLock =3D ATOMIC_INITIALIZER(0);=0D =0D -int sbi_domain_root_add_memregion(const struct sbi_domain_memregion *reg);= =0D -=0D -typedef struct sbi_scratch *(*hartid2scratch)(ulong hartid, ulong hartinde= x);=0D -=0D -struct sbi_domain_memregion fw_memregs;=0D -=0D -int SecSetEdk2FwMemoryRegions (VOID) {=0D - int Ret;=0D -=0D - Ret =3D 0;=0D -=0D - //=0D - // EDK2 PEI domain memory region=0D - //=0D - fw_memregs.order =3D log2roundup(FixedPcdGet32(PcdFirmwareDomainSize));= =0D - fw_memregs.base =3D FixedPcdGet32(PcdFirmwareDomainBaseAddress);=0D - fw_memregs.flags =3D SBI_DOMAIN_MEMREGION_EXECUTABLE | SBI_DOMAIN_MEMREG= ION_READABLE;=0D - Ret =3D sbi_domain_root_add_memregion ((const struct sbi_domain_memregio= n *)&fw_memregs);=0D - if (Ret !=3D 0) {=0D - DEBUG ((DEBUG_ERROR, "%a: Add firmware regiosn of FW Domain fail\n", _= _FUNCTION__));=0D - }=0D -=0D - //=0D - // EDK2 EFI Variable domain memory region=0D - //=0D - fw_memregs.order =3D log2roundup(FixedPcdGet32(PcdVariableFirmwareRegion= Size));=0D - fw_memregs.base =3D FixedPcdGet32(PcdVariableFirmwareRegionBaseAddress);= =0D - fw_memregs.flags =3D SBI_DOMAIN_MEMREGION_READABLE | SBI_DOMAIN_MEMREGIO= N_WRITEABLE;=0D - Ret =3D sbi_domain_root_add_memregion ((const struct sbi_domain_memregio= n *)&fw_memregs);=0D - if (Ret !=3D 0) {=0D - DEBUG ((DEBUG_ERROR, "%a: Add firmware regiosn of variable FW Domain f= ail\n", __FUNCTION__));=0D - }=0D - return Ret;=0D -}=0D -=0D /**=0D Locates a section within a series of sections=0D with the specified section type.=0D @@ -424,109 +387,6 @@ RegisterFirmwareSbiExtension ( return EFI_SUCCESS;=0D }=0D =0D -/**=0D - OpenSBI platform early init hook.=0D -=0D -**/=0D -int=0D -SecPostOpenSbiPlatformEarlylInit(=0D - IN BOOLEAN ColdBoot=0D - )=0D -{=0D - UINT32 HartId;=0D -=0D - if (!ColdBoot) {=0D - HartId =3D current_hartid();=0D - DEBUG ((DEBUG_INFO, "%a: Non boot hart %d.\n", __FUNCTION__, HartId));= =0D - return 0;=0D - }=0D - //=0D - // Setup firmware memory region.=0D - //=0D - if (SecSetEdk2FwMemoryRegions () !=3D 0) {=0D - ASSERT (FALSE);=0D - }=0D -=0D - //=0D - // Boot HART is already in the process of OpenSBI initialization.=0D - // We can let other HART to keep booting.=0D - //=0D - DEBUG ((DEBUG_INFO, "%a: Set boot hart done.\n", __FUNCTION__));=0D - atomic_write (&BootHartDone, (UINT64)TRUE);=0D - return 0;=0D -}=0D -=0D -/**=0D - OpenSBI platform final init hook.=0D - We restore the next_arg1 to the pointer of EFI_RISCV_OPENSBI_FIRMWARE_CO= NTEXT.=0D -=0D -**/=0D -int=0D -SecPostOpenSbiPlatformFinalInit (=0D - IN BOOLEAN ColdBoot=0D - )=0D -{=0D - UINT32 HartId;=0D - struct sbi_scratch *SbiScratch;=0D - struct sbi_scratch *ScratchSpace;=0D - struct sbi_platform *SbiPlatform;=0D - EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT *FirmwareContext;=0D -=0D - if (!ColdBoot) {=0D - HartId =3D current_hartid();=0D - DEBUG ((DEBUG_INFO, "%a: Non boot hart %d.\n", __FUNCTION__, HartId));= =0D - return 0;=0D - }=0D -=0D - DEBUG((DEBUG_INFO, "%a: Entry, preparing to jump to PEI Core\n\n", __FUN= CTION__));=0D -=0D - SbiScratch =3D sbi_scratch_thishart_ptr();=0D - SbiPlatform =3D (struct sbi_platform *)sbi_platform_ptr(SbiScratch);=0D - FirmwareContext =3D (EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT *)SbiPlatform->f= irmware_context;=0D -=0D - //=0D - // Print out scratch address of each hart=0D - //=0D - DEBUG ((DEBUG_INFO, "%a: OpenSBI scratch address for each hart:\n", __FU= NCTION__));=0D - for (HartId =3D 0; HartId < SBI_HARTMASK_MAX_BITS; HartId ++) {=0D - if (sbi_platform_hart_invalid(SbiPlatform, HartId)) {=0D - continue;=0D - }=0D - ScratchSpace =3D sbi_hartid_to_scratch (HartId);=0D - if(ScratchSpace !=3D NULL) {=0D - DEBUG((DEBUG_INFO, " Hart %d: 0x%x\n", HartId, ScratchSpace= ));=0D - } else {=0D - DEBUG((DEBUG_INFO, " Hart %d not initialized yet\n", HartId= ));=0D - }=0D - }=0D -=0D - //=0D - // Set firmware context Hart-specific pointer=0D - //=0D - for (HartId =3D 0; HartId < SBI_HARTMASK_MAX_BITS; HartId ++) {=0D - if (sbi_platform_hart_invalid(SbiPlatform, HartId)) {=0D - continue;=0D - }=0D - ScratchSpace =3D sbi_hartid_to_scratch (HartId);=0D - if (ScratchSpace !=3D NULL) {=0D - FirmwareContext->HartSpecific[HartId] =3D=0D - (EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC *)((UINT8 *)ScratchSpace= - FIRMWARE_CONTEXT_HART_SPECIFIC_SIZE);=0D - DEBUG ((DEBUG_INFO, "%a: OpenSBI Hart %d Firmware Context Hart-spe= cific at address: 0x%x\n",=0D - __FUNCTION__,=0D - HartId,=0D - FirmwareContext->HartSpecific [HartId]=0D - ));=0D - }=0D - }=0D -=0D - DEBUG((DEBUG_INFO, "%a: Will jump to PEI Core in OpenSBI with \n", __FUN= CTION__));=0D - DEBUG((DEBUG_INFO, " sbi_scratch =3D %x\n", SbiScratch));=0D - DEBUG((DEBUG_INFO, " sbi_platform =3D %x\n", SbiPlatform));=0D - DEBUG((DEBUG_INFO, " FirmwareContext =3D %x\n", FirmwareContext));=0D - SbiScratch->next_arg1 =3D (unsigned long)FirmwareContext;=0D -=0D - return 0;=0D -}=0D =0D /** Transion from SEC phase to PEI phase.=0D =0D @@ -787,7 +647,6 @@ VOID EFIAPI SecCoreStartUpWithStack( //=0D ThisSbiPlatform =3D (struct sbi_platform *)sbi_platform_ptr(Scratch);=0D ThisSbiPlatform->platform_ops_addr =3D (unsigned long)&Edk2OpensbiPlatfo= rmOps;=0D -=0D if (HartId =3D=3D FixedPcdGet32(PcdBootHartId)) {=0D =0D Scratch->next_arg1 =3D (unsigned long)GetDeviceTreeAddress ();=0D --=20 2.31.1