From: "Abner Chang" <abner.chang@hpe.com>
To: devel@edk2.groups.io
Cc: abner.chang@hpe.com
Subject: [PATCH 58/79] RISC-V/PlatformPkg: Determine hart number from DTB
Date: Sat, 8 Jan 2022 15:24:41 +0800 [thread overview]
Message-ID: <20220108072444.17879-17-abner.chang@hpe.com> (raw)
In-Reply-To: <20220108072444.17879-1-abner.chang@hpe.com>
(This is migrated from edk2-platforms:Platform)
Determine total number of hart from DTB instead of
using PCD.
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Daniel Schaefer <daniel.schaefer@hpe.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
---
.../OpensbiPlatformLib/OpensbiPlatformLib.inf | 3 -
.../PlatformPkg/Universal/Sec/SecMain.inf | 1 -
.../PlatformPkg/Universal/Sec/SecMain.c | 12 ++--
.../Universal/Sec/Riscv64/SecEntry.S | 60 +++++++++++++------
4 files changed, 49 insertions(+), 27 deletions(-)
diff --git a/Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf b/Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf
index 2e1227733a..6661ee8204 100644
--- a/Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf
+++ b/Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf
@@ -46,9 +46,6 @@
RiscVSpecialPlatformLib
[FixedPcd]
- gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootHartId
- gUefiRiscVPlatformPkgTokenSpaceGuid.PcdHartCount
- gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootableHartNumber
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdOpenSbiStackSize
diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf
index ceb6d25222..b949b6c470 100644
--- a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf
+++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf
@@ -61,7 +61,6 @@
[Pcd]
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootHartId
- gUefiRiscVPlatformPkgTokenSpaceGuid.PcdHartCount
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRootFirmwareDomainBaseAddress
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRootFirmwareDomainSize
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootableHartNumber
diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c
index f2b2c7b583..17f33a02cc 100644
--- a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c
+++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c
@@ -530,7 +530,7 @@ GetDeviceTreeAddress (
EFI_COMMON_SECTION_HEADER *FoundSection;
if (FixedPcdGet32 (PcdDeviceTreeAddress)) {
- DEBUG ((DEBUG_INFO, "Use fixed address of DBT from PcdDeviceTreeAddress 0x%x.\n", FixedPcdGet32 (PcdDeviceTreeAddress)));
+ DEBUG ((DEBUG_INFO, "Use fixed address of DBT from PcdDeviceTreeAddress 0x%x 0x%x.\n", FixedPcdGet32 (PcdDeviceTreeAddress), *((unsigned long *)FixedPcdGet32 (PcdDeviceTreeAddress))));
//
// Device tree address is pointed by PcdDeviceTreeAddress.
//
@@ -647,11 +647,10 @@ VOID EFIAPI SecCoreStartUpWithStack(
//
ThisSbiPlatform = (struct sbi_platform *)sbi_platform_ptr(Scratch);
ThisSbiPlatform->platform_ops_addr = (unsigned long)&Edk2OpensbiPlatformOps;
+ Scratch->next_arg1 = (unsigned long)GetDeviceTreeAddress ();
if (HartId == FixedPcdGet32(PcdBootHartId)) {
-
- Scratch->next_arg1 = (unsigned long)GetDeviceTreeAddress ();
if (Scratch->next_arg1 == (unsigned long)NULL) {
- DEBUG ((DEBUG_ERROR, "Platform Device Tree is not found\n"));
+ DEBUG ((DEBUG_ERROR, "Platform Device Tree is not found on boot hart\n"));
ASSERT (FALSE);
}
DEBUG ((DEBUG_INFO, "Device Tree at 0x%x\n", Scratch->next_arg1));
@@ -685,6 +684,11 @@ VOID EFIAPI SecCoreStartUpWithStack(
NonBootHartMessageLockValue = atomic_xchg(&NonBootHartMessageLock, TRUE);
};
DEBUG((DEBUG_INFO, "%a: Non boot hart %d initialization.\n", __FUNCTION__, HartId));
+ if (Scratch->next_arg1 == (unsigned long)NULL) {
+ DEBUG ((DEBUG_ERROR, "Platform Device Tree is not found\n"));
+ ASSERT (FALSE);
+ }
+ DEBUG((DEBUG_INFO, "%a: Non boot hart %d DTB is at 0x%x.\n", __FUNCTION__, HartId, Scratch->next_arg1));
NonBootHartMessageLockValue = atomic_xchg(&NonBootHartMessageLock, FALSE);
//
// Non boot hart wiil be halted waiting for SBI_HART_STARTING.
diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S b/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S
index 96087738a3..0fc7817665 100644
--- a/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S
+++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S
@@ -37,14 +37,39 @@ ASM_FUNC (_ModuleEntryPoint)
li a5, FixedPcdGet32 (PcdBootHartId)
bne a6, a5, _wait_for_boot_hart
- li ra, 0
- call _reset_regs
+ /*
+ * Initial the hart count reported in DTB
+ */
+ li a4, FixedPcdGet32 (PcdTemporaryRamBase)
+ li a5, FixedPcdGet32 (PcdTemporaryRamSize)
+ /* Use Temp memory as the stack for calling to C code */
+ add sp, a4, a5
+ /* Get the address of device tree and call generic fw_platform_init */
+ call GetDeviceTreeAddress /* a0 return the device tree address */
+ beqz a0, skip_fw_init
+ add a1, a0, 0 /* a1 is device tree */
+ csrr a0, CSR_MHARTID /* a0 is boot hart ID */
+ call fw_platform_init
+skip_fw_init:
/* Preload HART details
- * s7 -> HART Count
+ * s7 -> Total HART count from PCD or DTB
* s8 -> HART Stack Size
*/
- li s7, FixedPcdGet32 (PcdHartCount)
+ la a0, platform
+#if __riscv_xlen == 64
+ lwu s7, SBI_PLATFORM_HART_COUNT_OFFSET(a0)
+#else
+ lw s7, SBI_PLATFORM_HART_COUNT_OFFSET(a0)
+#endif
+ /*
+ * This is the number of HARTs described in
+ * DTB for this processor. We allocate the
+ * scratch buffer according to this number.
+ */
+ la a4, _pysical_hart_count
+ sd s7, (a4)
+
li s8, FixedPcdGet32 (PcdOpenSbiStackSize)
/*
@@ -113,20 +138,9 @@ _scratch_init:
li a4, FixedPcdGet32 (PcdTemporaryRamBase)
li a5, FixedPcdGet32 (PcdTemporaryRamSize)
-
/* Use Temp memory as the stack for calling to C code */
add sp, a4, a5
- /* Get the address of device tree and call generic fw_platform_init */
- call GetDeviceTreeAddress /* a0 return the device tree address */
- beqz a0, skip_fw_init
- add a1, a0, 0 /* a1 is device tree */
- csrr a0, CSR_MHARTID /* a0 is hart ID */
- call fw_platform_init
-skip_fw_init:
-
/* Zero out temporary memory */
- li a4, FixedPcdGet32 (PcdTemporaryRamBase)
- li a5, FixedPcdGet32 (PcdTemporaryRamSize)
add a5, a4, a5
1:
li a3, 0x0
@@ -167,7 +181,11 @@ _start_warm:
li s7, FixedPcdGet32 (PcdBootableHartNumber)
bnez s7, 1f
la a4, platform
- REG_L s7, SBI_PLATFORM_HART_COUNT_OFFSET(a4)
+#if __riscv_xlen == 64
+ lwu s7, SBI_PLATFORM_HART_COUNT_OFFSET(a4)
+#else
+ lw s7, SBI_PLATFORM_HART_COUNT_OFFSET(a4)
+#endif
1:
li s8, FixedPcdGet32 (PcdOpenSbiStackSize)
la a4, platform
@@ -209,7 +227,8 @@ _start_warm:
csrr a0, CSR_MHARTID
j _uninitialized_hart_wait
4:
- li s7, FixedPcdGet32 (PcdHartCount)
+ la a5, _pysical_hart_count
+ ld s7, (a5)
/* Find the scratch space for this hart
*
* Scratch buffer is on the top of stack buffer
@@ -275,6 +294,8 @@ _start_warm:
.section .data, "aw"
_boot_hart_done:
RISCV_PTR 0
+_pysical_hart_count:
+ RISCV_PTR 0
.align 3
.section .entry, "ax", %progbits
@@ -293,7 +314,7 @@ _hartid_to_scratch:
/*
* s0 -> HART Stack Size
* s1 -> HART Stack End
- * s2 -> Temporary
+ * s2 -> Total hart count
*/
la s2, platform
#if __riscv_xlen == 64
@@ -301,8 +322,9 @@ _hartid_to_scratch:
#else
lw s0, SBI_PLATFORM_HART_STACK_SIZE_OFFSET(s2)
#endif
- li s2, FixedPcdGet32 (PcdHartCount)
+ la s1, _pysical_hart_count /* total HART count */
+ ld s2, (s1)
mul s2, s2, s0
li s1, FixedPcdGet32 (PcdScratchRamBase)
add s1, s1, s2
--
2.31.1
next prev parent reply other threads:[~2022-01-08 8:26 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-08 7:24 [PATCH 42/79] RISC-V: Use RISC-V PeiCoreEntryPoint library Abner Chang
2022-01-08 7:24 ` [PATCH 43/79] Platform/RISC-V: Add library to get PPI descriptor Abner Chang
2022-01-08 7:24 ` [PATCH 44/79] Platform/RISC-V: Use PlatformSecPpiLib Abner Chang
2022-01-08 7:24 ` [PATCH 45/79] Platform/RISC-V: Add NULL library instance of RiscVSpecialPlatformLib Abner Chang
2022-01-08 7:24 ` [PATCH 46/79] Platform/RISC-V: Remove platform dependency from common platform lib Abner Chang
2022-01-08 7:24 ` [PATCH 47/79] Platform/RISC-V: Remove Null instance of OpensbiPlatformLibNull Abner Chang
2022-01-08 7:24 ` [PATCH 48/79] RiscVPlatformPkg/Sec: Initial hart_index2Id array Abner Chang
2022-01-08 7:24 ` [PATCH 49/79] RiscVPlatformPkg/OpensbiPlatformLib: Remove platform code Abner Chang
2022-01-08 7:24 ` [PATCH 50/79] RiscVPlatformPkg/RiscVSpecialPlatformLib: Rename module name Abner Chang
2022-01-08 7:24 ` [PATCH 51/79] RiscVPkg: Update opensbi library Abner Chang
2022-01-08 7:24 ` [PATCH 52/79] RiscVPlatformPkg/Sec: Check Cold/Warm hart Abner Chang
2022-01-08 7:24 ` [PATCH 53/79] RiscVPlatformPkg/Sec: Add more comments to Secmain.c Abner Chang
2022-01-08 7:24 ` [PATCH 54/79] RiscV/ProcessorPkg: Create read mtime CSR library instances Abner Chang
2022-01-08 7:24 ` [PATCH 55/79] RiscV/ProcessorPkg: Use mtime CSR library Abner Chang
2022-01-08 7:24 ` [PATCH 56/79] RISC-V/PlatformPkg: Updates for the latest OpenSBI Abner Chang
2022-01-08 7:24 ` [PATCH 57/79] PlatformPkg/Sec: Separate EDK2 Opensbi platform hook Abner Chang
2022-01-08 7:24 ` Abner Chang [this message]
2022-01-08 7:24 ` [PATCH 59/79] Silicon/RISC-V: Add PciCpuIoDxe driver Abner Chang
2022-01-08 7:24 ` [PATCH 60/79] Platform/RISC-V: Add debug message to SecMain.c Abner Chang
2022-01-08 7:24 ` [PATCH 61/79] Platform/RISC-V: Initialize variable to zero Abner Chang
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