From: "Abner Chang" <abner.chang@hpe.com>
To: devel@edk2.groups.io
Cc: abner.chang@hpe.com
Subject: [PATCH 43/79] Platform/RISC-V: Add library to get PPI descriptor
Date: Sat, 8 Jan 2022 15:24:26 +0800 [thread overview]
Message-ID: <20220108072444.17879-2-abner.chang@hpe.com> (raw)
In-Reply-To: <20220108072444.17879-1-abner.chang@hpe.com>
(This is migrated from edk2-platforms:Platform)
The library to provide the platform PPI descriptors in
PEI core entry before executing PEI core.
Cc: Sunil V L <sunilvl@ventanamicro.com>
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Reviewed-by: Daniel Schaefer <daniel.schaefer@hpe.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
---
.../RISC-V/PlatformPkg/RiscVPlatformPkg.dsc | 2 ++
.../PlatformSecPpiLibNull.inf | 36 +++++++++++++++++++
.../Include/Library/PlatformSecPpiLib.h | 24 +++++++++++++
.../PlatformSecPpiLibNull/PlatformSecPpiLib.c | 28 +++++++++++++++
4 files changed, 90 insertions(+)
create mode 100644 Platform/RISC-V/PlatformPkg/Library/PlatformSecPpiLibNull/PlatformSecPpiLibNull.inf
create mode 100644 Platform/RISC-V/PlatformPkg/Include/Library/PlatformSecPpiLib.h
create mode 100644 Platform/RISC-V/PlatformPkg/Library/PlatformSecPpiLibNull/PlatformSecPpiLib.c
diff --git a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dsc b/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dsc
index 8eec09549f..b96324e961 100644
--- a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dsc
+++ b/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dsc
@@ -61,6 +61,7 @@
[LibraryClasses.common.PEI_CORE]
# RISC-V platform PEI core entry point.
PeiCoreEntryPoint|Platform/RISC-V/PlatformPkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf
+ PlatformSecPpiLib|Platform/RISC-V/PlatformPkg/Library/PlatformSecPpiLibNull/PlatformSecPpiLibNull.inf
[LibraryClasses.common.PEIM]
FirmwareContextProcessorSpecificLib|Platform/RISC-V/PlatformPkg/Library/FirmwareContextProcessorSpecificLib/FirmwareContextProcessorSpecificLib.inf
@@ -82,6 +83,7 @@
Platform/RISC-V/PlatformPkg/Library/FirmwareContextProcessorSpecificLib/FirmwareContextProcessorSpecificLib.inf
Platform/RISC-V/PlatformPkg/Library/RiscVPlatformTempMemoryInitLibNull/RiscVPlatformTempMemoryInitLibNull.inf
Platform/RISC-V/PlatformPkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf
+ Platform/RISC-V/PlatformPkg/Library/PlatformSecPpiLibNull/PlatformSecPpiLibNull.inf
[Components.common.SEC]
Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf
diff --git a/Platform/RISC-V/PlatformPkg/Library/PlatformSecPpiLibNull/PlatformSecPpiLibNull.inf b/Platform/RISC-V/PlatformPkg/Library/PlatformSecPpiLibNull/PlatformSecPpiLibNull.inf
new file mode 100644
index 0000000000..22f5751655
--- /dev/null
+++ b/Platform/RISC-V/PlatformPkg/Library/PlatformSecPpiLibNull/PlatformSecPpiLibNull.inf
@@ -0,0 +1,36 @@
+## @file
+# Library instance to to provide PPI before PEI Core
+#
+# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001b
+ BASE_NAME = PlatformSecPpiLib
+ FILE_GUID = A2CDDADC-CB65-4EED-9CAE-192B0BDD6C84
+ MODULE_TYPE = PEIM
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = PlatformSecPpiLib|PEI_CORE
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = RISCV64
+#
+
+[Sources]
+ PlatformSecPpiLib.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec
+ #Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec
+
+[LibraryClasses]
+ #BaseLib
+ #PrintLib
+
diff --git a/Platform/RISC-V/PlatformPkg/Include/Library/PlatformSecPpiLib.h b/Platform/RISC-V/PlatformPkg/Include/Library/PlatformSecPpiLib.h
new file mode 100644
index 0000000000..88468e660b
--- /dev/null
+++ b/Platform/RISC-V/PlatformPkg/Include/Library/PlatformSecPpiLib.h
@@ -0,0 +1,24 @@
+/** @file
+ RISC-V platform SEC PPI before PEI Core.
+
+ Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef RISCV_PLATFORM_SEC_PPI_H_
+#define RISCV_PLATFORM_SEC_PPI_H_
+
+#include <PiPei.h>
+
+/** Return platform SEC PPI before PEI Core
+
+ @param[in,out] ThisPpiList Pointer to retrieve EFI_PEI_PPI_DESCRIPTOR.
+
+**/
+EFI_STATUS
+GetPlatformPrePeiCorePpiDescriptor (
+ IN OUT EFI_PEI_PPI_DESCRIPTOR **ThisPpiList
+);
+
+#endif
diff --git a/Platform/RISC-V/PlatformPkg/Library/PlatformSecPpiLibNull/PlatformSecPpiLib.c b/Platform/RISC-V/PlatformPkg/Library/PlatformSecPpiLibNull/PlatformSecPpiLib.c
new file mode 100644
index 0000000000..d5c089b02d
--- /dev/null
+++ b/Platform/RISC-V/PlatformPkg/Library/PlatformSecPpiLibNull/PlatformSecPpiLib.c
@@ -0,0 +1,28 @@
+/**@file
+ NULL library instance of PlatformSecPpiLib
+
+ Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+//
+// The package level header files this module uses
+//
+#include <PiPei.h>
+
+/** Return platform SEC PPI before PEI Core
+
+ @param[in,out] ThisPpiList Pointer to retrieve EFI_PEI_PPI_DESCRIPTOR.
+
+**/
+EFI_STATUS
+GetPlatformPrePeiCorePpiDescriptor (
+ IN OUT EFI_PEI_PPI_DESCRIPTOR **ThisPpiList
+)
+{
+ *ThisPpiList = NULL;
+ return EFI_NOT_FOUND;
+}
+
--
2.31.1
next prev parent reply other threads:[~2022-01-08 8:25 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-08 7:24 [PATCH 42/79] RISC-V: Use RISC-V PeiCoreEntryPoint library Abner Chang
2022-01-08 7:24 ` Abner Chang [this message]
2022-01-08 7:24 ` [PATCH 44/79] Platform/RISC-V: Use PlatformSecPpiLib Abner Chang
2022-01-08 7:24 ` [PATCH 45/79] Platform/RISC-V: Add NULL library instance of RiscVSpecialPlatformLib Abner Chang
2022-01-08 7:24 ` [PATCH 46/79] Platform/RISC-V: Remove platform dependency from common platform lib Abner Chang
2022-01-08 7:24 ` [PATCH 47/79] Platform/RISC-V: Remove Null instance of OpensbiPlatformLibNull Abner Chang
2022-01-08 7:24 ` [PATCH 48/79] RiscVPlatformPkg/Sec: Initial hart_index2Id array Abner Chang
2022-01-08 7:24 ` [PATCH 49/79] RiscVPlatformPkg/OpensbiPlatformLib: Remove platform code Abner Chang
2022-01-08 7:24 ` [PATCH 50/79] RiscVPlatformPkg/RiscVSpecialPlatformLib: Rename module name Abner Chang
2022-01-08 7:24 ` [PATCH 51/79] RiscVPkg: Update opensbi library Abner Chang
2022-01-08 7:24 ` [PATCH 52/79] RiscVPlatformPkg/Sec: Check Cold/Warm hart Abner Chang
2022-01-08 7:24 ` [PATCH 53/79] RiscVPlatformPkg/Sec: Add more comments to Secmain.c Abner Chang
2022-01-08 7:24 ` [PATCH 54/79] RiscV/ProcessorPkg: Create read mtime CSR library instances Abner Chang
2022-01-08 7:24 ` [PATCH 55/79] RiscV/ProcessorPkg: Use mtime CSR library Abner Chang
2022-01-08 7:24 ` [PATCH 56/79] RISC-V/PlatformPkg: Updates for the latest OpenSBI Abner Chang
2022-01-08 7:24 ` [PATCH 57/79] PlatformPkg/Sec: Separate EDK2 Opensbi platform hook Abner Chang
2022-01-08 7:24 ` [PATCH 58/79] RISC-V/PlatformPkg: Determine hart number from DTB Abner Chang
2022-01-08 7:24 ` [PATCH 59/79] Silicon/RISC-V: Add PciCpuIoDxe driver Abner Chang
2022-01-08 7:24 ` [PATCH 60/79] Platform/RISC-V: Add debug message to SecMain.c Abner Chang
2022-01-08 7:24 ` [PATCH 61/79] Platform/RISC-V: Initialize variable to zero Abner Chang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-list from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220108072444.17879-2-abner.chang@hpe.com \
--to=devel@edk2.groups.io \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox