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From: "Abner Chang" <abner.chang@hpe.com>
To: devel@edk2.groups.io
Cc: abner.chang@hpe.com
Subject: [PATCH 48/79] RiscVPlatformPkg/Sec: Initial hart_index2Id array
Date: Sat,  8 Jan 2022 15:24:31 +0800	[thread overview]
Message-ID: <20220108072444.17879-7-abner.chang@hpe.com> (raw)
In-Reply-To: <20220108072444.17879-1-abner.chang@hpe.com>

(This is migrated from edk2-platforms:Platform)
Initial hart index to Id array by invoking OpenSBI
fw_platform_init function.

Introduce PcdBootableHartIndexToId PCD which could be
used to overwrite the hart_index2Id arrary built
from Devie tree according to platform demand.

Cc: Sunil V L <sunilvl@ventanamicro.com>
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Reviewed-by: Daniel Schaefer <daniel.schaefer@hpe.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
---
 .../RISC-V/PlatformPkg/RiscVPlatformPkg.dec   | 13 +++-
 .../RISC-V/PlatformPkg/RiscVPlatformPkg.dsc   |  3 +-
 .../PlatformPkg/Universal/Sec/SecMain.inf     |  2 +
 .../PlatformPkg/Universal/Sec/SecMain.c       | 62 ++++++++++++++++---
 .../Universal/Sec/Riscv64/SecEntry.S          | 29 ++++++++-
 5 files changed, 96 insertions(+), 13 deletions(-)

diff --git a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec b/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec
index 7e41e7bdb2..947ae40e20 100644
--- a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec
+++ b/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec
@@ -55,10 +55,21 @@
   gUefiRiscVPlatformPkgTokenSpaceGuid.PcdHartCount|0|UINT32|0x00001083
   gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootHartId|0|UINT32|0x00001084
 #
-# The bootable hart core number, which is incorporate with OpenSBI platform hart_index2id value.
+# The bootable hart core number, which incorporates with OpenSBI platform hart_index2id value.
+# PcdBootableHartNumber = 0 means the number of bootable hart comes from Device Tree.
+# Otherwise the number assigned in PcdBootableHartNumber overwrite it.
 #
   gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootableHartNumber|0|UINT32|0x00001085
 #
+# PcdBootableHartIndexToId is valid if PcdBootableHartNumber != 0.
+# If PcdBootableHartNumber != 0, then PcdBootableHartIndexToId is an array of
+# bootable hart ID.
+# For example,
+# if PcdBootableHartNumber == 3 then PcdBootableHartIndexToId could be defined
+# as {0x1, 0x2, 0x3}.
+#
+  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootableHartIndexToId|NULL|VOID*|0x00001086
+#
 # Definitions for OpenSbi
 #
   gUefiRiscVPlatformPkgTokenSpaceGuid.PcdScratchRamBase|0|UINT32|0x00001100
diff --git a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dsc b/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dsc
index 93b3cd8de9..97d5dd08a0 100644
--- a/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dsc
+++ b/Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dsc
@@ -39,7 +39,8 @@
 !include MdePkg/MdeLibs.dsc.inc
 
 [LibraryClasses.common]
-  RiscVOpensbiPlatformLib|Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLibNull/OpensbiPlatformLibNull.inf
+  FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf
+  RiscVOpensbiPlatformLib|Platform/RISC-V/PlatformPkg/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf
   RiscVCpuLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/RiscVCpuLib.inf
   RiscVEdk2SbiLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.inf
   RiscVOpensbiLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/RiscVOpensbiLib.inf
diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf
index 9736277fa1..1cfbef961f 100644
--- a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf
+++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf
@@ -41,6 +41,7 @@
   DebugAgentLib
   DebugLib
   ExtractGuidedSectionLib
+  FdtLib
   IoLib
   PcdLib
   PeCoffLib
@@ -62,6 +63,7 @@
   gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootHartId
   gUefiRiscVPlatformPkgTokenSpaceGuid.PcdHartCount
   gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootableHartNumber
+  gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootableHartIndexToId
   gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRootFirmwareDomainBaseAddress
   gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRootFirmwareDomainSize
   gUefiRiscVPlatformPkgTokenSpaceGuid.PcdOpenSbiStackSize
diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c
index fb0adbca54..51d9edfe75 100644
--- a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c
+++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.c
@@ -615,16 +615,17 @@ GetDeviceTreeAddress (
   EFI_COMMON_SECTION_HEADER *FoundSection;
 
   if (FixedPcdGet32 (PcdDeviceTreeAddress)) {
+      DEBUG ((DEBUG_INFO, "Use fixed address of DBT from PcdDeviceTreeAddress.\n"));
       return (VOID *)*((unsigned long *)FixedPcdGet32 (PcdDeviceTreeAddress));
   } else if (FixedPcdGet32 (PcdRiscVDtbFvBase)) {
+      DEBUG ((DEBUG_INFO, "Use DBT FV\n"));
       Status = FindFfsFileAndSection (
                  (EFI_FIRMWARE_VOLUME_HEADER *)FixedPcdGet32 (PcdRiscVDtbFvBase),
                  EFI_FV_FILETYPE_FREEFORM,
                  EFI_SECTION_RAW,
                  &FoundSection
-               );
+                 );
       if (EFI_ERROR(Status)) {
-        DEBUG ((DEBUG_ERROR, "Platform Device Tree is not found from FV.\n"));
         return NULL;
       }
       FoundSection ++;
@@ -635,6 +636,35 @@ GetDeviceTreeAddress (
   }
   return NULL;
 }
+/**
+  Overwrite hart_index2id array if platform would like to use the
+  bootable harts other than those declared in Device Tree
+
+  @param[in]  SbiPlatform   Pointer to SBI platform
+  @retval  hart_index2id Index to ID value may be overwrote.
+  @retval  hart_count Index to ID value may be overwrote.
+
+**/
+VOID
+Edk2PlatformHartIndex2Id (
+  IN struct sbi_platform *SbiPlatform
+  )
+{
+  UINT32 Index;
+  UINT32 *HartIndexToId;
+  UINT32 BootableHartCount;
+  UINT8 *PlatformHartIndex2IdArray;
+
+  BootableHartCount = FixedPcdGet32(PcdBootableHartNumber);
+  if (BootableHartCount != 0) {
+    HartIndexToId = (UINT32 *)SbiPlatform->hart_index2id;
+    PlatformHartIndex2IdArray = (UINT8 *)FixedPcdGetPtr (PcdBootableHartIndexToId);
+    for (Index = 0; Index < BootableHartCount; Index++) {
+      *(HartIndexToId + Index) = (UINT32)(*(PlatformHartIndex2IdArray + Index));
+    }
+    SbiPlatform->hart_count = BootableHartCount;
+  }
+}
 
 /**
   This function initilizes hart specific information and SBI.
@@ -671,17 +701,13 @@ VOID EFIAPI SecCoreStartUpWithStack(
   IN  struct sbi_scratch *Scratch
   )
 {
+  UINT32 HardIndex;
   UINT64 BootHartDoneSbiInit;
   UINT64 NonBootHartMessageLockValue;
   struct sbi_platform *ThisSbiPlatform;
   EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC *HartFirmwareContext;
 
-  Scratch->next_arg1 = (unsigned long)GetDeviceTreeAddress ();
-  if (Scratch->next_arg1 == (unsigned long)NULL) {
-    DEBUG ((DEBUG_ERROR, "Platform Device Tree is not found\n"));
-    ASSERT (FALSE);
-  }
-  DEBUG ((DEBUG_INFO, "DTB address: 0x%08x\n", Scratch->next_arg1));
+  DEBUG ((DEBUG_INFO, "HART ID: 0x%x enter SecCoreStartUpWithStack\n", HartId));
 
   //
   // Setup EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC for each hart.
@@ -705,6 +731,18 @@ VOID EFIAPI SecCoreStartUpWithStack(
   ThisSbiPlatform->platform_ops_addr = (unsigned long)&Edk2OpensbiPlatformOps;
 
   if (HartId == FixedPcdGet32(PcdBootHartId)) {
+
+    Scratch->next_arg1 = (unsigned long)GetDeviceTreeAddress ();
+    if (Scratch->next_arg1 == (unsigned long)NULL) {
+      DEBUG ((DEBUG_ERROR, "Platform Device Tree is not found\n"));
+      ASSERT (FALSE);
+    }
+
+    DEBUG ((DEBUG_INFO, "HART number: 0x%x\n", ThisSbiPlatform->hart_count));
+    DEBUG ((DEBUG_INFO, "HART index to HART ID:\n"));
+    for (HardIndex = 0; HardIndex < ThisSbiPlatform->hart_count; HardIndex ++) {
+      DEBUG ((DEBUG_INFO, "  Index: %d -> Hard ID: %x\n", HardIndex, ThisSbiPlatform->hart_index2id [HardIndex]));
+    }
     LaunchPeiCore (HartId, Scratch);
   }
 
@@ -739,3 +777,11 @@ VOID EFIAPI SecCoreStartUpWithStack(
   sbi_init(Scratch);
 }
 
+void xxxx (char *debugstr, ...)
+{
+  VA_LIST  Marker;
+
+  VA_START (Marker, debugstr);
+  DebugVPrint (DEBUG_INFO, debugstr, Marker);
+  VA_END (Marker);
+}
diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S b/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S
index b3eccf92eb..f0c3dff0d9 100644
--- a/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S
+++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/Riscv64/SecEntry.S
@@ -101,16 +101,35 @@ _scratch_init:
   /* Loop to next hart */
   blt   t1, s7, _scratch_init
 
-  /* Fill-out temporary memory with 55aa*/
+  li    a4, FixedPcdGet32 (PcdTemporaryRamBase)
+  li    a5, FixedPcdGet32 (PcdTemporaryRamSize)
+
+  /* Use Temp memory as the stack for calling to C code */
+  add   sp, a4, a5
+  /* Get the address of device tree and call generic fw_platform_init */
+  call  GetDeviceTreeAddress /* a0 return the device tree address */
+  beqz  a0, skip_fw_init
+  add   a1, a0, 0            /* a1 is device tree */
+  csrr  a0, CSR_MHARTID      /* a0 is hart ID */
+  call  fw_platform_init
+skip_fw_init:
+
+  /* Zero out temporary memory */
   li    a4, FixedPcdGet32 (PcdTemporaryRamBase)
   li    a5, FixedPcdGet32 (PcdTemporaryRamSize)
   add   a5, a4, a5
 1:
-  li    a3, 0x5AA55AA55AA55AA5
+  li    a3, 0x0
   sd    a3, (a4)
   add   a4, a4, __SIZEOF_POINTER__
   blt   a4, a5, 1b
 
+  /* Overwrite hart_index2id array of
+     platform would like to use the bootable hart
+     other than it defined in Device Tree */
+  la    a0, platform
+  call  Edk2PlatformHartIndex2Id
+
   /* Update boot hart flag */
   la    a4, _boot_hart_done
   li    a5, 1
@@ -136,6 +155,10 @@ _start_warm:
   csrw  CSR_MIP, zero
 
   li    s7, FixedPcdGet32 (PcdBootableHartNumber)
+  bnez  s7, 1f
+  la    a4, platform
+  REG_L s7, SBI_PLATFORM_HART_COUNT_OFFSET(a4)
+1:
   li    s8, FixedPcdGet32 (PcdOpenSbiStackSize)
   la    a4, platform
 
@@ -205,7 +228,7 @@ _start_warm:
   /* Setup stack */
   add   sp, tp, zero
 
-  /* Setup stack for the Hart executing EFI to top of temporary ram*/
+  /* Setup stack for the boot hart executing EFI to top of temporary ram*/
   csrr  a6, CSR_MHARTID
   li    a5, FixedPcdGet32 (PcdBootHartId)
   bne   a6, a5, 1f
-- 
2.31.1


  parent reply	other threads:[~2022-01-08  8:25 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-08  7:24 [PATCH 42/79] RISC-V: Use RISC-V PeiCoreEntryPoint library Abner Chang
2022-01-08  7:24 ` [PATCH 43/79] Platform/RISC-V: Add library to get PPI descriptor Abner Chang
2022-01-08  7:24 ` [PATCH 44/79] Platform/RISC-V: Use PlatformSecPpiLib Abner Chang
2022-01-08  7:24 ` [PATCH 45/79] Platform/RISC-V: Add NULL library instance of RiscVSpecialPlatformLib Abner Chang
2022-01-08  7:24 ` [PATCH 46/79] Platform/RISC-V: Remove platform dependency from common platform lib Abner Chang
2022-01-08  7:24 ` [PATCH 47/79] Platform/RISC-V: Remove Null instance of OpensbiPlatformLibNull Abner Chang
2022-01-08  7:24 ` Abner Chang [this message]
2022-01-08  7:24 ` [PATCH 49/79] RiscVPlatformPkg/OpensbiPlatformLib: Remove platform code Abner Chang
2022-01-08  7:24 ` [PATCH 50/79] RiscVPlatformPkg/RiscVSpecialPlatformLib: Rename module name Abner Chang
2022-01-08  7:24 ` [PATCH 51/79] RiscVPkg: Update opensbi library Abner Chang
2022-01-08  7:24 ` [PATCH 52/79] RiscVPlatformPkg/Sec: Check Cold/Warm hart Abner Chang
2022-01-08  7:24 ` [PATCH 53/79] RiscVPlatformPkg/Sec: Add more comments to Secmain.c Abner Chang
2022-01-08  7:24 ` [PATCH 54/79] RiscV/ProcessorPkg: Create read mtime CSR library instances Abner Chang
2022-01-08  7:24 ` [PATCH 55/79] RiscV/ProcessorPkg: Use mtime CSR library Abner Chang
2022-01-08  7:24 ` [PATCH 56/79] RISC-V/PlatformPkg: Updates for the latest OpenSBI Abner Chang
2022-01-08  7:24 ` [PATCH 57/79] PlatformPkg/Sec: Separate EDK2 Opensbi platform hook Abner Chang
2022-01-08  7:24 ` [PATCH 58/79] RISC-V/PlatformPkg: Determine hart number from DTB Abner Chang
2022-01-08  7:24 ` [PATCH 59/79] Silicon/RISC-V: Add PciCpuIoDxe driver Abner Chang
2022-01-08  7:24 ` [PATCH 60/79] Platform/RISC-V: Add debug message to SecMain.c Abner Chang
2022-01-08  7:24 ` [PATCH 61/79] Platform/RISC-V: Initialize variable to zero Abner Chang

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