From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0b-002e3701.pphosted.com (mx0b-002e3701.pphosted.com [148.163.143.35]) by mx.groups.io with SMTP id smtpd.web11.3775.1641630527986549894 for ; Sat, 08 Jan 2022 00:28:48 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@hpe.com header.s=pps0720 header.b=mahqosxW; spf=permerror, err=parse error for token &{10 18 %{ir}.%{v}.%{d}.spf.has.pphosted.com}: invalid domain name (domain: hpe.com, ip: 148.163.143.35, mailfrom: prvs=000704d8ca=abner.chang@hpe.com) Received: from pps.filterd (m0134425.ppops.net [127.0.0.1]) by mx0b-002e3701.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 2084mtjs020761; Sat, 8 Jan 2022 08:28:47 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=hpe.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=pps0720; bh=wkVHjhKGy+v8wvjw4qvolftt7KXC3EAkb0HizMgf0EY=; b=mahqosxWVc1T0HtRV+t+kB4uvjIQkPH/u2h6HsDO4AUSPYPUebE3LFGqscgkxrc6cQrV BdlEI9fxcVj0ouhVESiU++vtNCQxFVPTCFvzBqXF8HWTLW3sEiIcjRRdUO88lma4TrIo hxBlh6rFLVxyVeYnt8vBq9CIIgO3USTziNeA9pfimdgado8Y4MWcCACGmPAUknw8vJBm +GqsHo/3fjUJyc8sv/tI12p0uXqhZTRnQpdf4m405NB3iz4IoCL+D2MoUHChUVa7CwSC XFxzLGpXlOcSej5E4+EaivXGh0T+NFTPvKW/W59iJ21tAFqQVu6p6j0dY/THrAG5yrzH Ww== Received: from g2t2354.austin.hpe.com (g2t2354.austin.hpe.com [15.233.44.27]) by mx0b-002e3701.pphosted.com (PPS) with ESMTPS id 3df3wtgr5e-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 08 Jan 2022 08:28:46 +0000 Received: from g2t2360.austin.hpecorp.net (g2t2360.austin.hpecorp.net [16.196.225.135]) by g2t2354.austin.hpe.com (Postfix) with ESMTP id 51D5281; Sat, 8 Jan 2022 08:28:46 +0000 (UTC) Received: from UB16Abner.asiapacific.hpqcorp.net (ub16abner.asiapacific.hpqcorp.net [15.119.209.229]) by g2t2360.austin.hpecorp.net (Postfix) with ESMTP id 417A03B; Sat, 8 Jan 2022 08:28:45 +0000 (UTC) From: "Abner Chang" To: devel@edk2.groups.io Cc: abner.chang@hpe.com, Daniel Schaefer , Sunil V L Subject: [PATCH 67/79] RiscVPlatformPkg: Address Core CI ECC errors. Date: Sat, 8 Jan 2022 15:27:25 +0800 Message-Id: <20220108072737.17962-6-abner.chang@hpe.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220108072737.17962-1-abner.chang@hpe.com> References: <20220108072737.17962-1-abner.chang@hpe.com> MIME-Version: 1.0 X-Proofpoint-GUID: 5PZ2A2ECzZY8zhJWfPGpwk5S0G5GTs6r X-Proofpoint-ORIG-GUID: 5PZ2A2ECzZY8zhJWfPGpwk5S0G5GTs6r X-HPE-SCL: -1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-01-08_03,2022-01-07_01,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 phishscore=0 bulkscore=0 priorityscore=1501 suspectscore=0 lowpriorityscore=0 spamscore=0 impostorscore=0 mlxscore=0 malwarescore=0 clxscore=1015 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2110150000 definitions=main-2201080064 Content-Transfer-Encoding: quoted-printable Signed-off-by: Abner Chang Cc: Daniel Schaefer Cc: Sunil V L --- RiscVPlatformPkg/RiscVPlatformPkg.dec | 1 - RiscVPlatformPkg/RiscVPlatformPkg.dsc | 4 +- .../FirmwareContextProcessorSpecificLib.inf | 6 +- .../OpensbiPlatformLib/OpensbiPlatformLib.inf | 2 +- .../PeiCoreEntryPoint/PeiCoreEntryPoint.inf | 1 - .../PlatformBootManagerLib.inf | 13 +--- .../PlatformMemoryTestLibNull.inf | 6 +- .../PlatformSecPpiLibNull.inf | 7 +- .../PlatformUpdateProgressLibNull.inf | 7 +- .../Library/ResetSystemLib/ResetSystemLib.inf | 1 - .../Universal/FdtPeim/FdtPeim.inf | 3 - .../Universal/Pei/PlatformPei/PlatformPei.inf | 8 +-- RiscVPlatformPkg/Universal/Sec/SecMain.inf | 1 + .../FirmwareContextProcessorSpecificLib.h | 4 +- .../PlatformBootManager.h | 10 +-- RiscVPlatformPkg/Universal/Sec/SecMain.h | 29 +++++--- .../Edk2OpensbiPlatformWrapperLib.c | 8 +-- .../FirmwareContextProcessorSpecificLib.c | 4 +- .../{Platform.c =3D> OpensbiPlatform.c} | 0 .../PeiCoreEntryPoint/PeiCoreEntryPoint.c | 2 +- .../PeiCoreInfoHobLibNull/CoreInfoHob.c | 2 +- .../PlatformBootManager.c | 7 ++ .../PlatformBootManagerLib/PlatformData.c | 2 +- .../PlatformSecPpiLibNull/PlatformSecPpiLib.c | 2 +- .../RiscVSpecialPlatformLib.c | 2 +- RiscVPlatformPkg/Universal/FdtPeim/FdtPeim.c | 3 +- .../Universal/Pei/PlatformPei/MemDetect.c | 6 +- .../Universal/Pei/PlatformPei/Platform.c | 71 ++++++++++++++++++- RiscVPlatformPkg/Universal/Sec/SecMain.c | 51 +++++++------ RiscVPlatformPkg/RiscVPlatformPkg.uni | 69 ++++++++++++++++++ 30 files changed, 229 insertions(+), 103 deletions(-) rename RiscVPlatformPkg/Library/OpensbiPlatformLib/{Platform.c =3D> Opensb= iPlatform.c} (100%) diff --git a/RiscVPlatformPkg/RiscVPlatformPkg.dec b/RiscVPlatformPkg/RiscV= PlatformPkg.dec index 19206556ce..53d424c901 100644 --- a/RiscVPlatformPkg/RiscVPlatformPkg.dec +++ b/RiscVPlatformPkg/RiscVPlatformPkg.dec @@ -85,7 +85,6 @@ [PcdsPatchableInModule]=0D =0D [PcdsFeatureFlag]=0D - gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootlogoOnlyEnable|FALSE|BOOLEAN|= 0x00001200=0D =0D [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]=0D =0D diff --git a/RiscVPlatformPkg/RiscVPlatformPkg.dsc b/RiscVPlatformPkg/RiscV= PlatformPkg.dsc index f7f5c3f7cd..366dcaefab 100644 --- a/RiscVPlatformPkg/RiscVPlatformPkg.dsc +++ b/RiscVPlatformPkg/RiscVPlatformPkg.dsc @@ -1,11 +1,11 @@ -#/** @file=0D +## @file=0D # RISC-V platform package.=0D #=0D # Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All right= s reserved.
=0D #=0D # SPDX-License-Identifier: BSD-2-Clause-Patent=0D #=0D -#**/=0D +#=0D =0D ##########################################################################= ######=0D #=0D diff --git a/RiscVPlatformPkg/Library/FirmwareContextProcessorSpecificLib/F= irmwareContextProcessorSpecificLib.inf b/RiscVPlatformPkg/Library/FirmwareC= ontextProcessorSpecificLib/FirmwareContextProcessorSpecificLib.inf index 8ea37ae4f4..4da78178a9 100644 --- a/RiscVPlatformPkg/Library/FirmwareContextProcessorSpecificLib/Firmware= ContextProcessorSpecificLib.inf +++ b/RiscVPlatformPkg/Library/FirmwareContextProcessorSpecificLib/Firmware= ContextProcessorSpecificLib.inf @@ -1,10 +1,11 @@ -#/** @file=0D +## @file=0D +# This is the library module of RISC-V EDK2 OpenSBI Firmware Context=0D +# Processor Specific hwardware information.=0D #=0D # Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
=0D #=0D # SPDX-License-Identifier: BSD-2-Clause-Patent=0D #=0D -#**/=0D =0D [Defines]=0D INF_VERSION =3D 0x0001001b=0D @@ -28,4 +29,3 @@ MemoryAllocationLib=0D PrintLib=0D =0D -=0D diff --git a/RiscVPlatformPkg/Library/OpensbiPlatformLib/OpensbiPlatformLib= .inf b/RiscVPlatformPkg/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf index 8e3f07d833..d53b7ec0c4 100644 --- a/RiscVPlatformPkg/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf +++ b/RiscVPlatformPkg/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf @@ -24,7 +24,7 @@ #=0D =0D [Sources]=0D - Platform.c=0D + OpensbiPlatform.c=0D =0D [Packages]=0D EmbeddedPkg/EmbeddedPkg.dec=0D diff --git a/RiscVPlatformPkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.i= nf b/RiscVPlatformPkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf index af453f6650..f22999d9d4 100644 --- a/RiscVPlatformPkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf +++ b/RiscVPlatformPkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf @@ -33,5 +33,4 @@ BaseLib=0D DebugLib=0D PlatformSecPpiLib=0D - RiscVFirmwareContextLib=0D =0D diff --git a/RiscVPlatformPkg/Library/PlatformBootManagerLib/PlatformBootMa= nagerLib.inf b/RiscVPlatformPkg/Library/PlatformBootManagerLib/PlatformBoot= ManagerLib.inf index 8022372fa6..3d88b004f2 100644 --- a/RiscVPlatformPkg/Library/PlatformBootManagerLib/PlatformBootManagerLi= b.inf +++ b/RiscVPlatformPkg/Library/PlatformBootManagerLib/PlatformBootManagerLi= b.inf @@ -34,18 +34,11 @@ =0D [LibraryClasses]=0D BaseLib=0D - UefiBootServicesTableLib=0D - UefiRuntimeServicesTableLib=0D - UefiLib=0D - UefiBootManagerLib=0D PcdLib=0D - PlatformMemoryTestLib=0D - PlatformUpdateProgressLib=0D - DxeServicesLib=0D MemoryAllocationLib=0D - DevicePathLib=0D - HiiLib=0D PrintLib=0D + PlatformMemoryTestLib=0D + PlatformUpdateProgressLib=0D =0D [Guids]=0D gEfiEndOfDxeEventGroupGuid=0D @@ -59,4 +52,4 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow=0D gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn=0D gEfiMdeModulePkgTokenSpaceGuid.PcdConInConnectOnDemand=0D - gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootlogoOnlyEnable=0D +=0D diff --git a/RiscVPlatformPkg/Library/PlatformMemoryTestLibNull/PlatformMem= oryTestLibNull.inf b/RiscVPlatformPkg/Library/PlatformMemoryTestLibNull/Pla= tformMemoryTestLibNull.inf index a1b503ebc2..9905448909 100644 --- a/RiscVPlatformPkg/Library/PlatformMemoryTestLibNull/PlatformMemoryTest= LibNull.inf +++ b/RiscVPlatformPkg/Library/PlatformMemoryTestLibNull/PlatformMemoryTest= LibNull.inf @@ -1,10 +1,10 @@ -#/** @file=0D +## @file=0D +# Platform NULL memory test library instance.=0D #=0D # Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
=0D #=0D # SPDX-License-Identifier: BSD-2-Clause-Patent=0D #=0D -#**/=0D =0D [Defines]=0D INF_VERSION =3D 0x0001001b=0D @@ -22,8 +22,6 @@ MdePkg/MdePkg.dec=0D =0D [LibraryClasses]=0D - UefiLib=0D - DebugLib=0D =0D [Pcd]=0D =0D diff --git a/RiscVPlatformPkg/Library/PlatformSecPpiLibNull/PlatformSecPpiL= ibNull.inf b/RiscVPlatformPkg/Library/PlatformSecPpiLibNull/PlatformSecPpiL= ibNull.inf index 5b3570ce6d..cf5da8443e 100644 --- a/RiscVPlatformPkg/Library/PlatformSecPpiLibNull/PlatformSecPpiLibNull.= inf +++ b/RiscVPlatformPkg/Library/PlatformSecPpiLibNull/PlatformSecPpiLibNull.= inf @@ -1,17 +1,16 @@ ## @file=0D -# Library instance to to provide PPI before PEI Core=0D +# NULL library instance of PlatformSecPpiLib=0D #=0D # Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
=0D #=0D # SPDX-License-Identifier: BSD-2-Clause-Patent=0D #=0D -##=0D =0D [Defines]=0D INF_VERSION =3D 0x0001001b=0D BASE_NAME =3D PlatformSecPpiLib=0D FILE_GUID =3D A2CDDADC-CB65-4EED-9CAE-192B0BDD6C84= =0D - MODULE_TYPE =3D PEIM=0D + MODULE_TYPE =3D BASE=0D VERSION_STRING =3D 1.0=0D LIBRARY_CLASS =3D PlatformSecPpiLib|PEI_CORE=0D =0D @@ -30,6 +29,4 @@ RiscVPlatformPkg/RiscVPlatformPkg.dec=0D =0D [LibraryClasses]=0D - #BaseLib=0D - #PrintLib=0D =0D diff --git a/RiscVPlatformPkg/Library/PlatformUpdateProgressLibNull/Platfor= mUpdateProgressLibNull.inf b/RiscVPlatformPkg/Library/PlatformUpdateProgres= sLibNull/PlatformUpdateProgressLibNull.inf index fdba00c053..1411015809 100644 --- a/RiscVPlatformPkg/Library/PlatformUpdateProgressLibNull/PlatformUpdate= ProgressLibNull.inf +++ b/RiscVPlatformPkg/Library/PlatformUpdateProgressLibNull/PlatformUpdate= ProgressLibNull.inf @@ -1,10 +1,11 @@ -#/** @file=0D +## @file=0D +# Platform Update Progress NULL library=0D #=0D # Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
=0D #=0D # SPDX-License-Identifier: BSD-2-Clause-Patent=0D #=0D -#**/=0D +#=0D =0D [Defines]=0D INF_VERSION =3D 0x0001001b=0D @@ -22,8 +23,6 @@ MdePkg/MdePkg.dec=0D =0D [LibraryClasses]=0D - UefiLib=0D - DebugLib=0D =0D [Pcd]=0D =0D diff --git a/RiscVPlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf b/R= iscVPlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf index 0ce1e90b70..7e92a00fa0 100644 --- a/RiscVPlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf +++ b/RiscVPlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf @@ -4,7 +4,6 @@ # Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
=0D # SPDX-License-Identifier: BSD-2-Clause-Patent=0D #=0D -##=0D =0D [Defines]=0D INF_VERSION =3D 0x00010005=0D diff --git a/RiscVPlatformPkg/Universal/FdtPeim/FdtPeim.inf b/RiscVPlatform= Pkg/Universal/FdtPeim/FdtPeim.inf index 33b7f89805..cc870b8a91 100644 --- a/RiscVPlatformPkg/Universal/FdtPeim/FdtPeim.inf +++ b/RiscVPlatformPkg/Universal/FdtPeim/FdtPeim.inf @@ -33,14 +33,11 @@ RiscVPkg/RiscVPkg.dec=0D =0D [LibraryClasses]=0D - DebugLib=0D DebugLib=0D HobLib=0D FdtLib=0D PcdLib=0D - PeiServicesLib=0D PeimEntryPoint=0D - RiscVFirmwareContextLib=0D =0D [Guids]=0D gFdtHobGuid ## PRODUCES=0D diff --git a/RiscVPlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf b/R= iscVPlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf index 7a88099150..e62c6f9563 100644 --- a/RiscVPlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf +++ b/RiscVPlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf @@ -27,6 +27,7 @@ Fv.c=0D MemDetect.c=0D Platform.c=0D + Platform.h=0D =0D [Packages]=0D MdeModulePkg/MdeModulePkg.dec=0D @@ -42,12 +43,9 @@ DebugLib=0D HobLib=0D IoLib=0D - PciLib=0D - PeiResourcePublicationLib=0D - PeiServicesLib=0D - PeiServicesTablePointerLib=0D - PeimEntryPoint=0D PcdLib=0D + PeimEntryPoint=0D + PeiResourcePublicationLib=0D RiscVCoreplexInfoLib=0D =0D [Pcd]=0D diff --git a/RiscVPlatformPkg/Universal/Sec/SecMain.inf b/RiscVPlatformPkg/= Universal/Sec/SecMain.inf index caed51a54c..0e78b8ba31 100644 --- a/RiscVPlatformPkg/Universal/Sec/SecMain.inf +++ b/RiscVPlatformPkg/Universal/Sec/SecMain.inf @@ -22,6 +22,7 @@ #=0D =0D [Sources]=0D + SecMain.h=0D SecMain.c=0D =0D [Sources.RISCV64]=0D diff --git a/RiscVPlatformPkg/Include/Library/FirmwareContextProcessorSpeci= ficLib.h b/RiscVPlatformPkg/Include/Library/FirmwareContextProcessorSpecifi= cLib.h index f3b096c257..3920c61155 100644 --- a/RiscVPlatformPkg/Include/Library/FirmwareContextProcessorSpecificLib.h +++ b/RiscVPlatformPkg/Include/Library/FirmwareContextProcessorSpecificLib.h @@ -6,8 +6,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent=0D =0D **/=0D -#ifndef FIRMWARE_CONTEXT_PROCESSOR_SPECIFIC_LIB_H=0D -#define FIRMWARE_CONTEXT_PROCESSOR_SPECIFIC_LIB_H=0D +#ifndef FIRMWARE_CONTEXT_PROCESSOR_SPECIFIC_LIB_H_=0D +#define FIRMWARE_CONTEXT_PROCESSOR_SPECIFIC_LIB_H_=0D =0D #include =0D #include =0D diff --git a/RiscVPlatformPkg/Library/PlatformBootManagerLib/PlatformBootMa= nager.h b/RiscVPlatformPkg/Library/PlatformBootManagerLib/PlatformBootManag= er.h index 58c363a48b..01c26f307e 100644 --- a/RiscVPlatformPkg/Library/PlatformBootManagerLib/PlatformBootManager.h +++ b/RiscVPlatformPkg/Library/PlatformBootManagerLib/PlatformBootManager.h @@ -1,4 +1,4 @@ -/**@file=0D +/** @file=0D Head file for BDS Platform specific code=0D =0D Copyright (c) 2016, Hewlett Packard Enterprise Development LP. All rights = reserved.
=0D @@ -39,14 +39,6 @@ typedef struct { =0D extern PLATFORM_CONSOLE_CONNECT_ENTRY gPlatformConsole[];=0D =0D -#define gEndEntire \=0D - { \=0D - END_DEVICE_PATH_TYPE,\=0D - END_ENTIRE_DEVICE_PATH_SUBTYPE,\=0D - END_DEVICE_PATH_LENGTH,\=0D - 0\=0D - }=0D -=0D #define CONSOLE_OUT BIT0=0D #define CONSOLE_IN BIT1=0D #define STD_ERROR BIT2=0D diff --git a/RiscVPlatformPkg/Universal/Sec/SecMain.h b/RiscVPlatformPkg/Un= iversal/Sec/SecMain.h index 6188778fc4..63a610fbd0 100644 --- a/RiscVPlatformPkg/Universal/Sec/SecMain.h +++ b/RiscVPlatformPkg/Universal/Sec/SecMain.h @@ -27,25 +27,38 @@ #include =0D #include =0D =0D -int=0D +/**=0D + OpenSBI platform early init hook.=0D +=0D + @param[in] ColdBoot Is cold boot path or warm boot path.=0D + @retval OpenSBI error code.=0D +=0D +**/=0D +INT32=0D SecPostOpenSbiPlatformEarlylInit(=0D IN BOOLEAN ColdBoot=0D );=0D =0D -int=0D +/**=0D + OpenSBI platform final init hook.=0D + We restore the next_arg1 to the pointer of EFI_RISCV_OPENSBI_FIRMWARE_CO= NTEXT.=0D +=0D + @param[in] ColdBoot Is cold boot path or warm boot path.=0D + @retval OpenSBI error code.=0D +=0D +**/=0D +INT32=0D SecPostOpenSbiPlatformFinalInit (=0D IN BOOLEAN ColdBoot=0D );=0D =0D +/**=0D + SEC machine mode trap handler.=0D +=0D +**/=0D VOID=0D SecMachineModeTrapHandler (=0D IN VOID=0D );=0D =0D -VOID=0D -EFIAPI=0D -SecStartupPhase2 (=0D - IN VOID *Context=0D - );=0D -=0D #endif // _SECMAIN_H_=0D diff --git a/RiscVPlatformPkg/Library/Edk2OpensbiPlatformWrapperLib/Edk2Ope= nsbiPlatformWrapperLib.c b/RiscVPlatformPkg/Library/Edk2OpensbiPlatformWrap= perLib/Edk2OpensbiPlatformWrapperLib.c index 6c5c1a789f..2137c6c619 100644 --- a/RiscVPlatformPkg/Library/Edk2OpensbiPlatformWrapperLib/Edk2OpensbiPla= tformWrapperLib.c +++ b/RiscVPlatformPkg/Library/Edk2OpensbiPlatformWrapperLib/Edk2OpensbiPla= tformWrapperLib.c @@ -1,11 +1,11 @@ -/*=0D +/** @file=0D EDK2 OpenSBI generic platform wrapper library=0D =0D Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All right= s reserved.
=0D =0D SPDX-License-Identifier: BSD-2-Clause-Patent=0D =0D - */=0D + **/=0D =0D #include =0D #include =0D @@ -189,7 +189,7 @@ Edk2OpensbiPlatformEarlyInit ( return ReturnCode;=0D }=0D }=0D - if (ColdBoot =3D=3D TRUE) {=0D + if (ColdBoot) {=0D return SecPostOpenSbiPlatformEarlylInit(ColdBoot);=0D }=0D return 0;=0D @@ -216,7 +216,7 @@ Edk2OpensbiPlatformFinalInit ( return ReturnCode;=0D }=0D }=0D - if (ColdBoot =3D=3D TRUE) {=0D + if (ColdBoot) {=0D return SecPostOpenSbiPlatformFinalInit(ColdBoot);=0D }=0D return 0;=0D diff --git a/RiscVPlatformPkg/Library/FirmwareContextProcessorSpecificLib/F= irmwareContextProcessorSpecificLib.c b/RiscVPlatformPkg/Library/FirmwareCon= textProcessorSpecificLib/FirmwareContextProcessorSpecificLib.c index c62f77bc49..143c18d62c 100644 --- a/RiscVPlatformPkg/Library/FirmwareContextProcessorSpecificLib/Firmware= ContextProcessorSpecificLib.c +++ b/RiscVPlatformPkg/Library/FirmwareContextProcessorSpecificLib/Firmware= ContextProcessorSpecificLib.c @@ -1,4 +1,4 @@ -/**@file=0D +/** @file=0D Common library to build upfirmware context processor-specific informatio= n=0D =0D Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All right= s reserved.
=0D @@ -93,7 +93,7 @@ CommonFirmwareContextHartSpecificInfo ( }=0D =0D /**=0D - Print debug information of the processor specific data for a hart=0D + Print debug information of the processor specific data for a hart.=0D =0D @param ProcessorSpecificDataHob Pointer to RISC_V_PROCESSOR_SPECIFI= C_DATA_HOB=0D **/=0D diff --git a/RiscVPlatformPkg/Library/OpensbiPlatformLib/Platform.c b/RiscV= PlatformPkg/Library/OpensbiPlatformLib/OpensbiPlatform.c similarity index 100% rename from RiscVPlatformPkg/Library/OpensbiPlatformLib/Platform.c rename to RiscVPlatformPkg/Library/OpensbiPlatformLib/OpensbiPlatform.c diff --git a/RiscVPlatformPkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.c= b/RiscVPlatformPkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.c index 16488b7bc9..50de969947 100644 --- a/RiscVPlatformPkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.c +++ b/RiscVPlatformPkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.c @@ -45,7 +45,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent **/=0D VOID=0D EFIAPI=0D -_ModuleEntryPoint(=0D +_ModuleEntryPoint (=0D IN CONST EFI_SEC_PEI_HAND_OFF *SecCoreData,=0D IN CONST EFI_PEI_PPI_DESCRIPTOR *PpiList=0D )=0D diff --git a/RiscVPlatformPkg/Library/PeiCoreInfoHobLibNull/CoreInfoHob.c b= /RiscVPlatformPkg/Library/PeiCoreInfoHobLibNull/CoreInfoHob.c index 9aad7991bc..ae80b2404d 100644 --- a/RiscVPlatformPkg/Library/PeiCoreInfoHobLibNull/CoreInfoHob.c +++ b/RiscVPlatformPkg/Library/PeiCoreInfoHobLibNull/CoreInfoHob.c @@ -1,4 +1,4 @@ -/**@file=0D +/** @file=0D Build up platform processor information.=0D =0D Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All right= s reserved.
=0D diff --git a/RiscVPlatformPkg/Library/PlatformBootManagerLib/PlatformBootMa= nager.c b/RiscVPlatformPkg/Library/PlatformBootManagerLib/PlatformBootManag= er.c index d67f4836fc..deaad7d5a1 100644 --- a/RiscVPlatformPkg/Library/PlatformBootManagerLib/PlatformBootManager.c +++ b/RiscVPlatformPkg/Library/PlatformBootManagerLib/PlatformBootManager.c @@ -86,6 +86,13 @@ PlatformFindLoadOption ( return -1;=0D }=0D =0D +/**=0D + Register a boot option using a file GUID in the FV.=0D +=0D + @param FileGuid The file GUID name in FV.=0D + @param Description The boot option description.=0D + @param Attributes The attributes used for the boot option loading.=0D +**/=0D VOID=0D PlatformRegisterFvBootOption (=0D EFI_GUID *FileGuid,=0D diff --git a/RiscVPlatformPkg/Library/PlatformBootManagerLib/PlatformData.c= b/RiscVPlatformPkg/Library/PlatformBootManagerLib/PlatformData.c index 3208051e16..c1dbbf451e 100644 --- a/RiscVPlatformPkg/Library/PlatformBootManagerLib/PlatformData.c +++ b/RiscVPlatformPkg/Library/PlatformBootManagerLib/PlatformData.c @@ -1,4 +1,4 @@ -/**@file=0D +/** @file=0D Defined the platform specific device path which will be filled to=0D ConIn/ConOut variables.=0D =0D diff --git a/RiscVPlatformPkg/Library/PlatformSecPpiLibNull/PlatformSecPpiL= ib.c b/RiscVPlatformPkg/Library/PlatformSecPpiLibNull/PlatformSecPpiLib.c index d5c089b02d..bcb345c4e9 100644 --- a/RiscVPlatformPkg/Library/PlatformSecPpiLibNull/PlatformSecPpiLib.c +++ b/RiscVPlatformPkg/Library/PlatformSecPpiLibNull/PlatformSecPpiLib.c @@ -1,4 +1,4 @@ -/**@file=0D +/** @file=0D NULL library instance of PlatformSecPpiLib=0D =0D Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All right= s reserved.
=0D diff --git a/RiscVPlatformPkg/Library/RiscVSpecialPlatformLibNull/RiscVSpec= ialPlatformLib.c b/RiscVPlatformPkg/Library/RiscVSpecialPlatformLibNull/Ris= cVSpecialPlatformLib.c index f64bde4535..44f6ad6aed 100644 --- a/RiscVPlatformPkg/Library/RiscVSpecialPlatformLibNull/RiscVSpecialPlat= formLib.c +++ b/RiscVPlatformPkg/Library/RiscVSpecialPlatformLibNull/RiscVSpecialPlat= formLib.c @@ -1,4 +1,4 @@ -/**@file=0D +/** @file=0D Library to provide platform_override for the special=0D RISC-V platform. This module incorporates with=0D OpensbiPlatformLib and RISC-V Opensbi library.=0D diff --git a/RiscVPlatformPkg/Universal/FdtPeim/FdtPeim.c b/RiscVPlatformPk= g/Universal/FdtPeim/FdtPeim.c index 2cd94f291c..3487a5faf4 100644 --- a/RiscVPlatformPkg/Universal/FdtPeim/FdtPeim.c +++ b/RiscVPlatformPkg/Universal/FdtPeim/FdtPeim.c @@ -22,7 +22,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent @param FileHandle Handle of the file being invoked.=0D @param PeiServices Describes the list of possible PEI Servic= es.=0D =0D - @retval TODO=0D + @retval EFI_SUCCESS The address of FDT is passed in HOB.=0D + EFI_UNSUPPORTED Can't locate FDT.=0D **/=0D EFI_STATUS=0D EFIAPI=0D diff --git a/RiscVPlatformPkg/Universal/Pei/PlatformPei/MemDetect.c b/RiscV= PlatformPkg/Universal/Pei/PlatformPei/MemDetect.c index c15d6bb5d4..9b52eb5189 100644 --- a/RiscVPlatformPkg/Universal/Pei/PlatformPei/MemDetect.c +++ b/RiscVPlatformPkg/Universal/Pei/PlatformPei/MemDetect.c @@ -1,4 +1,4 @@ -/**@file=0D +/** @file=0D Memory Detection for Virtual Machines.=0D =0D Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All right= s reserved.
=0D @@ -32,7 +32,7 @@ Module Name: =0D =0D /**=0D - Publish PEI core memory=0D + Publish PEI core memory.=0D =0D @return EFI_SUCCESS The PEIM initialized successfully.=0D =0D @@ -65,7 +65,7 @@ PublishPeiMemory ( }=0D =0D /**=0D - Publish system RAM and reserve memory regions=0D + Publish system RAM and reserve memory regions.=0D =0D **/=0D VOID=0D diff --git a/RiscVPlatformPkg/Universal/Pei/PlatformPei/Platform.c b/RiscVP= latformPkg/Universal/Pei/PlatformPei/Platform.c index 1cc64b3e9c..8a248f3630 100644 --- a/RiscVPlatformPkg/Universal/Pei/PlatformPei/Platform.c +++ b/RiscVPlatformPkg/Universal/Pei/PlatformPei/Platform.c @@ -1,4 +1,4 @@ -/**@file=0D +/** @file=0D Platform PEI driver=0D =0D Copyright (c) 2019-2021, Hewlett Packard Enterprise Development LP. All = rights reserved.
=0D @@ -54,6 +54,14 @@ EFI_PEI_PPI_DESCRIPTOR mPpiBootMode[] =3D { =0D STATIC EFI_BOOT_MODE mBootMode =3D BOOT_WITH_FULL_CONFIGURATION;=0D =0D +/**=0D + Build memory map I/O range resource HOB using the=0D + base address and size.=0D +=0D + @param MemoryBase Memory map I/O base.=0D + @param MemorySize Memory map I/O size.=0D +=0D +**/=0D VOID=0D AddIoMemoryBaseSizeHob (=0D EFI_PHYSICAL_ADDRESS MemoryBase,=0D @@ -71,6 +79,13 @@ AddIoMemoryBaseSizeHob ( );=0D }=0D =0D +/**=0D + Build reserved memory range resource HOB.=0D +=0D + @param MemoryBase Reserved memory range base address.=0D + @param MemorySize Reserved memory range size.=0D +=0D +**/=0D VOID=0D AddReservedMemoryBaseSizeHob (=0D EFI_PHYSICAL_ADDRESS MemoryBase,=0D @@ -88,6 +103,14 @@ AddReservedMemoryBaseSizeHob ( );=0D }=0D =0D +/**=0D + Build memory map I/O resource using the base address=0D + and the top address of memory range.=0D +=0D + @param MemoryBase Memory map I/O range base address.=0D + @param MemoryLimit The top address of memory map I/O range=0D +=0D +**/=0D VOID=0D AddIoMemoryRangeHob (=0D EFI_PHYSICAL_ADDRESS MemoryBase,=0D @@ -97,7 +120,14 @@ AddIoMemoryRangeHob ( AddIoMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase));= =0D }=0D =0D +/**=0D + Create memory range resource HOB using the memory base=0D + address and size.=0D +=0D + @param MemoryBase Memory range base address.=0D + @param MemorySize Memory range size.=0D =0D +**/=0D VOID=0D AddMemoryBaseSizeHob (=0D EFI_PHYSICAL_ADDRESS MemoryBase,=0D @@ -118,7 +148,14 @@ AddMemoryBaseSizeHob ( );=0D }=0D =0D +/**=0D + Create memory range resource HOB using memory base=0D + address and top address of the memory range.=0D +=0D + @param MemoryBase Memory range base address.=0D + @param MemoryLimit Memory range size.=0D =0D +**/=0D VOID=0D AddMemoryRangeHob (=0D EFI_PHYSICAL_ADDRESS MemoryBase,=0D @@ -128,7 +165,14 @@ AddMemoryRangeHob ( AddMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase));=0D }=0D =0D +/**=0D + Create untested memory range resource HOB using memory base=0D + address and top address of the memory range.=0D +=0D + @param MemoryBase Memory range base address.=0D + @param MemorySize Memory range size.=0D =0D +**/=0D VOID=0D AddUntestedMemoryBaseSizeHob (=0D EFI_PHYSICAL_ADDRESS MemoryBase,=0D @@ -148,6 +192,14 @@ AddUntestedMemoryBaseSizeHob ( );=0D }=0D =0D +/**=0D + Create untested memory range resource HOB using memory base=0D + address and top address of the memory range.=0D +=0D + @param MemoryBase Memory range base address.=0D + @param MemoryLimit Memory range size.=0D +=0D +**/=0D VOID=0D AddUntestedMemoryRangeHob (=0D EFI_PHYSICAL_ADDRESS MemoryBase,=0D @@ -157,6 +209,10 @@ AddUntestedMemoryRangeHob ( AddUntestedMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryB= ase));=0D }=0D =0D +/**=0D + Add PCI resource.=0D +=0D +**/=0D VOID=0D AddPciResource (=0D VOID=0D @@ -167,6 +223,10 @@ AddPciResource ( //=0D }=0D =0D +/**=0D + Platform memory map initialization.=0D +=0D +**/=0D VOID=0D MemMapInitialization (=0D VOID=0D @@ -187,6 +247,10 @@ MemMapInitialization ( AddPciResource ();=0D }=0D =0D +/**=0D + Platform misc initialization.=0D +=0D +**/=0D VOID=0D MiscInitialization (=0D VOID=0D @@ -221,7 +285,10 @@ CheckResumeFromS3 ( return FALSE;=0D }=0D =0D +/**=0D + Platform boot mode initialization.=0D =0D +**/=0D VOID=0D BootModeInitialization (=0D VOID=0D @@ -229,7 +296,7 @@ BootModeInitialization ( {=0D EFI_STATUS Status;=0D =0D - if (CheckResumeFromS3 () =3D=3D TRUE) {=0D + if (CheckResumeFromS3) {=0D DEBUG ((DEBUG_INFO, "This is wake from S3\n"));=0D } else {=0D DEBUG ((DEBUG_INFO, "This is normal boot\n"));=0D diff --git a/RiscVPlatformPkg/Universal/Sec/SecMain.c b/RiscVPlatformPkg/Un= iversal/Sec/SecMain.c index 05f228c44d..1fafed2799 100644 --- a/RiscVPlatformPkg/Universal/Sec/SecMain.c +++ b/RiscVPlatformPkg/Universal/Sec/SecMain.c @@ -227,10 +227,10 @@ FindFfsFileAndSection ( }=0D =0D /**=0D - Locates the PEI Core entry point address=0D + Locates the PEI Core entry point address.=0D =0D @param[in] Fv The firmware volume to search=0D - @param[out] PeiCoreEntryPoint The entry point of the PEI Core image=0D + @param[out] PeiCoreImageBase The entry point of the PEI Core image=0D =0D @retval EFI_SUCCESS The file and section was found=0D @retval EFI_NOT_FOUND The file and section was not found=0D @@ -270,14 +270,10 @@ FindPeiCoreImageBaseInFv ( }=0D =0D /**=0D - Locates the PEI Core entry point address=0D + Locates the PEI Core entry point address.=0D =0D - @param[in,out] Fv The firmware volume to search=0D - @param[out] PeiCoreEntryPoint The entry point of the PEI Core image= =0D -=0D - @retval EFI_SUCCESS The file and section was found=0D - @retval EFI_NOT_FOUND The file and section was not found=0D - @retval EFI_VOLUME_CORRUPTED The firmware volume was corrupted=0D + @param[in,out] BootFv The firmware volume to search=0D + @param[out] PeiCoreImageBase The entry point of the PEI Core image= =0D =0D **/=0D VOID=0D @@ -292,12 +288,16 @@ FindPeiCoreImageBase ( FindPeiCoreImageBaseInFv (*BootFv, PeiCoreImageBase);=0D }=0D =0D -/*=0D +/**=0D Find and return Pei Core entry point.=0D =0D It also find SEC and PEI Core file debug inforamtion. It will report the= m if=0D remote debug is enabled.=0D =0D + @param[in] BootFirmwareVolumePtr The firmware volume pointer to searc= h=0D + @param[out] PeiCoreEntryPoint The entry point of the PEI Core imag= e=0D +=0D +=0D **/=0D VOID=0D FindAndReportEntryPoints (=0D @@ -330,7 +330,7 @@ FindAndReportEntryPoints ( =0D @param[in] ExtId The extension ID of the FW extension.=0D @param[in] FuncId The called function ID.=0D - @param[in] Args The args to the function.=0D + @param[in] TrapRegs The args to the function.=0D @param[out] OutVal The value the function returns to the caller.=0D @param[out] OutTrap Trap info for trapping further, see OpenSBI cod= e.=0D Is ignored if return value is not SBI_ETRAP.=0D @@ -339,7 +339,8 @@ FindAndReportEntryPoints ( @retval SBI_ENOTSUPP If there's no function with the given ID.=0D @retval SBI_ETRAP If the called SBI functions wants to trap furth= er.=0D **/=0D -STATIC int SbiEcallFirmwareHandler (=0D +int=0D +SbiEcallFirmwareHandler (=0D IN unsigned long ExtId,=0D IN unsigned long FuncId,=0D IN CONST struct sbi_trap_regs *TrapRegs,=0D @@ -347,8 +348,9 @@ STATIC int SbiEcallFirmwareHandler ( OUT struct sbi_trap_info *OutTrap=0D )=0D {=0D - int Ret =3D SBI_OK;=0D + int Ret;=0D =0D + Ret =3D SBI_OK;=0D switch (FuncId) {=0D case SBI_EXT_FW_MSCRATCH_FUNC:=0D *OutVal =3D (unsigned long) sbi_scratch_thishart_ptr();=0D @@ -408,17 +410,20 @@ RegisterFirmwareSbiExtension ( @param[in] Scratch Pointer to sbi_scratch structure.=0D =0D **/=0D -VOID EFIAPI PeiCore (=0D +VOID=0D +EFIAPI=0D +PeiCore (=0D IN UINTN BootHartId,=0D IN struct sbi_scratch *Scratch=0D )=0D {=0D EFI_SEC_PEI_HAND_OFF SecCoreData;=0D EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint;=0D - EFI_FIRMWARE_VOLUME_HEADER *BootFv =3D (EFI_FIRMWARE_VOLUME_HEADER *)Fix= edPcdGet32(PcdRiscVPeiFvBase);=0D + EFI_FIRMWARE_VOLUME_HEADER *BootFv;=0D EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT FirmwareContext;=0D - struct sbi_platform *ThisSbiPlatform;=0D + struct sbi_platform *ThisSbiPlatform;=0D =0D + BootFv =3D (EFI_FIRMWARE_VOLUME_HEADER *)FixedPcdGet32(PcdRiscVPeiFvBase= );=0D FindAndReportEntryPoints (&BootFv, &PeiCoreEntryPoint);=0D =0D SecCoreData.DataSize =3D sizeof(EFI_SEC_PEI_HAND_OFF);=0D @@ -571,8 +576,6 @@ GetDeviceTreeAddress ( bootable harts other than those declared in Device Tree=0D =0D @param[in] SbiPlatform Pointer to SBI platform=0D - @retval hart_index2id Index to ID value may be overwrote.=0D - @retval hart_count Index to ID value may be overwrote.=0D =0D **/=0D VOID=0D @@ -626,7 +629,9 @@ Edk2PlatformHartIndex2Id ( @param[in] Scratch Pointer to sbi_scratch structure.=0D =0D **/=0D -VOID EFIAPI SecCoreStartUpWithStack(=0D +VOID=0D +EFIAPI=0D +SecCoreStartUpWithStack(=0D IN UINTN HartId,=0D IN struct sbi_scratch *Scratch=0D )=0D @@ -710,11 +715,3 @@ VOID EFIAPI SecCoreStartUpWithStack( sbi_init(Scratch);=0D }=0D =0D -VOID OpensbiDebugPrint (CHAR8 *debugstr, ...)=0D -{=0D - VA_LIST Marker;=0D -=0D - VA_START (Marker, debugstr);=0D - DebugVPrint (DEBUG_INFO, debugstr, Marker);=0D - VA_END (Marker);=0D -}=0D diff --git a/RiscVPlatformPkg/RiscVPlatformPkg.uni b/RiscVPlatformPkg/RiscV= PlatformPkg.uni index deb91fa10c..d2caf7b4e7 100644 --- a/RiscVPlatformPkg/RiscVPlatformPkg.uni +++ b/RiscVPlatformPkg/RiscVPlatformPkg.uni @@ -12,4 +12,73 @@ =0D #string STR_PACKAGE_DESCRIPTION #language en-US "This Package prov= ides UEFI compatible RISC-V platform modules and libraries."=0D =0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRiscVSecFvBase_PROMPT #= language en-US "SEC FV base address"=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRiscVSecFvBase_HELP #= language en-US "RISC-V platform SEC Firmware Volume base address."=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRiscVSecFvSize_PROMPT #= language en-US "SEC FV Size"=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRiscVSecFvSize_HELP #= language en-US "RISC-V platform SEC Firmware Volume size."=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRiscVPeiFvBase_PROMPT #= language en-US "PEI FV base address"=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRiscVPeiFvBase_HELP #= language en-US "RISC-V platform PEI Firmware Volume base address."=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRiscVPeiFvSize_PROMPT #= language en-US "PEI FV Size"=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRiscVPeiFvSize_HELP #= language en-US "RISC-V platform PEI Firmware Volume size.=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRiscVDxeFvBase_PROMPT #= language en-US "DXE FV base address"=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRiscVDxeFvBase_HELP #= language en-US "RISC-V platform DXE Firmware Volume base address."=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRiscVDxeFvSize_PROMPT #= language en-US "DXE FV Size"=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRiscVDxeFvSize_HELP #= language en-US "RISC-V platform DXE Firmware Volume size."=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRiscVDtbFvBase_PROMPT #= language en-US "DBT FV base address."=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRiscVDtbFvBase_HELP #= language en-US "RISC-V platform Device Tree Firmware Volume base address."= =0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRiscVDtbFvSize_PROMPT #= language en-US "DBT FV Size".=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRiscVDtbFvSize_HELP #= language en-US "RISC-V platform Device Tree Firmware Volume size."=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRootFirmwareDomainBaseA= ddress_PROMPT #language en-US "OpenSBI Root Firmware Domain address"=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRootFirmwareDomainBaseA= ddress_HELP #language en-US "The base address of OpenSBI Root Firmware Do= main."=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRootFirmwareDomainSize_= PROMPT #language en-US "EDK2 OpenSBI Root Firmware Domain size"=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRootFirmwareDomainSize_= HELP #language en-US "This is the base address of EKD2 OpenSBI Root Firmw= are Domain."=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdFirmwareDomainBaseAddre= ss_PROMPT #language en-US "EDK2 OpenSBI Firmware Domain address"=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdFirmwareDomainBaseAddre= ss_HELP #language en-US "This is the base address of EDK2 OpenSBI Root Fi= rmware Domain."=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdFirmwareDomainSize_PROM= PT #language en-US "EDK2 OpenSBI Firmware Domain size"=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdFirmwareDomainSize_HELP= #language en-US "The size of EDK2 OpenSBI Firmware Domain."=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdVariableFirmwareRegionB= aseAddress_PROMPT #language en-US "EFI Variable FV base address"=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdVariableFirmwareRegionB= aseAddress_HELP #language en-US "The base address of EFI Variable Firmwar= e Volume."=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdVariableFirmwareRegionS= ize_PROMPT #language en-US "EFI Variable FV size"=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdVariableFirmwareRegionS= ize_HELP #language en-US "The size of EFI Variable Firmware Volume."=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdVariableFdBaseAddress_P= ROMPT #language en-US "FD base address"=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdVariableFdBaseAddress_H= ELP #language en-US "The base address of Firmware Device."=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdVariableFdSize_PROMPT #= language en-US "FD size"=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdVariableFdSize_HELP #= language en-US "The size of Firmware Device."=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdVariableFdBlockSize_PRO= MPT #language en-US "FD block size"=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdVariableFdBlockSize_HEL= P #language en-US "The block size of Firmware Device"=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdPlatformFlashNvStorageV= ariableBase_PROMPT #language en-US "Base address of flash NV variable ran= ge"=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdPlatformFlashNvStorageV= ariableBase_HELP #language en-US "Base address of the NV variable range= in flash device."=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdPlatformFlashNvStorageF= twWorkingBase_PROMPT #language en-US "Base address of flash FTW working blo= ck range"=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdPlatformFlashNvStorageF= twWorkingBase_HELP #language en-US "Base address of the FTW working block= range in flash device. If PcdFlashNvStorageFtwWorkingSize is larger than o= ne block size, this value should be block size aligned."=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdPlatformFlashNvStorageF= twSpareBase_PROMPT #language en-US "Base address of flash FTW spare block= range"=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdPlatformFlashNvStorageF= twSpareBase_HELP #language en-US "Base address of the FTW spare block r= ange in flash device. Note that this value should be block size aligned."=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdHartCount_PROMPT #lang= uage en-US "RISC-V HART Count"=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdHartCount_HELP #lang= uage en-US "The HART count of the RISC-V processor."=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdBootHartId_PROMPT #lang= uage en-US "RISC-V Boot HART ID"=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdBootHartId_HELP #lang= uage en-US "The ID number of booting HART of RISC-V processor."=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdBootableHartNumber_PROM= PT #language en-US "RISC-V Bootable HART number"=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdBootableHartNumber_HELP= #language en-US "The bootable hart core number, which incorporates with = OpenSBI platform hart_index2id value.
"=0D + = "PcdBootableHartNumber =3D 0 means the number of bootabl= e hart comes from Device Tree.
"=0D + = "Otherwise the number assigned in PcdBootableHartNumber = overwrite it."=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdBootableHartIndexToId_P= ROMPT #language en-US "RISC-V HARD ID to indxe tanslation"=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdBootableHartIndexToId_H= ELP #language en-US "PcdBootableHartIndexToId is valid if PcdBootableHart= Number !=3D 0.
"=0D + = "If PcdBootableHartNumber !=3D 0, then PcdBootableHar= tIndexToId is an array of
"=0D + = "bootable hart ID.
"=0D + = "For example,
"=0D + = " if PcdBootableHartNumber =3D=3D 3 then PcdBootable= HartIndexToId could be defined
"=0D + = " as {0x1, 0x2, 0x3}."=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdScratchRamBase_PROMPT #= language en-US "Scratch buffer base address"=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdScratchRamBase_HELP #= language en-US "The base address of scratch buffer used by OpenSBI when ini= tialize the HARTs."=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdScratchRamSize_PROMPT #= language en-US "Scratch buffer size"=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdScratchRamSize_HELP #= language en-US "The bsize of scratch buffer used by OpenSBI when initialize= RISC-V HARTs."=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdOpenSbiStackSize_PROMPT= #language en-US "Stack base address"=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdOpenSbiStackSize_HELP = #language en-US "The base address of stack used by OpenSBI when initialize= RISC-V HARTs.=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdTemporaryRamBase_PROMPT= #language en-US "Temporary RAM for PEI phase"=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdTemporaryRamBase_HELP = #language en-US "The temporary memory passed to PEI phase from SEC."=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdTemporaryRamSize_PROMPT= #language en-US "Size of Temporary RAM for PEI phase"=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdTemporaryRamSize_HELP = #language en-US "The size of temporary memory passed to PEI phase from SEC= ."=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdPeiCorePrivilegeMode_PR= OMPT #language en-US "RISC-V Privilege mode in PEI phase "=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdPeiCorePrivilegeMode_HE= LP #language en-US "The privilege mode the PEI phase is executed."=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdDeviceTreeAddress_PROMP= T #language en-US "Device Tree base address"=0D +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdDeviceTreeAddress_HELP = #language en-US "The base address of Device Tree.
"=0D =0D --=20 2.31.1