From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pg1-f178.google.com (mail-pg1-f178.google.com [209.85.215.178]) by mx.groups.io with SMTP id smtpd.web12.18397.1641739343745110713 for ; Sun, 09 Jan 2022 06:42:23 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@ventanamicro.com header.s=google header.b=UiFlw8yi; spf=pass (domain: ventanamicro.com, ip: 209.85.215.178, mailfrom: sunilvl@ventanamicro.com) Received: by mail-pg1-f178.google.com with SMTP id s1so9051934pga.5 for ; Sun, 09 Jan 2022 06:42:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=EJ7Kxp1sEwWFBqOHXpdSqrezf+e4hu4Y/itEfOkK9zI=; b=UiFlw8yiiRAXGlMVQbDLfE6myE5I5pHUOel96FgDEpwS5pbJFy9kvdpz4pRw9HYNSW B2QnyCLFjAmRminPzATiNOZSAfNIIF3nPhlSEoq3Pgff+G28YREaHJHZvFSbUIMj0xZo oLtP62gpuhE3b2wKgvHpJAvK6JhIH5B7QSBLMCkYMl8zKfrg6KTqyVq7V9mwJydfU9YK yd4GNEW6wKNoOh7Z1Mq8LQj5c66W6Ihd3YBaV+YpyV1+T06ZTuSTgf84YRSDsxX/p1aG AdSs+4wGF4YDzPekYe/zXKuA25ARBhJ7k5s3Nr9LyQUJSl01G8MttxRcND+5IEAN8q6G m8Rg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=EJ7Kxp1sEwWFBqOHXpdSqrezf+e4hu4Y/itEfOkK9zI=; b=Dy5frCA+IV97l4zn5c+FprLksVexGpZcfDrvWL0/ASQ5fuVq/DW1MSvprjHJTQzm+C 5225bRZB3WvlSIQDyDHgGUDfl44E7yeGZ+jYs6wG8AlUwX2tilI+FgJjIyqq9Nr2bbap kPrttYYlwmSH4PlqME57CrjXnHOZbJhKcNMd5CnwYGXvnklFHxcHxMnUydS/Sft3M9gL uqw3k40ehhCWJv3XL0NrQoDQ9I7Z03XyMKgEIKEkKGXT3x0JW/ezPXsSG8o2Up6NFrU0 fqIiN6g3iIkdQT3hyg1BmkNIPB9jZp28ODiScAAHwceXpCTKqVm4OSFR9ALS7e2UG4Zn yu7A== X-Gm-Message-State: AOAM530uqtC9bQh2+jbuQDWVZTI0YzpCX0KR6MUBUMxmB8Oxoq34Nn00 CLLFUy/Ra4IsFsRwvLcYrGDN1g== X-Google-Smtp-Source: ABdhPJxyc9EDrG+gonM9E8B7RNXMOtE/Yb3DdkYSHGW72MNXvYcLARY9ghNrEZvWfVy7KmoqgphIlw== X-Received: by 2002:a63:3809:: with SMTP id f9mr16064534pga.92.1641739342818; Sun, 09 Jan 2022 06:42:22 -0800 (PST) Return-Path: Received: from sunil-ThinkPad-T490 ([49.206.3.187]) by smtp.gmail.com with ESMTPSA id x40sm3867402pfu.185.2022.01.09.06.42.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 09 Jan 2022 06:42:22 -0800 (PST) Date: Sun, 9 Jan 2022 20:12:17 +0530 From: "Sunil V L" To: Abner Chang Cc: devel@edk2.groups.io, Daniel Schaefer Subject: Re: [PATCH 67/79] RiscVPlatformPkg: Address Core CI ECC errors. Message-ID: <20220109144217.GC4879@sunil-ThinkPad-T490> References: <20220108041420.16064-1-abner.chang@hpe.com> <20220108041420.16064-6-abner.chang@hpe.com> MIME-Version: 1.0 In-Reply-To: <20220108041420.16064-6-abner.chang@hpe.com> Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Sat, Jan 08, 2022 at 12:14:08PM +0800, Abner Chang wrote: > Signed-off-by: Abner Chang > Cc: Daniel Schaefer > Cc: Sunil V L > --- > RiscVPlatformPkg/RiscVPlatformPkg.dec | 1 - > RiscVPlatformPkg/RiscVPlatformPkg.dsc | 4 +- > .../FirmwareContextProcessorSpecificLib.inf | 6 +- > .../OpensbiPlatformLib/OpensbiPlatformLib.inf | 2 +- > .../PeiCoreEntryPoint/PeiCoreEntryPoint.inf | 1 - > .../PlatformBootManagerLib.inf | 13 +--- > .../PlatformMemoryTestLibNull.inf | 6 +- > .../PlatformSecPpiLibNull.inf | 7 +- > .../PlatformUpdateProgressLibNull.inf | 7 +- > .../Library/ResetSystemLib/ResetSystemLib.inf | 1 - > .../Universal/FdtPeim/FdtPeim.inf | 3 - > .../Universal/Pei/PlatformPei/PlatformPei.inf | 8 +-- > RiscVPlatformPkg/Universal/Sec/SecMain.inf | 1 + > .../FirmwareContextProcessorSpecificLib.h | 4 +- > .../PlatformBootManager.h | 10 +-- > RiscVPlatformPkg/Universal/Sec/SecMain.h | 29 +++++--- > .../Edk2OpensbiPlatformWrapperLib.c | 8 +-- > .../FirmwareContextProcessorSpecificLib.c | 4 +- > .../{Platform.c => OpensbiPlatform.c} | 0 > .../PeiCoreEntryPoint/PeiCoreEntryPoint.c | 2 +- > .../PeiCoreInfoHobLibNull/CoreInfoHob.c | 2 +- > .../PlatformBootManager.c | 7 ++ > .../PlatformBootManagerLib/PlatformData.c | 2 +- > .../PlatformSecPpiLibNull/PlatformSecPpiLib.c | 2 +- > .../RiscVSpecialPlatformLib.c | 2 +- > RiscVPlatformPkg/Universal/FdtPeim/FdtPeim.c | 3 +- > .../Universal/Pei/PlatformPei/MemDetect.c | 6 +- > .../Universal/Pei/PlatformPei/Platform.c | 71 ++++++++++++++++++- > RiscVPlatformPkg/Universal/Sec/SecMain.c | 51 +++++++------ > RiscVPlatformPkg/RiscVPlatformPkg.uni | 69 ++++++++++++++++++ > 30 files changed, 229 insertions(+), 103 deletions(-) > rename RiscVPlatformPkg/Library/OpensbiPlatformLib/{Platform.c => OpensbiPlatform.c} (100%) > > diff --git a/RiscVPlatformPkg/RiscVPlatformPkg.dec b/RiscVPlatformPkg/RiscVPlatformPkg.dec > index 19206556ce..53d424c901 100644 > --- a/RiscVPlatformPkg/RiscVPlatformPkg.dec > +++ b/RiscVPlatformPkg/RiscVPlatformPkg.dec > @@ -85,7 +85,6 @@ > [PcdsPatchableInModule] > > [PcdsFeatureFlag] > - gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootlogoOnlyEnable|FALSE|BOOLEAN|0x00001200 > > [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx] > > diff --git a/RiscVPlatformPkg/RiscVPlatformPkg.dsc b/RiscVPlatformPkg/RiscVPlatformPkg.dsc > index f7f5c3f7cd..366dcaefab 100644 > --- a/RiscVPlatformPkg/RiscVPlatformPkg.dsc > +++ b/RiscVPlatformPkg/RiscVPlatformPkg.dsc > @@ -1,11 +1,11 @@ > -#/** @file > +## @file > # RISC-V platform package. > # > # Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.
> # > # SPDX-License-Identifier: BSD-2-Clause-Patent > # > -#**/ > +# > > ################################################################################ > # > diff --git a/RiscVPlatformPkg/Library/FirmwareContextProcessorSpecificLib/FirmwareContextProcessorSpecificLib.inf b/RiscVPlatformPkg/Library/FirmwareContextProcessorSpecificLib/FirmwareContextProcessorSpecificLib.inf > index 8ea37ae4f4..4da78178a9 100644 > --- a/RiscVPlatformPkg/Library/FirmwareContextProcessorSpecificLib/FirmwareContextProcessorSpecificLib.inf > +++ b/RiscVPlatformPkg/Library/FirmwareContextProcessorSpecificLib/FirmwareContextProcessorSpecificLib.inf > @@ -1,10 +1,11 @@ > -#/** @file > +## @file > +# This is the library module of RISC-V EDK2 OpenSBI Firmware Context > +# Processor Specific hwardware information. > # > # Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.
> # > # SPDX-License-Identifier: BSD-2-Clause-Patent > # > -#**/ > > [Defines] > INF_VERSION = 0x0001001b > @@ -28,4 +29,3 @@ > MemoryAllocationLib > PrintLib > > - > diff --git a/RiscVPlatformPkg/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf b/RiscVPlatformPkg/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf > index 8e3f07d833..d53b7ec0c4 100644 > --- a/RiscVPlatformPkg/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf > +++ b/RiscVPlatformPkg/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf > @@ -24,7 +24,7 @@ > # > > [Sources] > - Platform.c > + OpensbiPlatform.c > > [Packages] > EmbeddedPkg/EmbeddedPkg.dec > diff --git a/RiscVPlatformPkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf b/RiscVPlatformPkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf > index af453f6650..f22999d9d4 100644 > --- a/RiscVPlatformPkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf > +++ b/RiscVPlatformPkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf > @@ -33,5 +33,4 @@ > BaseLib > DebugLib > PlatformSecPpiLib > - RiscVFirmwareContextLib > > diff --git a/RiscVPlatformPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf b/RiscVPlatformPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf > index 8022372fa6..3d88b004f2 100644 > --- a/RiscVPlatformPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf > +++ b/RiscVPlatformPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf > @@ -34,18 +34,11 @@ > > [LibraryClasses] > BaseLib > - UefiBootServicesTableLib > - UefiRuntimeServicesTableLib > - UefiLib > - UefiBootManagerLib > PcdLib > - PlatformMemoryTestLib > - PlatformUpdateProgressLib > - DxeServicesLib > MemoryAllocationLib > - DevicePathLib > - HiiLib > PrintLib > + PlatformMemoryTestLib > + PlatformUpdateProgressLib > > [Guids] > gEfiEndOfDxeEventGroupGuid > @@ -59,4 +52,4 @@ > gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow > gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn > gEfiMdeModulePkgTokenSpaceGuid.PcdConInConnectOnDemand > - gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootlogoOnlyEnable > + > diff --git a/RiscVPlatformPkg/Library/PlatformMemoryTestLibNull/PlatformMemoryTestLibNull.inf b/RiscVPlatformPkg/Library/PlatformMemoryTestLibNull/PlatformMemoryTestLibNull.inf > index a1b503ebc2..9905448909 100644 > --- a/RiscVPlatformPkg/Library/PlatformMemoryTestLibNull/PlatformMemoryTestLibNull.inf > +++ b/RiscVPlatformPkg/Library/PlatformMemoryTestLibNull/PlatformMemoryTestLibNull.inf > @@ -1,10 +1,10 @@ > -#/** @file > +## @file > +# Platform NULL memory test library instance. > # > # Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.
> # > # SPDX-License-Identifier: BSD-2-Clause-Patent > # > -#**/ > > [Defines] > INF_VERSION = 0x0001001b > @@ -22,8 +22,6 @@ > MdePkg/MdePkg.dec > > [LibraryClasses] > - UefiLib > - DebugLib > > [Pcd] > > diff --git a/RiscVPlatformPkg/Library/PlatformSecPpiLibNull/PlatformSecPpiLibNull.inf b/RiscVPlatformPkg/Library/PlatformSecPpiLibNull/PlatformSecPpiLibNull.inf > index 5b3570ce6d..cf5da8443e 100644 > --- a/RiscVPlatformPkg/Library/PlatformSecPpiLibNull/PlatformSecPpiLibNull.inf > +++ b/RiscVPlatformPkg/Library/PlatformSecPpiLibNull/PlatformSecPpiLibNull.inf > @@ -1,17 +1,16 @@ > ## @file > -# Library instance to to provide PPI before PEI Core > +# NULL library instance of PlatformSecPpiLib > # > # Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.
> # > # SPDX-License-Identifier: BSD-2-Clause-Patent > # > -## > > [Defines] > INF_VERSION = 0x0001001b > BASE_NAME = PlatformSecPpiLib > FILE_GUID = A2CDDADC-CB65-4EED-9CAE-192B0BDD6C84 > - MODULE_TYPE = PEIM > + MODULE_TYPE = BASE > VERSION_STRING = 1.0 > LIBRARY_CLASS = PlatformSecPpiLib|PEI_CORE > > @@ -30,6 +29,4 @@ > RiscVPlatformPkg/RiscVPlatformPkg.dec > > [LibraryClasses] > - #BaseLib > - #PrintLib > > diff --git a/RiscVPlatformPkg/Library/PlatformUpdateProgressLibNull/PlatformUpdateProgressLibNull.inf b/RiscVPlatformPkg/Library/PlatformUpdateProgressLibNull/PlatformUpdateProgressLibNull.inf > index fdba00c053..1411015809 100644 > --- a/RiscVPlatformPkg/Library/PlatformUpdateProgressLibNull/PlatformUpdateProgressLibNull.inf > +++ b/RiscVPlatformPkg/Library/PlatformUpdateProgressLibNull/PlatformUpdateProgressLibNull.inf > @@ -1,10 +1,11 @@ > -#/** @file > +## @file > +# Platform Update Progress NULL library > # > # Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.
> # > # SPDX-License-Identifier: BSD-2-Clause-Patent > # > -#**/ > +# > > [Defines] > INF_VERSION = 0x0001001b > @@ -22,8 +23,6 @@ > MdePkg/MdePkg.dec > > [LibraryClasses] > - UefiLib > - DebugLib > > [Pcd] > > diff --git a/RiscVPlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf b/RiscVPlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf > index 0ce1e90b70..7e92a00fa0 100644 > --- a/RiscVPlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf > +++ b/RiscVPlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf > @@ -4,7 +4,6 @@ > # Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.
> # SPDX-License-Identifier: BSD-2-Clause-Patent > # > -## > > [Defines] > INF_VERSION = 0x00010005 > diff --git a/RiscVPlatformPkg/Universal/FdtPeim/FdtPeim.inf b/RiscVPlatformPkg/Universal/FdtPeim/FdtPeim.inf > index 33b7f89805..cc870b8a91 100644 > --- a/RiscVPlatformPkg/Universal/FdtPeim/FdtPeim.inf > +++ b/RiscVPlatformPkg/Universal/FdtPeim/FdtPeim.inf > @@ -33,14 +33,11 @@ > RiscVPkg/RiscVPkg.dec > > [LibraryClasses] > - DebugLib > DebugLib > HobLib > FdtLib > PcdLib > - PeiServicesLib > PeimEntryPoint > - RiscVFirmwareContextLib > > [Guids] > gFdtHobGuid ## PRODUCES > diff --git a/RiscVPlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf b/RiscVPlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf > index 7a88099150..e62c6f9563 100644 > --- a/RiscVPlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf > +++ b/RiscVPlatformPkg/Universal/Pei/PlatformPei/PlatformPei.inf > @@ -27,6 +27,7 @@ > Fv.c > MemDetect.c > Platform.c > + Platform.h > > [Packages] > MdeModulePkg/MdeModulePkg.dec > @@ -42,12 +43,9 @@ > DebugLib > HobLib > IoLib > - PciLib > - PeiResourcePublicationLib > - PeiServicesLib > - PeiServicesTablePointerLib > - PeimEntryPoint > PcdLib > + PeimEntryPoint > + PeiResourcePublicationLib > RiscVCoreplexInfoLib > > [Pcd] > diff --git a/RiscVPlatformPkg/Universal/Sec/SecMain.inf b/RiscVPlatformPkg/Universal/Sec/SecMain.inf > index caed51a54c..0e78b8ba31 100644 > --- a/RiscVPlatformPkg/Universal/Sec/SecMain.inf > +++ b/RiscVPlatformPkg/Universal/Sec/SecMain.inf > @@ -22,6 +22,7 @@ > # > > [Sources] > + SecMain.h > SecMain.c > > [Sources.RISCV64] > diff --git a/RiscVPlatformPkg/Include/Library/FirmwareContextProcessorSpecificLib.h b/RiscVPlatformPkg/Include/Library/FirmwareContextProcessorSpecificLib.h > index f3b096c257..3920c61155 100644 > --- a/RiscVPlatformPkg/Include/Library/FirmwareContextProcessorSpecificLib.h > +++ b/RiscVPlatformPkg/Include/Library/FirmwareContextProcessorSpecificLib.h > @@ -6,8 +6,8 @@ > SPDX-License-Identifier: BSD-2-Clause-Patent > > **/ > -#ifndef FIRMWARE_CONTEXT_PROCESSOR_SPECIFIC_LIB_H > -#define FIRMWARE_CONTEXT_PROCESSOR_SPECIFIC_LIB_H > +#ifndef FIRMWARE_CONTEXT_PROCESSOR_SPECIFIC_LIB_H_ > +#define FIRMWARE_CONTEXT_PROCESSOR_SPECIFIC_LIB_H_ > > #include > #include > diff --git a/RiscVPlatformPkg/Library/PlatformBootManagerLib/PlatformBootManager.h b/RiscVPlatformPkg/Library/PlatformBootManagerLib/PlatformBootManager.h > index 58c363a48b..01c26f307e 100644 > --- a/RiscVPlatformPkg/Library/PlatformBootManagerLib/PlatformBootManager.h > +++ b/RiscVPlatformPkg/Library/PlatformBootManagerLib/PlatformBootManager.h > @@ -1,4 +1,4 @@ > -/**@file > +/** @file > Head file for BDS Platform specific code > > Copyright (c) 2016, Hewlett Packard Enterprise Development LP. All rights reserved.
> @@ -39,14 +39,6 @@ typedef struct { > > extern PLATFORM_CONSOLE_CONNECT_ENTRY gPlatformConsole[]; > > -#define gEndEntire \ > - { \ > - END_DEVICE_PATH_TYPE,\ > - END_ENTIRE_DEVICE_PATH_SUBTYPE,\ > - END_DEVICE_PATH_LENGTH,\ > - 0\ > - } > - > #define CONSOLE_OUT BIT0 > #define CONSOLE_IN BIT1 > #define STD_ERROR BIT2 > diff --git a/RiscVPlatformPkg/Universal/Sec/SecMain.h b/RiscVPlatformPkg/Universal/Sec/SecMain.h > index 6188778fc4..63a610fbd0 100644 > --- a/RiscVPlatformPkg/Universal/Sec/SecMain.h > +++ b/RiscVPlatformPkg/Universal/Sec/SecMain.h > @@ -27,25 +27,38 @@ > #include > #include > > -int > +/** > + OpenSBI platform early init hook. > + > + @param[in] ColdBoot Is cold boot path or warm boot path. > + @retval OpenSBI error code. > + > +**/ > +INT32 > SecPostOpenSbiPlatformEarlylInit( > IN BOOLEAN ColdBoot > ); > > -int > +/** > + OpenSBI platform final init hook. > + We restore the next_arg1 to the pointer of EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT. > + > + @param[in] ColdBoot Is cold boot path or warm boot path. > + @retval OpenSBI error code. > + > +**/ > +INT32 > SecPostOpenSbiPlatformFinalInit ( > IN BOOLEAN ColdBoot > ); > > +/** > + SEC machine mode trap handler. > + > +**/ > VOID > SecMachineModeTrapHandler ( > IN VOID > ); > > -VOID > -EFIAPI > -SecStartupPhase2 ( > - IN VOID *Context > - ); > - > #endif // _SECMAIN_H_ > diff --git a/RiscVPlatformPkg/Library/Edk2OpensbiPlatformWrapperLib/Edk2OpensbiPlatformWrapperLib.c b/RiscVPlatformPkg/Library/Edk2OpensbiPlatformWrapperLib/Edk2OpensbiPlatformWrapperLib.c > index 6c5c1a789f..2137c6c619 100644 > --- a/RiscVPlatformPkg/Library/Edk2OpensbiPlatformWrapperLib/Edk2OpensbiPlatformWrapperLib.c > +++ b/RiscVPlatformPkg/Library/Edk2OpensbiPlatformWrapperLib/Edk2OpensbiPlatformWrapperLib.c > @@ -1,11 +1,11 @@ > -/* > +/** @file > EDK2 OpenSBI generic platform wrapper library > > Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.
> > SPDX-License-Identifier: BSD-2-Clause-Patent > > - */ > + **/ > > #include > #include > @@ -189,7 +189,7 @@ Edk2OpensbiPlatformEarlyInit ( > return ReturnCode; > } > } > - if (ColdBoot == TRUE) { > + if (ColdBoot) { > return SecPostOpenSbiPlatformEarlylInit(ColdBoot); > } > return 0; > @@ -216,7 +216,7 @@ Edk2OpensbiPlatformFinalInit ( > return ReturnCode; > } > } > - if (ColdBoot == TRUE) { > + if (ColdBoot) { > return SecPostOpenSbiPlatformFinalInit(ColdBoot); > } > return 0; > diff --git a/RiscVPlatformPkg/Library/FirmwareContextProcessorSpecificLib/FirmwareContextProcessorSpecificLib.c b/RiscVPlatformPkg/Library/FirmwareContextProcessorSpecificLib/FirmwareContextProcessorSpecificLib.c > index c62f77bc49..143c18d62c 100644 > --- a/RiscVPlatformPkg/Library/FirmwareContextProcessorSpecificLib/FirmwareContextProcessorSpecificLib.c > +++ b/RiscVPlatformPkg/Library/FirmwareContextProcessorSpecificLib/FirmwareContextProcessorSpecificLib.c > @@ -1,4 +1,4 @@ > -/**@file > +/** @file > Common library to build upfirmware context processor-specific information > > Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.
> @@ -93,7 +93,7 @@ CommonFirmwareContextHartSpecificInfo ( > } > > /** > - Print debug information of the processor specific data for a hart > + Print debug information of the processor specific data for a hart. > > @param ProcessorSpecificDataHob Pointer to RISC_V_PROCESSOR_SPECIFIC_DATA_HOB > **/ > diff --git a/RiscVPlatformPkg/Library/OpensbiPlatformLib/Platform.c b/RiscVPlatformPkg/Library/OpensbiPlatformLib/OpensbiPlatform.c > similarity index 100% > rename from RiscVPlatformPkg/Library/OpensbiPlatformLib/Platform.c > rename to RiscVPlatformPkg/Library/OpensbiPlatformLib/OpensbiPlatform.c > diff --git a/RiscVPlatformPkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.c b/RiscVPlatformPkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.c > index 16488b7bc9..50de969947 100644 > --- a/RiscVPlatformPkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.c > +++ b/RiscVPlatformPkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.c > @@ -45,7 +45,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent > **/ > VOID > EFIAPI > -_ModuleEntryPoint( > +_ModuleEntryPoint ( > IN CONST EFI_SEC_PEI_HAND_OFF *SecCoreData, > IN CONST EFI_PEI_PPI_DESCRIPTOR *PpiList > ) > diff --git a/RiscVPlatformPkg/Library/PeiCoreInfoHobLibNull/CoreInfoHob.c b/RiscVPlatformPkg/Library/PeiCoreInfoHobLibNull/CoreInfoHob.c > index 9aad7991bc..ae80b2404d 100644 > --- a/RiscVPlatformPkg/Library/PeiCoreInfoHobLibNull/CoreInfoHob.c > +++ b/RiscVPlatformPkg/Library/PeiCoreInfoHobLibNull/CoreInfoHob.c > @@ -1,4 +1,4 @@ > -/**@file > +/** @file > Build up platform processor information. > > Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.
> diff --git a/RiscVPlatformPkg/Library/PlatformBootManagerLib/PlatformBootManager.c b/RiscVPlatformPkg/Library/PlatformBootManagerLib/PlatformBootManager.c > index d67f4836fc..deaad7d5a1 100644 > --- a/RiscVPlatformPkg/Library/PlatformBootManagerLib/PlatformBootManager.c > +++ b/RiscVPlatformPkg/Library/PlatformBootManagerLib/PlatformBootManager.c > @@ -86,6 +86,13 @@ PlatformFindLoadOption ( > return -1; > } > > +/** > + Register a boot option using a file GUID in the FV. > + > + @param FileGuid The file GUID name in FV. > + @param Description The boot option description. > + @param Attributes The attributes used for the boot option loading. > +**/ > VOID > PlatformRegisterFvBootOption ( > EFI_GUID *FileGuid, > diff --git a/RiscVPlatformPkg/Library/PlatformBootManagerLib/PlatformData.c b/RiscVPlatformPkg/Library/PlatformBootManagerLib/PlatformData.c > index 3208051e16..c1dbbf451e 100644 > --- a/RiscVPlatformPkg/Library/PlatformBootManagerLib/PlatformData.c > +++ b/RiscVPlatformPkg/Library/PlatformBootManagerLib/PlatformData.c > @@ -1,4 +1,4 @@ > -/**@file > +/** @file > Defined the platform specific device path which will be filled to > ConIn/ConOut variables. > > diff --git a/RiscVPlatformPkg/Library/PlatformSecPpiLibNull/PlatformSecPpiLib.c b/RiscVPlatformPkg/Library/PlatformSecPpiLibNull/PlatformSecPpiLib.c > index d5c089b02d..bcb345c4e9 100644 > --- a/RiscVPlatformPkg/Library/PlatformSecPpiLibNull/PlatformSecPpiLib.c > +++ b/RiscVPlatformPkg/Library/PlatformSecPpiLibNull/PlatformSecPpiLib.c > @@ -1,4 +1,4 @@ > -/**@file > +/** @file > NULL library instance of PlatformSecPpiLib > > Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.
> diff --git a/RiscVPlatformPkg/Library/RiscVSpecialPlatformLibNull/RiscVSpecialPlatformLib.c b/RiscVPlatformPkg/Library/RiscVSpecialPlatformLibNull/RiscVSpecialPlatformLib.c > index f64bde4535..44f6ad6aed 100644 > --- a/RiscVPlatformPkg/Library/RiscVSpecialPlatformLibNull/RiscVSpecialPlatformLib.c > +++ b/RiscVPlatformPkg/Library/RiscVSpecialPlatformLibNull/RiscVSpecialPlatformLib.c > @@ -1,4 +1,4 @@ > -/**@file > +/** @file > Library to provide platform_override for the special > RISC-V platform. This module incorporates with > OpensbiPlatformLib and RISC-V Opensbi library. > diff --git a/RiscVPlatformPkg/Universal/FdtPeim/FdtPeim.c b/RiscVPlatformPkg/Universal/FdtPeim/FdtPeim.c > index 2cd94f291c..3487a5faf4 100644 > --- a/RiscVPlatformPkg/Universal/FdtPeim/FdtPeim.c > +++ b/RiscVPlatformPkg/Universal/FdtPeim/FdtPeim.c > @@ -22,7 +22,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent > @param FileHandle Handle of the file being invoked. > @param PeiServices Describes the list of possible PEI Services. > > - @retval TODO > + @retval EFI_SUCCESS The address of FDT is passed in HOB. > + EFI_UNSUPPORTED Can't locate FDT. > **/ > EFI_STATUS > EFIAPI > diff --git a/RiscVPlatformPkg/Universal/Pei/PlatformPei/MemDetect.c b/RiscVPlatformPkg/Universal/Pei/PlatformPei/MemDetect.c > index c15d6bb5d4..9b52eb5189 100644 > --- a/RiscVPlatformPkg/Universal/Pei/PlatformPei/MemDetect.c > +++ b/RiscVPlatformPkg/Universal/Pei/PlatformPei/MemDetect.c > @@ -1,4 +1,4 @@ > -/**@file > +/** @file > Memory Detection for Virtual Machines. > > Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights reserved.
> @@ -32,7 +32,7 @@ Module Name: > > > /** > - Publish PEI core memory > + Publish PEI core memory. > > @return EFI_SUCCESS The PEIM initialized successfully. > > @@ -65,7 +65,7 @@ PublishPeiMemory ( > } > > /** > - Publish system RAM and reserve memory regions > + Publish system RAM and reserve memory regions. > > **/ > VOID > diff --git a/RiscVPlatformPkg/Universal/Pei/PlatformPei/Platform.c b/RiscVPlatformPkg/Universal/Pei/PlatformPei/Platform.c > index 1cc64b3e9c..8a248f3630 100644 > --- a/RiscVPlatformPkg/Universal/Pei/PlatformPei/Platform.c > +++ b/RiscVPlatformPkg/Universal/Pei/PlatformPei/Platform.c > @@ -1,4 +1,4 @@ > -/**@file > +/** @file > Platform PEI driver > > Copyright (c) 2019-2021, Hewlett Packard Enterprise Development LP. All rights reserved.
> @@ -54,6 +54,14 @@ EFI_PEI_PPI_DESCRIPTOR mPpiBootMode[] = { > > STATIC EFI_BOOT_MODE mBootMode = BOOT_WITH_FULL_CONFIGURATION; > > +/** > + Build memory map I/O range resource HOB using the > + base address and size. > + > + @param MemoryBase Memory map I/O base. > + @param MemorySize Memory map I/O size. > + > +**/ > VOID > AddIoMemoryBaseSizeHob ( > EFI_PHYSICAL_ADDRESS MemoryBase, > @@ -71,6 +79,13 @@ AddIoMemoryBaseSizeHob ( > ); > } > > +/** > + Build reserved memory range resource HOB. > + > + @param MemoryBase Reserved memory range base address. > + @param MemorySize Reserved memory range size. > + > +**/ > VOID > AddReservedMemoryBaseSizeHob ( > EFI_PHYSICAL_ADDRESS MemoryBase, > @@ -88,6 +103,14 @@ AddReservedMemoryBaseSizeHob ( > ); > } > > +/** > + Build memory map I/O resource using the base address > + and the top address of memory range. > + > + @param MemoryBase Memory map I/O range base address. > + @param MemoryLimit The top address of memory map I/O range > + > +**/ > VOID > AddIoMemoryRangeHob ( > EFI_PHYSICAL_ADDRESS MemoryBase, > @@ -97,7 +120,14 @@ AddIoMemoryRangeHob ( > AddIoMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase)); > } > > +/** > + Create memory range resource HOB using the memory base > + address and size. > + > + @param MemoryBase Memory range base address. > + @param MemorySize Memory range size. > > +**/ > VOID > AddMemoryBaseSizeHob ( > EFI_PHYSICAL_ADDRESS MemoryBase, > @@ -118,7 +148,14 @@ AddMemoryBaseSizeHob ( > ); > } > > +/** > + Create memory range resource HOB using memory base > + address and top address of the memory range. > + > + @param MemoryBase Memory range base address. > + @param MemoryLimit Memory range size. > > +**/ > VOID > AddMemoryRangeHob ( > EFI_PHYSICAL_ADDRESS MemoryBase, > @@ -128,7 +165,14 @@ AddMemoryRangeHob ( > AddMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase)); > } > > +/** > + Create untested memory range resource HOB using memory base > + address and top address of the memory range. > + > + @param MemoryBase Memory range base address. > + @param MemorySize Memory range size. > > +**/ > VOID > AddUntestedMemoryBaseSizeHob ( > EFI_PHYSICAL_ADDRESS MemoryBase, > @@ -148,6 +192,14 @@ AddUntestedMemoryBaseSizeHob ( > ); > } > > +/** > + Create untested memory range resource HOB using memory base > + address and top address of the memory range. > + > + @param MemoryBase Memory range base address. > + @param MemoryLimit Memory range size. > + > +**/ > VOID > AddUntestedMemoryRangeHob ( > EFI_PHYSICAL_ADDRESS MemoryBase, > @@ -157,6 +209,10 @@ AddUntestedMemoryRangeHob ( > AddUntestedMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase)); > } > > +/** > + Add PCI resource. > + > +**/ > VOID > AddPciResource ( > VOID > @@ -167,6 +223,10 @@ AddPciResource ( > // > } > > +/** > + Platform memory map initialization. > + > +**/ > VOID > MemMapInitialization ( > VOID > @@ -187,6 +247,10 @@ MemMapInitialization ( > AddPciResource (); > } > > +/** > + Platform misc initialization. > + > +**/ > VOID > MiscInitialization ( > VOID > @@ -221,7 +285,10 @@ CheckResumeFromS3 ( > return FALSE; > } > > +/** > + Platform boot mode initialization. > > +**/ > VOID > BootModeInitialization ( > VOID > @@ -229,7 +296,7 @@ BootModeInitialization ( > { > EFI_STATUS Status; > > - if (CheckResumeFromS3 () == TRUE) { > + if (CheckResumeFromS3) { > DEBUG ((DEBUG_INFO, "This is wake from S3\n")); > } else { > DEBUG ((DEBUG_INFO, "This is normal boot\n")); > diff --git a/RiscVPlatformPkg/Universal/Sec/SecMain.c b/RiscVPlatformPkg/Universal/Sec/SecMain.c > index 05f228c44d..1fafed2799 100644 > --- a/RiscVPlatformPkg/Universal/Sec/SecMain.c > +++ b/RiscVPlatformPkg/Universal/Sec/SecMain.c > @@ -227,10 +227,10 @@ FindFfsFileAndSection ( > } > > /** > - Locates the PEI Core entry point address > + Locates the PEI Core entry point address. > > @param[in] Fv The firmware volume to search > - @param[out] PeiCoreEntryPoint The entry point of the PEI Core image > + @param[out] PeiCoreImageBase The entry point of the PEI Core image > > @retval EFI_SUCCESS The file and section was found > @retval EFI_NOT_FOUND The file and section was not found > @@ -270,14 +270,10 @@ FindPeiCoreImageBaseInFv ( > } > > /** > - Locates the PEI Core entry point address > + Locates the PEI Core entry point address. > > - @param[in,out] Fv The firmware volume to search > - @param[out] PeiCoreEntryPoint The entry point of the PEI Core image > - > - @retval EFI_SUCCESS The file and section was found > - @retval EFI_NOT_FOUND The file and section was not found > - @retval EFI_VOLUME_CORRUPTED The firmware volume was corrupted > + @param[in,out] BootFv The firmware volume to search > + @param[out] PeiCoreImageBase The entry point of the PEI Core image > > **/ > VOID > @@ -292,12 +288,16 @@ FindPeiCoreImageBase ( > FindPeiCoreImageBaseInFv (*BootFv, PeiCoreImageBase); > } > > -/* > +/** > Find and return Pei Core entry point. > > It also find SEC and PEI Core file debug inforamtion. It will report them if > remote debug is enabled. > > + @param[in] BootFirmwareVolumePtr The firmware volume pointer to search > + @param[out] PeiCoreEntryPoint The entry point of the PEI Core image > + > + > **/ > VOID > FindAndReportEntryPoints ( > @@ -330,7 +330,7 @@ FindAndReportEntryPoints ( > > @param[in] ExtId The extension ID of the FW extension. > @param[in] FuncId The called function ID. > - @param[in] Args The args to the function. > + @param[in] TrapRegs The args to the function. > @param[out] OutVal The value the function returns to the caller. > @param[out] OutTrap Trap info for trapping further, see OpenSBI code. > Is ignored if return value is not SBI_ETRAP. > @@ -339,7 +339,8 @@ FindAndReportEntryPoints ( > @retval SBI_ENOTSUPP If there's no function with the given ID. > @retval SBI_ETRAP If the called SBI functions wants to trap further. > **/ > -STATIC int SbiEcallFirmwareHandler ( > +int > +SbiEcallFirmwareHandler ( > IN unsigned long ExtId, > IN unsigned long FuncId, > IN CONST struct sbi_trap_regs *TrapRegs, > @@ -347,8 +348,9 @@ STATIC int SbiEcallFirmwareHandler ( > OUT struct sbi_trap_info *OutTrap > ) > { > - int Ret = SBI_OK; > + int Ret; > > + Ret = SBI_OK; > switch (FuncId) { > case SBI_EXT_FW_MSCRATCH_FUNC: > *OutVal = (unsigned long) sbi_scratch_thishart_ptr(); > @@ -408,17 +410,20 @@ RegisterFirmwareSbiExtension ( > @param[in] Scratch Pointer to sbi_scratch structure. > > **/ > -VOID EFIAPI PeiCore ( > +VOID > +EFIAPI > +PeiCore ( > IN UINTN BootHartId, > IN struct sbi_scratch *Scratch > ) > { > EFI_SEC_PEI_HAND_OFF SecCoreData; > EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint; > - EFI_FIRMWARE_VOLUME_HEADER *BootFv = (EFI_FIRMWARE_VOLUME_HEADER *)FixedPcdGet32(PcdRiscVPeiFvBase); > + EFI_FIRMWARE_VOLUME_HEADER *BootFv; > EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT FirmwareContext; > - struct sbi_platform *ThisSbiPlatform; > + struct sbi_platform *ThisSbiPlatform; > > + BootFv = (EFI_FIRMWARE_VOLUME_HEADER *)FixedPcdGet32(PcdRiscVPeiFvBase); > FindAndReportEntryPoints (&BootFv, &PeiCoreEntryPoint); > > SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF); > @@ -571,8 +576,6 @@ GetDeviceTreeAddress ( > bootable harts other than those declared in Device Tree > > @param[in] SbiPlatform Pointer to SBI platform > - @retval hart_index2id Index to ID value may be overwrote. > - @retval hart_count Index to ID value may be overwrote. > > **/ > VOID > @@ -626,7 +629,9 @@ Edk2PlatformHartIndex2Id ( > @param[in] Scratch Pointer to sbi_scratch structure. > > **/ > -VOID EFIAPI SecCoreStartUpWithStack( > +VOID > +EFIAPI > +SecCoreStartUpWithStack( > IN UINTN HartId, > IN struct sbi_scratch *Scratch > ) > @@ -710,11 +715,3 @@ VOID EFIAPI SecCoreStartUpWithStack( > sbi_init(Scratch); > } > > -VOID OpensbiDebugPrint (CHAR8 *debugstr, ...) > -{ > - VA_LIST Marker; > - > - VA_START (Marker, debugstr); > - DebugVPrint (DEBUG_INFO, debugstr, Marker); > - VA_END (Marker); > -} > diff --git a/RiscVPlatformPkg/RiscVPlatformPkg.uni b/RiscVPlatformPkg/RiscVPlatformPkg.uni > index deb91fa10c..d2caf7b4e7 100644 > --- a/RiscVPlatformPkg/RiscVPlatformPkg.uni > +++ b/RiscVPlatformPkg/RiscVPlatformPkg.uni > @@ -12,4 +12,73 @@ > > #string STR_PACKAGE_DESCRIPTION #language en-US "This Package provides UEFI compatible RISC-V platform modules and libraries." > > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRiscVSecFvBase_PROMPT #language en-US "SEC FV base address" > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRiscVSecFvBase_HELP #language en-US "RISC-V platform SEC Firmware Volume base address." > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRiscVSecFvSize_PROMPT #language en-US "SEC FV Size" > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRiscVSecFvSize_HELP #language en-US "RISC-V platform SEC Firmware Volume size." > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRiscVPeiFvBase_PROMPT #language en-US "PEI FV base address" > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRiscVPeiFvBase_HELP #language en-US "RISC-V platform PEI Firmware Volume base address." > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRiscVPeiFvSize_PROMPT #language en-US "PEI FV Size" > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRiscVPeiFvSize_HELP #language en-US "RISC-V platform PEI Firmware Volume size. > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRiscVDxeFvBase_PROMPT #language en-US "DXE FV base address" > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRiscVDxeFvBase_HELP #language en-US "RISC-V platform DXE Firmware Volume base address." > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRiscVDxeFvSize_PROMPT #language en-US "DXE FV Size" > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRiscVDxeFvSize_HELP #language en-US "RISC-V platform DXE Firmware Volume size." > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRiscVDtbFvBase_PROMPT #language en-US "DBT FV base address." > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRiscVDtbFvBase_HELP #language en-US "RISC-V platform Device Tree Firmware Volume base address." > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRiscVDtbFvSize_PROMPT #language en-US "DBT FV Size". > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRiscVDtbFvSize_HELP #language en-US "RISC-V platform Device Tree Firmware Volume size." > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRootFirmwareDomainBaseAddress_PROMPT #language en-US "OpenSBI Root Firmware Domain address" > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRootFirmwareDomainBaseAddress_HELP #language en-US "The base address of OpenSBI Root Firmware Domain." > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRootFirmwareDomainSize_PROMPT #language en-US "EDK2 OpenSBI Root Firmware Domain size" > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdRootFirmwareDomainSize_HELP #language en-US "This is the base address of EKD2 OpenSBI Root Firmware Domain." The comment should be size instead of base address. Also, better to be consistent to use EDK2 OpenSBI or just OpenSBI. > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdFirmwareDomainBaseAddress_PROMPT #language en-US "EDK2 OpenSBI Firmware Domain address" > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdFirmwareDomainBaseAddress_HELP #language en-US "This is the base address of EDK2 OpenSBI Root Firmware Domain." This is not Root Firmware Domain, correct? Should it be explicit to say Non-Root Firmware Domain? > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdFirmwareDomainSize_PROMPT #language en-US "EDK2 OpenSBI Firmware Domain size" > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdFirmwareDomainSize_HELP #language en-US "The size of EDK2 OpenSBI Firmware Domain." > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdVariableFirmwareRegionBaseAddress_PROMPT #language en-US "EFI Variable FV base address" > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdVariableFirmwareRegionBaseAddress_HELP #language en-US "The base address of EFI Variable Firmware Volume." > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdVariableFirmwareRegionSize_PROMPT #language en-US "EFI Variable FV size" > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdVariableFirmwareRegionSize_HELP #language en-US "The size of EFI Variable Firmware Volume." > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdVariableFdBaseAddress_PROMPT #language en-US "FD base address" > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdVariableFdBaseAddress_HELP #language en-US "The base address of Firmware Device." > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdVariableFdSize_PROMPT #language en-US "FD size" > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdVariableFdSize_HELP #language en-US "The size of Firmware Device." > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdVariableFdBlockSize_PROMPT #language en-US "FD block size" > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdVariableFdBlockSize_HELP #language en-US "The block size of Firmware Device" > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdPlatformFlashNvStorageVariableBase_PROMPT #language en-US "Base address of flash NV variable range" > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdPlatformFlashNvStorageVariableBase_HELP #language en-US "Base address of the NV variable range in flash device." > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdPlatformFlashNvStorageFtwWorkingBase_PROMPT #language en-US "Base address of flash FTW working block range" > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdPlatformFlashNvStorageFtwWorkingBase_HELP #language en-US "Base address of the FTW working block range in flash device. If PcdFlashNvStorageFtwWorkingSize is larger than one block size, this value should be block size aligned." > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdPlatformFlashNvStorageFtwSpareBase_PROMPT #language en-US "Base address of flash FTW spare block range" > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdPlatformFlashNvStorageFtwSpareBase_HELP #language en-US "Base address of the FTW spare block range in flash device. Note that this value should be block size aligned." > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdHartCount_PROMPT #language en-US "RISC-V HART Count" > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdHartCount_HELP #language en-US "The HART count of the RISC-V processor." > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdBootHartId_PROMPT #language en-US "RISC-V Boot HART ID" > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdBootHartId_HELP #language en-US "The ID number of booting HART of RISC-V processor." > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdBootableHartNumber_PROMPT #language en-US "RISC-V Bootable HART number" > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdBootableHartNumber_HELP #language en-US "The bootable hart core number, which incorporates with OpenSBI platform hart_index2id value.
" > + "PcdBootableHartNumber = 0 means the number of bootable hart comes from Device Tree.
" > + "Otherwise the number assigned in PcdBootableHartNumber overwrite it." > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdBootableHartIndexToId_PROMPT #language en-US "RISC-V HARD ID to indxe tanslation" > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdBootableHartIndexToId_HELP #language en-US "PcdBootableHartIndexToId is valid if PcdBootableHartNumber != 0.
" > + "If PcdBootableHartNumber != 0, then PcdBootableHartIndexToId is an array of
" > + "bootable hart ID.
" > + "For example,
" > + " if PcdBootableHartNumber == 3 then PcdBootableHartIndexToId could be defined
" > + " as {0x1, 0x2, 0x3}." > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdScratchRamBase_PROMPT #language en-US "Scratch buffer base address" > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdScratchRamBase_HELP #language en-US "The base address of scratch buffer used by OpenSBI when initialize the HARTs." > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdScratchRamSize_PROMPT #language en-US "Scratch buffer size" > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdScratchRamSize_HELP #language en-US "The bsize of scratch buffer used by OpenSBI when initialize RISC-V HARTs." bsize > size. Should it be "while initializing the" RISC-V HARTS? > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdOpenSbiStackSize_PROMPT #language en-US "Stack base address" > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdOpenSbiStackSize_HELP #language en-US "The base address of stack used by OpenSBI when initialize RISC-V HARTs. The variable is StackSize. Is it base address or size? > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdTemporaryRamBase_PROMPT #language en-US "Temporary RAM for PEI phase" > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdTemporaryRamBase_HELP #language en-US "The temporary memory passed to PEI phase from SEC." > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdTemporaryRamSize_PROMPT #language en-US "Size of Temporary RAM for PEI phase" > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdTemporaryRamSize_HELP #language en-US "The size of temporary memory passed to PEI phase from SEC." > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdPeiCorePrivilegeMode_PROMPT #language en-US "RISC-V Privilege mode in PEI phase " > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdPeiCorePrivilegeMode_HELP #language en-US "The privilege mode the PEI phase is executed." > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdDeviceTreeAddress_PROMPT #language en-US "Device Tree base address" > +#string STR_gUefiRiscVPlatformPkgTokenSpaceGuid_PcdDeviceTreeAddress_HELP #language en-US "The base address of Device Tree.
" > > -- > 2.31.1 >