* [PATCH v1 1/1] UefiCpuPackage: Add APIs for CPU physical address mask calculation
@ 2022-01-12 9:32 Yu Pu
0 siblings, 0 replies; 2+ messages in thread
From: Yu Pu @ 2022-01-12 9:32 UTC (permalink / raw)
To: devel; +Cc: Yu Pu, Eric Dong, Ray Ni, Rahul Kumar
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3394
Firmware contains lots of code that deals with page table.These
code need the information of cpu physical address mask which
can be calculated from CPUID result.Today all these code implements
directly calls CPUID and calculates the address mask.
This bugzilla requests to add a new API as below so that all the
duplicated code can be removed.
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Yu Pu <yu.pu@intel.com>
Reviewed-by: Rahul Kumar <rahul1.kumar@intel.com>
---
IntelFsp2Pkg/Library/BaseCacheLib/CacheLib.c | 10 +----
MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c | 9 +---
MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/X64/SetIdtEntry.c | 14 +-----
MdeModulePkg/Universal/CapsulePei/X64/X64Entry.c | 14 +-----
OvmfPkg/XenPlatformPei/MemDetect.c | 11 +----
StandaloneMmPkg/Library/StandaloneMmMemLib/X86StandaloneMmMemLibInternal.c | 9 +---
UefiCpuPkg/CpuDxe/CpuDxe.c | 16 +------
UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c | 47 ++++++++++++++++++++
UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c | 9 +---
UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 9 +---
UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c | 9 +---
UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c | 10 +----
UefiPayloadPkg/UefiPayloadEntry/X64/VirtualMemory.c | 9 +---
EmulatorPkg/EmulatorPkg.dsc | 1 +
IntelFsp2Pkg/Library/BaseCacheLib/BaseCacheLib.inf | 1 +
MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf | 2 +
MdeModulePkg/MdeModulePkg.dsc | 1 +
MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf | 1 +
StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.inf | 2 +
StandaloneMmPkg/StandaloneMmPkg.dsc | 1 +
UefiCpuPkg/Include/Library/UefiCpuLib.h | 17 +++++++
21 files changed, 95 insertions(+), 107 deletions(-)
diff --git a/IntelFsp2Pkg/Library/BaseCacheLib/CacheLib.c b/IntelFsp2Pkg/Library/BaseCacheLib/CacheLib.c
index f879c268e7ec..3f8ed122b2be 100644
--- a/IntelFsp2Pkg/Library/BaseCacheLib/CacheLib.c
+++ b/IntelFsp2Pkg/Library/BaseCacheLib/CacheLib.c
@@ -9,6 +9,7 @@
#include <Library/BaseLib.h>
#include <Library/CacheLib.h>
#include <Library/CacheAsRamLib.h>
+#include <Library/UefiCpuLib.h>
#include "CacheLibInternal.h"
/**
@@ -388,15 +389,8 @@ SetCacheAttributes (
UINT32 UsedMsrNum;
EFI_MEMORY_CACHE_TYPE UsedMemoryCacheType;
UINT64 ValidMtrrAddressMask;
- UINT32 Cpuid_RegEax;
- AsmCpuid (CPUID_EXTENDED_FUNCTION, &Cpuid_RegEax, NULL, NULL, NULL);
- if (Cpuid_RegEax >= CPUID_VIR_PHY_ADDRESS_SIZE) {
- AsmCpuid (CPUID_VIR_PHY_ADDRESS_SIZE, &Cpuid_RegEax, NULL, NULL, NULL);
- ValidMtrrAddressMask = (LShiftU64 ((UINT64)1, (Cpuid_RegEax & 0xFF)) - 1) & (~(UINT64)0x0FFF);
- } else {
- ValidMtrrAddressMask = (LShiftU64 ((UINT64)1, 36) - 1) & (~(UINT64)0x0FFF);
- }
+ GetPhysicalAddressBits(NULL, &ValidMtrrAddressMask);
//
// Check for invalid parameter
diff --git a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
index 0700f310b203..78e91e6e9024 100644
--- a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
+++ b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
@@ -22,6 +22,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
+#include <Library/UefiCpuLib.h>
#include <Register/Intel/Cpuid.h>
#include "DxeIpl.h"
#include "VirtualMemory.h"
@@ -733,13 +734,7 @@ CreateIdentityMappingPageTables (
if (Hob != NULL) {
PhysicalAddressBits = ((EFI_HOB_CPU *)Hob)->SizeOfMemorySpace;
} else {
- AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
- if (RegEax >= 0x80000008) {
- AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
- PhysicalAddressBits = (UINT8)RegEax;
- } else {
- PhysicalAddressBits = 36;
- }
+ PhysicalAddressBits = GetPhysicalAddressBits(NULL, NULL);
}
Page5LevelSupport = FALSE;
diff --git a/MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/X64/SetIdtEntry.c b/MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/X64/SetIdtEntry.c
index 6b44f50bac70..367bf8cdd1e6 100644
--- a/MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/X64/SetIdtEntry.c
+++ b/MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/X64/SetIdtEntry.c
@@ -10,6 +10,7 @@ Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
+#include <Library/UefiCpuLib.h>
#include "ScriptExecute.h"
//
@@ -51,20 +52,9 @@ HookPageFaultHandler (
IN IA32_IDT_GATE_DESCRIPTOR *IdtEntry
)
{
- UINT32 RegEax;
- UINT8 PhysicalAddressBits;
UINTN PageFaultHandlerHookAddress;
- AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
- if (RegEax >= 0x80000008) {
- AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
- PhysicalAddressBits = (UINT8)RegEax;
- } else {
- PhysicalAddressBits = 36;
- }
-
- mPhyMask = LShiftU64 (1, PhysicalAddressBits) - 1;
- mPhyMask &= (1ull << 48) - SIZE_4KB;
+ GetPhysicalAddressBits(NULL, &mPhyMask);
//
// Set Page Fault entry to catch >4G access
diff --git a/MdeModulePkg/Universal/CapsulePei/X64/X64Entry.c b/MdeModulePkg/Universal/CapsulePei/X64/X64Entry.c
index 05941f9f8d56..06d6129c5e6d 100644
--- a/MdeModulePkg/Universal/CapsulePei/X64/X64Entry.c
+++ b/MdeModulePkg/Universal/CapsulePei/X64/X64Entry.c
@@ -12,6 +12,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Library/BaseMemoryLib.h>
#include <Library/CpuExceptionHandlerLib.h>
#include <Library/DebugAgentLib.h>
+#include <Library/UefiCpuLib.h>
#include "CommonHeader.h"
#define EXCEPTION_VECTOR_NUMBER 0x22
@@ -61,20 +62,9 @@ HookPageFaultHandler (
IN OUT PAGE_FAULT_CONTEXT *PageFaultContext
)
{
- UINT32 RegEax;
- UINT8 PhysicalAddressBits;
UINTN PageFaultHandlerHookAddress;
- AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
- if (RegEax >= 0x80000008) {
- AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
- PhysicalAddressBits = (UINT8)RegEax;
- } else {
- PhysicalAddressBits = 36;
- }
-
- PageFaultContext->PhyMask = LShiftU64 (1, PhysicalAddressBits) - 1;
- PageFaultContext->PhyMask &= (1ull << 48) - SIZE_4KB;
+ GetPhysicalAddressBits(NULL, &(PageFaultContext->PhyMask));
//
// Set Page Fault entry to catch >4G access
diff --git a/OvmfPkg/XenPlatformPei/MemDetect.c b/OvmfPkg/XenPlatformPei/MemDetect.c
index d412d1f4db6f..bd24612c21ef 100644
--- a/OvmfPkg/XenPlatformPei/MemDetect.c
+++ b/OvmfPkg/XenPlatformPei/MemDetect.c
@@ -30,6 +30,7 @@ Module Name:
#include <Library/PciLib.h>
#include <Library/PeimEntryPoint.h>
#include <Library/ResourcePublicationLib.h>
+#include <Library/UefiCpuLib.h>
#include "Platform.h"
#include "Cmos.h"
@@ -180,15 +181,7 @@ AddressWidthInitialization (
VOID
)
{
- UINT32 RegEax;
-
- AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
- if (RegEax >= 0x80000008) {
- AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
- mPhysMemAddressWidth = (UINT8)RegEax;
- } else {
- mPhysMemAddressWidth = 36;
- }
+ mPhysMemAddressWidth = GetPhysicalAddressBits(NULL, NULL);
//
// IA-32e paging translates 48-bit linear addresses to 52-bit physical addresses.
diff --git a/StandaloneMmPkg/Library/StandaloneMmMemLib/X86StandaloneMmMemLibInternal.c b/StandaloneMmPkg/Library/StandaloneMmMemLib/X86StandaloneMmMemLibInternal.c
index c309d1bc6a56..a5a96889ef85 100644
--- a/StandaloneMmPkg/Library/StandaloneMmMemLib/X86StandaloneMmMemLibInternal.c
+++ b/StandaloneMmPkg/Library/StandaloneMmMemLib/X86StandaloneMmMemLibInternal.c
@@ -19,6 +19,7 @@
#include <Library/MemoryAllocationLib.h>
#include <Library/DebugLib.h>
#include <Library/HobLib.h>
+#include <Library/UefiCpuLib.h>
#include <Guid/MmCoreData.h>
#include <Guid/MmramMemoryReserve.h>
@@ -50,13 +51,7 @@ MmMemLibInternalCalculateMaximumSupportAddress (
if (Hob != NULL) {
PhysicalAddressBits = ((EFI_HOB_CPU *)Hob)->SizeOfMemorySpace;
} else {
- AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
- if (RegEax >= 0x80000008) {
- AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
- PhysicalAddressBits = (UINT8)RegEax;
- } else {
- PhysicalAddressBits = 36;
- }
+ PhysicalAddressBits = GetPhysicalAddressBits (NULL, NULL);
}
//
diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.c b/UefiCpuPkg/CpuDxe/CpuDxe.c
index 00f3cb09572c..8aca1bf72b4c 100644
--- a/UefiCpuPkg/CpuDxe/CpuDxe.c
+++ b/UefiCpuPkg/CpuDxe/CpuDxe.c
@@ -503,21 +503,7 @@ InitializeMtrrMask (
VOID
)
{
- UINT32 RegEax;
- UINT8 PhysicalAddressBits;
-
- AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
-
- if (RegEax >= 0x80000008) {
- AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
-
- PhysicalAddressBits = (UINT8)RegEax;
- } else {
- PhysicalAddressBits = 36;
- }
-
- mValidMtrrBitsMask = LShiftU64 (1, PhysicalAddressBits) - 1;
- mValidMtrrAddressMask = mValidMtrrBitsMask & 0xfffffffffffff000ULL;
+ GetPhysicalAddressBits(&mValidMtrrBitsMask, &mValidMtrrAddressMask);
}
/**
diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c b/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c
index 5d925bc273f8..bb1343f3cd21 100644
--- a/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c
+++ b/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c
@@ -79,3 +79,50 @@ GetCpuSteppingId (
return (UINT8)Eax.Bits.SteppingId;
}
+
+/**
+ Get the physical address width supported by the processor.
+ @param[out] ValidAddressMask Bitmask with valid address bits set to
+ one; other bits are clear. Optional
+ parameter.
+ @param[out] ValidPageBaseAddressMask Bitmask with valid page base address
+ bits set to one; other bits are clear.
+ Optional parameter.
+ @return The physical address width supported by the processor.
+**/
+UINT8
+EFIAPI
+GetPhysicalAddressBits (
+ OUT UINT64 *ValidAddressMask OPTIONAL,
+ OUT UINT64 *ValidPageBaseAddressMask OPTIONAL
+ )
+{
+ UINT32 MaxExtendedFunction;
+ CPUID_VIR_PHY_ADDRESS_SIZE_EAX VirPhyAddressSize;
+ UINT64 AddressMask;
+ UINT64 PageBaseAddressMask;
+
+ AsmCpuid (CPUID_EXTENDED_FUNCTION, &MaxExtendedFunction, NULL, NULL, NULL);
+ if (MaxExtendedFunction >= CPUID_VIR_PHY_ADDRESS_SIZE) {
+ AsmCpuid (
+ CPUID_VIR_PHY_ADDRESS_SIZE,
+ &VirPhyAddressSize.Uint32,
+ NULL,
+ NULL,
+ NULL
+ );
+ } else {
+ VirPhyAddressSize.Bits.PhysicalAddressBits = 36;
+ }
+
+ AddressMask = LShiftU64 (1, VirPhyAddressSize.Bits.PhysicalAddressBits) - 1;
+ PageBaseAddressMask = AddressMask & ~(UINT64)0xFFF;
+
+ if (ValidAddressMask != NULL) {
+ *ValidAddressMask = AddressMask;
+ }
+ if (ValidPageBaseAddressMask != NULL) {
+ *ValidPageBaseAddressMask = PageBaseAddressMask;
+ }
+ return (UINT8)VirPhyAddressSize.Bits.PhysicalAddressBits;
+}
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c
index 4e8f897f5e9c..ec7cd4013132 100644
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c
+++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c
@@ -15,6 +15,7 @@
#include <Library/UefiBootServicesTableLib.h>
#include <Library/SmmServicesTableLib.h>
#include <Library/TpmMeasurementLib.h>
+#include <Library/UefiCpuLib.h>
#include <Register/Intel/Cpuid.h>
#include <Register/Intel/ArchitecturalMsr.h>
#include <Register/Intel/SmramSaveStateMap.h>
@@ -330,13 +331,7 @@ SmmCpuFeaturesInstallSmiHandler (
if (Hob != NULL) {
Psd->PhysicalAddressBits = ((EFI_HOB_CPU *)Hob)->SizeOfMemorySpace;
} else {
- AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
- if (RegEax >= 0x80000008) {
- AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
- Psd->PhysicalAddressBits = (UINT8)RegEax;
- } else {
- Psd->PhysicalAddressBits = 36;
- }
+ Psd->PhysicalAddressBits = GetPhysicalAddressBits (NULL, NULL);
}
if (!mStmConfigurationTableInitialized) {
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
index 538394f23910..de1385a86948 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
@@ -194,7 +194,6 @@ CalculateMaximumSupportAddress (
VOID
)
{
- UINT32 RegEax;
UINT8 PhysicalAddressBits;
VOID *Hob;
@@ -205,13 +204,7 @@ CalculateMaximumSupportAddress (
if (Hob != NULL) {
PhysicalAddressBits = ((EFI_HOB_CPU *)Hob)->SizeOfMemorySpace;
} else {
- AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
- if (RegEax >= 0x80000008) {
- AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
- PhysicalAddressBits = (UINT8)RegEax;
- } else {
- PhysicalAddressBits = 36;
- }
+ PhysicalAddressBits = GetPhysicalAddressBits (NULL, NULL);
}
return PhysicalAddressBits;
diff --git a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c
index 8419a4e32acb..1017f0316093 100644
--- a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c
+++ b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c
@@ -42,6 +42,7 @@
#include <Library/HobLib.h>
#include <Library/LockBoxLib.h>
#include <IndustryStandard/Acpi.h>
+#include <Library/UefiCpuLib.h>
/**
This macro aligns the address of a variable with auto storage
@@ -646,13 +647,7 @@ RestoreS3PageTables (
if (Hob != NULL) {
PhysicalAddressBits = ((EFI_HOB_CPU *)Hob)->SizeOfMemorySpace;
} else {
- AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
- if (RegEax >= 0x80000008) {
- AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
- PhysicalAddressBits = (UINT8)RegEax;
- } else {
- PhysicalAddressBits = 36;
- }
+ PhysicalAddressBits = GetPhysicalAddressBits (NULL, NULL);
}
//
diff --git a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c
index 0fed1e36918a..4378aa4f1d97 100644
--- a/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c
+++ b/UefiPayloadPkg/UefiPayloadEntry/UefiPayloadEntry.c
@@ -4,6 +4,7 @@
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
+#include <Library/UefiCpuLib.h>
#include "UefiPayloadEntry.h"
@@ -341,7 +342,6 @@ BuildGenericHob (
VOID
)
{
- UINT32 RegEax;
UINT8 PhysicalAddressBits;
EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute;
@@ -351,13 +351,7 @@ BuildGenericHob (
//
// Build CPU memory space and IO space hob
//
- AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
- if (RegEax >= 0x80000008) {
- AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
- PhysicalAddressBits = (UINT8)RegEax;
- } else {
- PhysicalAddressBits = 36;
- }
+ PhysicalAddressBits = GetPhysicalAddressBits(NULL, NULL);
BuildCpuHob (PhysicalAddressBits, 16);
diff --git a/UefiPayloadPkg/UefiPayloadEntry/X64/VirtualMemory.c b/UefiPayloadPkg/UefiPayloadEntry/X64/VirtualMemory.c
index ac0d58e685c8..c61aeeda7f2e 100644
--- a/UefiPayloadPkg/UefiPayloadEntry/X64/VirtualMemory.c
+++ b/UefiPayloadPkg/UefiPayloadEntry/X64/VirtualMemory.c
@@ -25,6 +25,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <PiPei.h>
#include <Library/BaseLib.h>
#include <Library/DebugLib.h>
+#include <Library/UefiCpuLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/PcdLib.h>
@@ -738,13 +739,7 @@ CreateIdentityMappingPageTables (
if (Hob != NULL) {
PhysicalAddressBits = ((EFI_HOB_CPU *)Hob)->SizeOfMemorySpace;
} else {
- AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
- if (RegEax >= 0x80000008) {
- AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
- PhysicalAddressBits = (UINT8)RegEax;
- } else {
- PhysicalAddressBits = 36;
- }
+ PhysicalAddressBits = GetPhysicalAddressBits (NULL, NULL);
}
//
diff --git a/EmulatorPkg/EmulatorPkg.dsc b/EmulatorPkg/EmulatorPkg.dsc
index 554c13ddb500..e33b98a4b682 100644
--- a/EmulatorPkg/EmulatorPkg.dsc
+++ b/EmulatorPkg/EmulatorPkg.dsc
@@ -78,6 +78,7 @@
HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf
DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf
UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
+ UefiCpuLib|UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf
PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf
DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
diff --git a/IntelFsp2Pkg/Library/BaseCacheLib/BaseCacheLib.inf b/IntelFsp2Pkg/Library/BaseCacheLib/BaseCacheLib.inf
index 9a513fb6df77..52a6e839d77e 100644
--- a/IntelFsp2Pkg/Library/BaseCacheLib/BaseCacheLib.inf
+++ b/IntelFsp2Pkg/Library/BaseCacheLib/BaseCacheLib.inf
@@ -21,6 +21,7 @@
[Packages]
MdePkg/MdePkg.dec
+ UefiCpuPkg/UefiCpuPkg.dec
IntelFsp2Pkg/IntelFsp2Pkg.dec
[LibraryClasses]
diff --git a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
index 19b8a4c8aefa..45808bcdcd6c 100644
--- a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
+++ b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
@@ -55,6 +55,7 @@
[Packages]
MdePkg/MdePkg.dec
+ UefiCpuPkg/UefiCpuPkg.dec
MdeModulePkg/MdeModulePkg.dec
[Packages.ARM, Packages.AARCH64]
@@ -75,6 +76,7 @@
DebugAgentLib
PeiServicesTablePointerLib
PerformanceLib
+ UefiCpuLib
[LibraryClasses.ARM, LibraryClasses.AARCH64]
ArmMmuLib
diff --git a/MdeModulePkg/MdeModulePkg.dsc b/MdeModulePkg/MdeModulePkg.dsc
index b1d83461865e..da6213c02da0 100644
--- a/MdeModulePkg/MdeModulePkg.dsc
+++ b/MdeModulePkg/MdeModulePkg.dsc
@@ -62,6 +62,7 @@
DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf
UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
VariablePolicyLib|MdeModulePkg/Library/VariablePolicyLib/VariablePolicyLib.inf
+ UefiCpuLib|UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf
#
# Generic Modules
#
diff --git a/MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf b/MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
index fb149c2f0271..2839dedaccbe 100644
--- a/MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
+++ b/MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
@@ -41,6 +41,7 @@
[Packages]
MdePkg/MdePkg.dec
+ UefiCpuPkg/UefiCpuPkg.dec
MdeModulePkg/MdeModulePkg.dec
[LibraryClasses]
diff --git a/StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.inf b/StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.inf
index b29d97a74607..94f7fbb1c4f7 100644
--- a/StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.inf
+++ b/StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.inf
@@ -43,12 +43,14 @@
[Packages]
MdePkg/MdePkg.dec
StandaloneMmPkg/StandaloneMmPkg.dec
+ UefiCpuPkg/UefiCpuPkg.dec
[LibraryClasses]
BaseMemoryLib
DebugLib
HobLib
MemoryAllocationLib
+ UefiCpuLib
[Guids]
gMmCoreDataHobGuid ## SOMETIMES_CONSUMES ## HOB
diff --git a/StandaloneMmPkg/StandaloneMmPkg.dsc b/StandaloneMmPkg/StandaloneMmPkg.dsc
index 8012f93b7dcc..41449046799f 100644
--- a/StandaloneMmPkg/StandaloneMmPkg.dsc
+++ b/StandaloneMmPkg/StandaloneMmPkg.dsc
@@ -59,6 +59,7 @@
StandaloneMmCoreEntryPoint|StandaloneMmPkg/Library/StandaloneMmCoreEntryPoint/StandaloneMmCoreEntryPoint.inf
StandaloneMmDriverEntryPoint|MdePkg/Library/StandaloneMmDriverEntryPoint/StandaloneMmDriverEntryPoint.inf
VariableMmDependency|StandaloneMmPkg/Library/VariableMmDependency/VariableMmDependency.inf
+ UefiCpuLib|UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf
[LibraryClasses.AARCH64, LibraryClasses.ARM]
ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
diff --git a/UefiCpuPkg/Include/Library/UefiCpuLib.h b/UefiCpuPkg/Include/Library/UefiCpuLib.h
index 0ff4a35774c1..dabed95ab38a 100644
--- a/UefiCpuPkg/Include/Library/UefiCpuLib.h
+++ b/UefiCpuPkg/Include/Library/UefiCpuLib.h
@@ -62,4 +62,21 @@ GetCpuSteppingId (
VOID
);
+/**
+ Get the physical address width supported by the processor.
+ @param[out] ValidAddressMask Bitmask with valid address bits set to
+ one; other bits are clear. Optional
+ parameter.
+ @param[out] ValidPageBaseAddressMask Bitmask with valid page base address
+ bits set to one; other bits are clear.
+ Optional parameter.
+ @return The physical address width supported by the processor.
+**/
+UINT8
+EFIAPI
+GetPhysicalAddressBits (
+ OUT UINT64 *ValidAddressMask OPTIONAL,
+ OUT UINT64 *ValidPageBaseAddressMask OPTIONAL
+ );
+
#endif
--
2.30.0.windows.2
^ permalink raw reply related [flat|nested] 2+ messages in thread* [PATCH v1 1/1] UefiCpuPackage: Add APIs for CPU physical address mask calculation
@ 2022-01-13 2:31 Yu Pu
0 siblings, 0 replies; 2+ messages in thread
From: Yu Pu @ 2022-01-13 2:31 UTC (permalink / raw)
To: devel; +Cc: Yu Pu, Eric Dong, Ray Ni
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3394
Firmware contains lots of code that deals with page table.These
code need the information of cpu physical address mask which
can be calculated from CPUID result.Today all these code implements
directly calls CPUID and calculates the address mask.
This bugzilla requests to add a new API as below so that all the
duplicated code can be removed.
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Yu Pu <yu.pu@intel.com>
---
UefiCpuPkg/CpuDxe/CpuDxe.c | 16 +------
UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c | 47 ++++++++++++++++++++
UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c | 9 +---
UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 9 +---
UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c | 9 +---
UefiCpuPkg/Include/Library/UefiCpuLib.h | 17 +++++++
6 files changed, 70 insertions(+), 37 deletions(-)
diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.c b/UefiCpuPkg/CpuDxe/CpuDxe.c
index 00f3cb09572c..8aca1bf72b4c 100644
--- a/UefiCpuPkg/CpuDxe/CpuDxe.c
+++ b/UefiCpuPkg/CpuDxe/CpuDxe.c
@@ -503,21 +503,7 @@ InitializeMtrrMask (
VOID
)
{
- UINT32 RegEax;
- UINT8 PhysicalAddressBits;
-
- AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
-
- if (RegEax >= 0x80000008) {
- AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
-
- PhysicalAddressBits = (UINT8)RegEax;
- } else {
- PhysicalAddressBits = 36;
- }
-
- mValidMtrrBitsMask = LShiftU64 (1, PhysicalAddressBits) - 1;
- mValidMtrrAddressMask = mValidMtrrBitsMask & 0xfffffffffffff000ULL;
+ GetPhysicalAddressBits(&mValidMtrrBitsMask, &mValidMtrrAddressMask);
}
/**
diff --git a/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c b/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c
index 5d925bc273f8..bb1343f3cd21 100644
--- a/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c
+++ b/UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.c
@@ -79,3 +79,50 @@ GetCpuSteppingId (
return (UINT8)Eax.Bits.SteppingId;
}
+
+/**
+ Get the physical address width supported by the processor.
+ @param[out] ValidAddressMask Bitmask with valid address bits set to
+ one; other bits are clear. Optional
+ parameter.
+ @param[out] ValidPageBaseAddressMask Bitmask with valid page base address
+ bits set to one; other bits are clear.
+ Optional parameter.
+ @return The physical address width supported by the processor.
+**/
+UINT8
+EFIAPI
+GetPhysicalAddressBits (
+ OUT UINT64 *ValidAddressMask OPTIONAL,
+ OUT UINT64 *ValidPageBaseAddressMask OPTIONAL
+ )
+{
+ UINT32 MaxExtendedFunction;
+ CPUID_VIR_PHY_ADDRESS_SIZE_EAX VirPhyAddressSize;
+ UINT64 AddressMask;
+ UINT64 PageBaseAddressMask;
+
+ AsmCpuid (CPUID_EXTENDED_FUNCTION, &MaxExtendedFunction, NULL, NULL, NULL);
+ if (MaxExtendedFunction >= CPUID_VIR_PHY_ADDRESS_SIZE) {
+ AsmCpuid (
+ CPUID_VIR_PHY_ADDRESS_SIZE,
+ &VirPhyAddressSize.Uint32,
+ NULL,
+ NULL,
+ NULL
+ );
+ } else {
+ VirPhyAddressSize.Bits.PhysicalAddressBits = 36;
+ }
+
+ AddressMask = LShiftU64 (1, VirPhyAddressSize.Bits.PhysicalAddressBits) - 1;
+ PageBaseAddressMask = AddressMask & ~(UINT64)0xFFF;
+
+ if (ValidAddressMask != NULL) {
+ *ValidAddressMask = AddressMask;
+ }
+ if (ValidPageBaseAddressMask != NULL) {
+ *ValidPageBaseAddressMask = PageBaseAddressMask;
+ }
+ return (UINT8)VirPhyAddressSize.Bits.PhysicalAddressBits;
+}
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c
index 4e8f897f5e9c..ec7cd4013132 100644
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c
+++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c
@@ -15,6 +15,7 @@
#include <Library/UefiBootServicesTableLib.h>
#include <Library/SmmServicesTableLib.h>
#include <Library/TpmMeasurementLib.h>
+#include <Library/UefiCpuLib.h>
#include <Register/Intel/Cpuid.h>
#include <Register/Intel/ArchitecturalMsr.h>
#include <Register/Intel/SmramSaveStateMap.h>
@@ -330,13 +331,7 @@ SmmCpuFeaturesInstallSmiHandler (
if (Hob != NULL) {
Psd->PhysicalAddressBits = ((EFI_HOB_CPU *)Hob)->SizeOfMemorySpace;
} else {
- AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
- if (RegEax >= 0x80000008) {
- AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
- Psd->PhysicalAddressBits = (UINT8)RegEax;
- } else {
- Psd->PhysicalAddressBits = 36;
- }
+ Psd->PhysicalAddressBits = GetPhysicalAddressBits (NULL, NULL);
}
if (!mStmConfigurationTableInitialized) {
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
index 538394f23910..de1385a86948 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
@@ -194,7 +194,6 @@ CalculateMaximumSupportAddress (
VOID
)
{
- UINT32 RegEax;
UINT8 PhysicalAddressBits;
VOID *Hob;
@@ -205,13 +204,7 @@ CalculateMaximumSupportAddress (
if (Hob != NULL) {
PhysicalAddressBits = ((EFI_HOB_CPU *)Hob)->SizeOfMemorySpace;
} else {
- AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
- if (RegEax >= 0x80000008) {
- AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
- PhysicalAddressBits = (UINT8)RegEax;
- } else {
- PhysicalAddressBits = 36;
- }
+ PhysicalAddressBits = GetPhysicalAddressBits (NULL, NULL);
}
return PhysicalAddressBits;
diff --git a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c
index 8419a4e32acb..1017f0316093 100644
--- a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c
+++ b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c
@@ -42,6 +42,7 @@
#include <Library/HobLib.h>
#include <Library/LockBoxLib.h>
#include <IndustryStandard/Acpi.h>
+#include <Library/UefiCpuLib.h>
/**
This macro aligns the address of a variable with auto storage
@@ -646,13 +647,7 @@ RestoreS3PageTables (
if (Hob != NULL) {
PhysicalAddressBits = ((EFI_HOB_CPU *)Hob)->SizeOfMemorySpace;
} else {
- AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
- if (RegEax >= 0x80000008) {
- AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
- PhysicalAddressBits = (UINT8)RegEax;
- } else {
- PhysicalAddressBits = 36;
- }
+ PhysicalAddressBits = GetPhysicalAddressBits (NULL, NULL);
}
//
diff --git a/UefiCpuPkg/Include/Library/UefiCpuLib.h b/UefiCpuPkg/Include/Library/UefiCpuLib.h
index 0ff4a35774c1..dabed95ab38a 100644
--- a/UefiCpuPkg/Include/Library/UefiCpuLib.h
+++ b/UefiCpuPkg/Include/Library/UefiCpuLib.h
@@ -62,4 +62,21 @@ GetCpuSteppingId (
VOID
);
+/**
+ Get the physical address width supported by the processor.
+ @param[out] ValidAddressMask Bitmask with valid address bits set to
+ one; other bits are clear. Optional
+ parameter.
+ @param[out] ValidPageBaseAddressMask Bitmask with valid page base address
+ bits set to one; other bits are clear.
+ Optional parameter.
+ @return The physical address width supported by the processor.
+**/
+UINT8
+EFIAPI
+GetPhysicalAddressBits (
+ OUT UINT64 *ValidAddressMask OPTIONAL,
+ OUT UINT64 *ValidPageBaseAddressMask OPTIONAL
+ );
+
#endif
--
2.30.0.windows.2
^ permalink raw reply related [flat|nested] 2+ messages in thread
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