From: "Brijesh Singh" <brijesh.singh@amd.com>
To: <devel@edk2.groups.io>
Cc: James Bottomley <jejb@linux.ibm.com>, Min Xu <min.m.xu@intel.com>,
"Jiewen Yao" <jiewen.yao@intel.com>,
Tom Lendacky <thomas.lendacky@amd.com>,
"Jordan Justen" <jordan.l.justen@intel.com>,
Ard Biesheuvel <ardb+tianocore@kernel.org>,
Erdem Aktas <erdemaktas@google.com>,
"Michael Roth" <Michael.Roth@amd.com>,
Gerd Hoffmann <kraxel@redhat.com>,
Brijesh Singh <brijesh.singh@amd.com>
Subject: [PATCH 2/2] OvmfPkg/BaseMemEncryptLib: use the SEV_STATUS MSR value from workarea
Date: Wed, 19 Jan 2022 17:03:32 -0600 [thread overview]
Message-ID: <20220119230332.44888-3-brijesh.singh@amd.com> (raw)
In-Reply-To: <20220119230332.44888-1-brijesh.singh@amd.com>
Improve the MemEncryptSev{Es,Snp}IsEnabled() to use the SEV_STATUS MSR
value saved in the workarea. Since workarea is valid until the PEI phase,
so, for the Dxe phase use the PcdConfidentialComputingGuestAttr to
determine which SEV technology is enabled.
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
---
.../DxeMemEncryptSevLib.inf | 1 +
.../PeiMemEncryptSevLib.inf | 1 +
.../SecMemEncryptSevLib.inf | 1 +
.../DxeMemEncryptSevLibInternal.c | 142 ++++++++----------
.../PeiMemEncryptSevLibInternal.c | 139 ++++++-----------
.../SecMemEncryptSevLibInternal.c | 80 +++++-----
6 files changed, 150 insertions(+), 214 deletions(-)
diff --git a/OvmfPkg/Library/BaseMemEncryptSevLib/DxeMemEncryptSevLib.inf b/OvmfPkg/Library/BaseMemEncryptSevLib/DxeMemEncryptSevLib.inf
index f613bb314f5f..35b7d519d938 100644
--- a/OvmfPkg/Library/BaseMemEncryptSevLib/DxeMemEncryptSevLib.inf
+++ b/OvmfPkg/Library/BaseMemEncryptSevLib/DxeMemEncryptSevLib.inf
@@ -58,3 +58,4 @@ [FeaturePcd]
[Pcd]
gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask
+ gEfiMdePkgTokenSpaceGuid.PcdConfidentialComputingGuestAttr
diff --git a/OvmfPkg/Library/BaseMemEncryptSevLib/PeiMemEncryptSevLib.inf b/OvmfPkg/Library/BaseMemEncryptSevLib/PeiMemEncryptSevLib.inf
index 50c83859d7e7..714da3323765 100644
--- a/OvmfPkg/Library/BaseMemEncryptSevLib/PeiMemEncryptSevLib.inf
+++ b/OvmfPkg/Library/BaseMemEncryptSevLib/PeiMemEncryptSevLib.inf
@@ -58,6 +58,7 @@ [FeaturePcd]
[FixedPcd]
gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaBase
+ gUefiOvmfPkgTokenSpaceGuid.PcdOvmfWorkAreaBase
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecValidatedEnd
diff --git a/OvmfPkg/Library/BaseMemEncryptSevLib/SecMemEncryptSevLib.inf b/OvmfPkg/Library/BaseMemEncryptSevLib/SecMemEncryptSevLib.inf
index 939af0a91ea4..284e5acc1177 100644
--- a/OvmfPkg/Library/BaseMemEncryptSevLib/SecMemEncryptSevLib.inf
+++ b/OvmfPkg/Library/BaseMemEncryptSevLib/SecMemEncryptSevLib.inf
@@ -52,3 +52,4 @@ [LibraryClasses]
[FixedPcd]
gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaBase
+ gUefiOvmfPkgTokenSpaceGuid.PcdOvmfWorkAreaBase
diff --git a/OvmfPkg/Library/BaseMemEncryptSevLib/DxeMemEncryptSevLibInternal.c b/OvmfPkg/Library/BaseMemEncryptSevLib/DxeMemEncryptSevLibInternal.c
index 15fcd5529587..25768daf5467 100644
--- a/OvmfPkg/Library/BaseMemEncryptSevLib/DxeMemEncryptSevLibInternal.c
+++ b/OvmfPkg/Library/BaseMemEncryptSevLib/DxeMemEncryptSevLibInternal.c
@@ -16,83 +16,77 @@
#include <Register/Amd/Msr.h>
#include <Register/Cpuid.h>
#include <Uefi/UefiBaseType.h>
-
-STATIC BOOLEAN mSevStatus = FALSE;
-STATIC BOOLEAN mSevEsStatus = FALSE;
-STATIC BOOLEAN mSevSnpStatus = FALSE;
-STATIC BOOLEAN mSevStatusChecked = FALSE;
+#include <ConfidentialComputingGuestAttr.h>
STATIC UINT64 mSevEncryptionMask = 0;
STATIC BOOLEAN mSevEncryptionMaskSaved = FALSE;
/**
- Reads and sets the status of SEV features.
+ The function check if the specified Attr is set.
- **/
+ @param[in] CurrentAttr The current attribute.
+ @param[in] Attr The attribute to check.
+
+ @retval TRUE The specified Attr is set.
+ @retval FALSE The specified Attr is not set.
+
+**/
+STATIC
+BOOLEAN
+AmdMemEncryptionAttrCheck (
+ IN UINT64 CurrentAttr,
+ IN CONFIDENTIAL_COMPUTING_GUEST_ATTR Attr
+ )
+{
+ switch (Attr) {
+ case CCAttrAmdSev:
+ //
+ // SEV is automatically enabled if SEV-ES or SEV-SNP is active.
+ //
+ return CurrentAttr >= CCAttrAmdSev;
+ case CCAttrAmdSevEs:
+ //
+ // SEV-ES is automatically enabled if SEV-SNP is active.
+ //
+ return CurrentAttr >= CCAttrAmdSevEs;
+ case CCAttrAmdSevSnp:
+ return CurrentAttr == CCAttrAmdSevSnp;
+ default:
+ return FALSE;
+ }
+}
+
+/**
+ Check if the specified confidential computing attribute is active.
+
+ @param[in] Attr The attribute to check.
+
+ @retval TRUE The specified Attr is active.
+ @retval FALSE The specified Attr is not active.
+
+**/
STATIC
-VOID
+BOOLEAN
EFIAPI
-InternalMemEncryptSevStatus (
- VOID
+ConfidentialComputingGuestHas (
+ IN CONFIDENTIAL_COMPUTING_GUEST_ATTR Attr
)
{
- UINT32 RegEax;
- MSR_SEV_STATUS_REGISTER Msr;
- CPUID_MEMORY_ENCRYPTION_INFO_EAX Eax;
- BOOLEAN ReadSevMsr;
- UINT64 EncryptionMask;
-
- ReadSevMsr = FALSE;
-
- EncryptionMask = PcdGet64 (PcdPteMemoryEncryptionAddressOrMask);
- if (EncryptionMask != 0) {
- //
- // The MSR has been read before, so it is safe to read it again and avoid
- // having to validate the CPUID information.
- //
- ReadSevMsr = TRUE;
- } else {
- //
- // Check if memory encryption leaf exist
- //
- AsmCpuid (CPUID_EXTENDED_FUNCTION, &RegEax, NULL, NULL, NULL);
- if (RegEax >= CPUID_MEMORY_ENCRYPTION_INFO) {
- //
- // CPUID Fn8000_001F[EAX] Bit 1 (Sev supported)
- //
- AsmCpuid (CPUID_MEMORY_ENCRYPTION_INFO, &Eax.Uint32, NULL, NULL, NULL);
-
- if (Eax.Bits.SevBit) {
- ReadSevMsr = TRUE;
- }
- }
- }
-
- if (ReadSevMsr) {
- //
- // Check MSR_0xC0010131 Bit 0 (Sev Enabled)
- //
- Msr.Uint32 = AsmReadMsr32 (MSR_SEV_STATUS);
- if (Msr.Bits.SevBit) {
- mSevStatus = TRUE;
- }
-
- //
- // Check MSR_0xC0010131 Bit 1 (Sev-Es Enabled)
- //
- if (Msr.Bits.SevEsBit) {
- mSevEsStatus = TRUE;
- }
-
- //
- // Check MSR_0xC0010131 Bit 2 (Sev-Snp Enabled)
- //
- if (Msr.Bits.SevSnpBit) {
- mSevSnpStatus = TRUE;
- }
+ UINT64 CurrentAttr;
+
+ //
+ // Get the current CC attribute.
+ //
+ CurrentAttr = PcdGet64 (PcdConfidentialComputingGuestAttr);
+
+ //
+ // If attr is for the AMD group then call AMD specific checks.
+ //
+ if (((RShiftU64 (CurrentAttr, 8)) & 0xff) == 1) {
+ return AmdMemEncryptionAttrCheck (CurrentAttr, Attr);
}
- mSevStatusChecked = TRUE;
+ return (CurrentAttr == Attr);
}
/**
@@ -107,11 +101,7 @@ MemEncryptSevSnpIsEnabled (
VOID
)
{
- if (!mSevStatusChecked) {
- InternalMemEncryptSevStatus ();
- }
-
- return mSevSnpStatus;
+ return ConfidentialComputingGuestHas (CCAttrAmdSevSnp);
}
/**
@@ -126,11 +116,7 @@ MemEncryptSevEsIsEnabled (
VOID
)
{
- if (!mSevStatusChecked) {
- InternalMemEncryptSevStatus ();
- }
-
- return mSevEsStatus;
+ return ConfidentialComputingGuestHas (CCAttrAmdSevEs);
}
/**
@@ -145,11 +131,7 @@ MemEncryptSevIsEnabled (
VOID
)
{
- if (!mSevStatusChecked) {
- InternalMemEncryptSevStatus ();
- }
-
- return mSevStatus;
+ return ConfidentialComputingGuestHas (CCAttrAmdSev);
}
/**
diff --git a/OvmfPkg/Library/BaseMemEncryptSevLib/PeiMemEncryptSevLibInternal.c b/OvmfPkg/Library/BaseMemEncryptSevLib/PeiMemEncryptSevLibInternal.c
index d68ff08c3ea6..3f8f91a5da12 100644
--- a/OvmfPkg/Library/BaseMemEncryptSevLib/PeiMemEncryptSevLibInternal.c
+++ b/OvmfPkg/Library/BaseMemEncryptSevLib/PeiMemEncryptSevLibInternal.c
@@ -17,82 +17,51 @@
#include <Register/Cpuid.h>
#include <Uefi/UefiBaseType.h>
-STATIC BOOLEAN mSevStatus = FALSE;
-STATIC BOOLEAN mSevEsStatus = FALSE;
-STATIC BOOLEAN mSevSnpStatus = FALSE;
-STATIC BOOLEAN mSevStatusChecked = FALSE;
+/**
+ Read the workarea to determine whether SEV is enabled. If enabled,
+ then return the SevEsWorkArea pointer.
+
+ **/
+STATIC
+SEC_SEV_ES_WORK_AREA *
+EFIAPI
+GetSevEsWorkArea (
+ VOID
+ )
+{
+ OVMF_WORK_AREA *WorkArea;
+
+ WorkArea = (OVMF_WORK_AREA *)FixedPcdGet32 (PcdOvmfWorkAreaBase);
+
+ //
+ // If its not SEV guest then SevEsWorkArea is not valid.
+ //
+ if ((WorkArea == NULL) || (WorkArea->Header.GuestType != GUEST_TYPE_AMD_SEV)) {
+ return NULL;
+ }
-STATIC UINT64 mSevEncryptionMask = 0;
-STATIC BOOLEAN mSevEncryptionMaskSaved = FALSE;
+ return (SEC_SEV_ES_WORK_AREA *)FixedPcdGet32 (PcdSevEsWorkAreaBase);
+}
/**
- Reads and sets the status of SEV features.
+ Read the SEV Status MSR value from the workarea
**/
STATIC
-VOID
+UINT32
EFIAPI
InternalMemEncryptSevStatus (
VOID
)
{
- UINT32 RegEax;
- MSR_SEV_STATUS_REGISTER Msr;
- CPUID_MEMORY_ENCRYPTION_INFO_EAX Eax;
- BOOLEAN ReadSevMsr;
- SEC_SEV_ES_WORK_AREA *SevEsWorkArea;
+ SEC_SEV_ES_WORK_AREA *SevEsWorkArea;
- ReadSevMsr = FALSE;
-
- SevEsWorkArea = (SEC_SEV_ES_WORK_AREA *)FixedPcdGet32 (PcdSevEsWorkAreaBase);
- if ((SevEsWorkArea != NULL) && (SevEsWorkArea->EncryptionMask != 0)) {
- //
- // The MSR has been read before, so it is safe to read it again and avoid
- // having to validate the CPUID information.
- //
- ReadSevMsr = TRUE;
- } else {
- //
- // Check if memory encryption leaf exist
- //
- AsmCpuid (CPUID_EXTENDED_FUNCTION, &RegEax, NULL, NULL, NULL);
- if (RegEax >= CPUID_MEMORY_ENCRYPTION_INFO) {
- //
- // CPUID Fn8000_001F[EAX] Bit 1 (Sev supported)
- //
- AsmCpuid (CPUID_MEMORY_ENCRYPTION_INFO, &Eax.Uint32, NULL, NULL, NULL);
-
- if (Eax.Bits.SevBit) {
- ReadSevMsr = TRUE;
- }
- }
- }
-
- if (ReadSevMsr) {
- //
- // Check MSR_0xC0010131 Bit 0 (Sev Enabled)
- //
- Msr.Uint32 = AsmReadMsr32 (MSR_SEV_STATUS);
- if (Msr.Bits.SevBit) {
- mSevStatus = TRUE;
- }
-
- //
- // Check MSR_0xC0010131 Bit 1 (Sev-Es Enabled)
- //
- if (Msr.Bits.SevEsBit) {
- mSevEsStatus = TRUE;
- }
-
- //
- // Check MSR_0xC0010131 Bit 2 (Sev-Snp Enabled)
- //
- if (Msr.Bits.SevSnpBit) {
- mSevSnpStatus = TRUE;
- }
+ SevEsWorkArea = GetSevEsWorkArea ();
+ if (SevEsWorkArea == NULL) {
+ return 0;
}
- mSevStatusChecked = TRUE;
+ return (UINT32)(UINTN)SevEsWorkArea->SevStatusMsrValue;
}
/**
@@ -107,11 +76,11 @@ MemEncryptSevSnpIsEnabled (
VOID
)
{
- if (!mSevStatusChecked) {
- InternalMemEncryptSevStatus ();
- }
+ MSR_SEV_STATUS_REGISTER Msr;
- return mSevSnpStatus;
+ Msr.Uint32 = InternalMemEncryptSevStatus ();
+
+ return Msr.Bits.SevSnpBit ? TRUE : FALSE;
}
/**
@@ -126,11 +95,11 @@ MemEncryptSevEsIsEnabled (
VOID
)
{
- if (!mSevStatusChecked) {
- InternalMemEncryptSevStatus ();
- }
+ MSR_SEV_STATUS_REGISTER Msr;
- return mSevEsStatus;
+ Msr.Uint32 = InternalMemEncryptSevStatus ();
+
+ return Msr.Bits.SevEsBit ? TRUE : FALSE;
}
/**
@@ -145,11 +114,11 @@ MemEncryptSevIsEnabled (
VOID
)
{
- if (!mSevStatusChecked) {
- InternalMemEncryptSevStatus ();
- }
+ MSR_SEV_STATUS_REGISTER Msr;
- return mSevStatus;
+ Msr.Uint32 = InternalMemEncryptSevStatus ();
+
+ return Msr.Bits.SevBit ? TRUE : FALSE;
}
/**
@@ -163,24 +132,12 @@ MemEncryptSevGetEncryptionMask (
VOID
)
{
- if (!mSevEncryptionMaskSaved) {
- SEC_SEV_ES_WORK_AREA *SevEsWorkArea;
+ SEC_SEV_ES_WORK_AREA *SevEsWorkArea;
- SevEsWorkArea = (SEC_SEV_ES_WORK_AREA *)FixedPcdGet32 (PcdSevEsWorkAreaBase);
- if (SevEsWorkArea != NULL) {
- mSevEncryptionMask = SevEsWorkArea->EncryptionMask;
- } else {
- CPUID_MEMORY_ENCRYPTION_INFO_EBX Ebx;
-
- //
- // CPUID Fn8000_001F[EBX] Bit 0:5 (memory encryption bit position)
- //
- AsmCpuid (CPUID_MEMORY_ENCRYPTION_INFO, NULL, &Ebx.Uint32, NULL, NULL);
- mSevEncryptionMask = LShiftU64 (1, Ebx.Bits.PtePosBits);
- }
-
- mSevEncryptionMaskSaved = TRUE;
+ SevEsWorkArea = GetSevEsWorkArea ();
+ if (SevEsWorkArea == NULL) {
+ return 0;
}
- return mSevEncryptionMask;
+ return SevEsWorkArea->EncryptionMask;
}
diff --git a/OvmfPkg/Library/BaseMemEncryptSevLib/SecMemEncryptSevLibInternal.c b/OvmfPkg/Library/BaseMemEncryptSevLib/SecMemEncryptSevLibInternal.c
index 5d912b2a4a5e..80aceba01bcf 100644
--- a/OvmfPkg/Library/BaseMemEncryptSevLib/SecMemEncryptSevLibInternal.c
+++ b/OvmfPkg/Library/BaseMemEncryptSevLib/SecMemEncryptSevLibInternal.c
@@ -18,7 +18,33 @@
#include <Uefi/UefiBaseType.h>
/**
- Reads and sets the status of SEV features.
+ Read the workarea to determine whether SEV is enabled. If enabled,
+ then return the SevEsWorkArea pointer.
+
+ **/
+STATIC
+SEC_SEV_ES_WORK_AREA *
+EFIAPI
+GetSevEsWorkArea (
+ VOID
+ )
+{
+ OVMF_WORK_AREA *WorkArea;
+
+ WorkArea = (OVMF_WORK_AREA *)FixedPcdGet32 (PcdOvmfWorkAreaBase);
+
+ //
+ // If its not SEV guest then SevEsWorkArea is not valid.
+ //
+ if ((WorkArea == NULL) || (WorkArea->Header.GuestType != GUEST_TYPE_AMD_SEV)) {
+ return NULL;
+ }
+
+ return (SEC_SEV_ES_WORK_AREA *)FixedPcdGet32 (PcdSevEsWorkAreaBase);
+}
+
+/**
+ Read the SEV Status MSR value from the workarea
**/
STATIC
@@ -28,38 +54,14 @@ InternalMemEncryptSevStatus (
VOID
)
{
- UINT32 RegEax;
- CPUID_MEMORY_ENCRYPTION_INFO_EAX Eax;
- BOOLEAN ReadSevMsr;
- SEC_SEV_ES_WORK_AREA *SevEsWorkArea;
+ SEC_SEV_ES_WORK_AREA *SevEsWorkArea;
- ReadSevMsr = FALSE;
-
- SevEsWorkArea = (SEC_SEV_ES_WORK_AREA *)FixedPcdGet32 (PcdSevEsWorkAreaBase);
- if ((SevEsWorkArea != NULL) && (SevEsWorkArea->EncryptionMask != 0)) {
- //
- // The MSR has been read before, so it is safe to read it again and avoid
- // having to validate the CPUID information.
- //
- ReadSevMsr = TRUE;
- } else {
- //
- // Check if memory encryption leaf exist
- //
- AsmCpuid (CPUID_EXTENDED_FUNCTION, &RegEax, NULL, NULL, NULL);
- if (RegEax >= CPUID_MEMORY_ENCRYPTION_INFO) {
- //
- // CPUID Fn8000_001F[EAX] Bit 1 (Sev supported)
- //
- AsmCpuid (CPUID_MEMORY_ENCRYPTION_INFO, &Eax.Uint32, NULL, NULL, NULL);
-
- if (Eax.Bits.SevBit) {
- ReadSevMsr = TRUE;
- }
- }
+ SevEsWorkArea = GetSevEsWorkArea ();
+ if (SevEsWorkArea == NULL) {
+ return 0;
}
- return ReadSevMsr ? AsmReadMsr32 (MSR_SEV_STATUS) : 0;
+ return (UINT32)(UINTN)SevEsWorkArea->SevStatusMsrValue;
}
/**
@@ -130,22 +132,14 @@ MemEncryptSevGetEncryptionMask (
VOID
)
{
- CPUID_MEMORY_ENCRYPTION_INFO_EBX Ebx;
- SEC_SEV_ES_WORK_AREA *SevEsWorkArea;
- UINT64 EncryptionMask;
+ SEC_SEV_ES_WORK_AREA *SevEsWorkArea;
- SevEsWorkArea = (SEC_SEV_ES_WORK_AREA *)FixedPcdGet32 (PcdSevEsWorkAreaBase);
- if (SevEsWorkArea != NULL) {
- EncryptionMask = SevEsWorkArea->EncryptionMask;
- } else {
- //
- // CPUID Fn8000_001F[EBX] Bit 0:5 (memory encryption bit position)
- //
- AsmCpuid (CPUID_MEMORY_ENCRYPTION_INFO, NULL, &Ebx.Uint32, NULL, NULL);
- EncryptionMask = LShiftU64 (1, Ebx.Bits.PtePosBits);
+ SevEsWorkArea = GetSevEsWorkArea ();
+ if (SevEsWorkArea == NULL) {
+ return 0;
}
- return EncryptionMask;
+ return SevEsWorkArea->EncryptionMask;
}
/**
--
2.25.1
next prev parent reply other threads:[~2022-01-19 23:03 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-19 23:03 [PATCH 0/2] SEV BaseMemEncryptLib cleanup Brijesh Singh
2022-01-19 23:03 ` [PATCH 1/2] OvmfPkg/ResetVector: cache the SEV status MSR value in workarea Brijesh Singh
2022-01-19 23:03 ` Brijesh Singh [this message]
2022-01-21 8:04 ` [PATCH 0/2] SEV BaseMemEncryptLib cleanup Gerd Hoffmann
2022-01-25 22:09 ` [edk2-devel] " Brijesh Singh
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