From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by mx.groups.io with SMTP id smtpd.web08.9952.1642759788865526336 for ; Fri, 21 Jan 2022 02:09:49 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@redhat.com header.s=mimecast20190719 header.b=L0hJK2C6; spf=pass (domain: redhat.com, ip: 170.10.133.124, mailfrom: kraxel@redhat.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1642759788; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=Mh5GHzxt6SDHuNxu4Rdx/dUlRkLlJ31iMAiGbnYBCQQ=; b=L0hJK2C6KKuOBsckg4Pr+bIUm0/aW75eluqb2ZAMqBuLZfv4aNHj2rqQRitWLVXBfrC6Ac lMP/u5BC8ATgqj+zUuD6x6dz9XuwM+AIsf1N0+crlTumrr7AUt8XLaRHWFJx19k5tv2twE FvU5tnNGAHsLlM3kXuenWYASzAeV6/Y= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-364-TjlXWYSlMVWNgtrok3X9yg-1; Fri, 21 Jan 2022 05:09:46 -0500 X-MC-Unique: TjlXWYSlMVWNgtrok3X9yg-1 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 847F218B62A3; Fri, 21 Jan 2022 10:09:45 +0000 (UTC) Received: from sirius.home.kraxel.org (unknown [10.39.193.47]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 246A7753C2; Fri, 21 Jan 2022 10:09:45 +0000 (UTC) Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id 92625180009C; Fri, 21 Jan 2022 11:09:43 +0100 (CET) Date: Fri, 21 Jan 2022 11:09:43 +0100 From: "Gerd Hoffmann" To: Nicolas Ojeda Leon Cc: devel@edk2.groups.io, atugup@amazon.com, Alexander Graf Subject: Re: [PATCH v2 1/8] OvmfPkg/Library: Create base HardwareInfoLib for PCI Host Bridges Message-ID: <20220121100943.7p5ych6kgki2v6g5@sirius.home.kraxel.org> References: MIME-Version: 1.0 In-Reply-To: X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=kraxel@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Thu, Jan 20, 2022 at 06:10:14PM +0100, Nicolas Ojeda Leon wrote: > Create the Hardware Info library base together with the specifics to > describe PCI Host Bridges. > > The Hardware Info library is intended to be used for disclosing > non-discoverable hardware information from the host to the guest in > Ovmf platforms. Core functionality will provide the possibility to > parse information from a generic BLOB into runtime structures. The > library is conceived in a generic way so that further hardware > elements can also be described using it. For such purpose the length > of the BLOB is not restricted but instead regarded as a sequence of > header-info elements that allow the parsing during runtime. The first > type of hardware defined will be PCI host bridges, providing the > possibility to define multiple and specify the resources each of them > can use. This enables the guest firmware to configure PCI resources > properly. Having the size of each individual element favors the reuse > of a single interface to convey descriptions of an arbitrary number > of heterogenous hardware elements. Furthermore, flexible access > mechanisms coupled with the size will grant the possibility of > interpreting them in a single run. > > Define the base types of the generic Hardware Info library to parse > heterogeneous data. Also provide the specific changes to support > PCI host bridges as the first hardware type supported by the > library. > Additionally, define the HOST_BRIDGE_INFO structure to describe PCI > host bridges along with the functionality to parse such information > into proper structures used by the PCI driver in a centralized manner > and taking care of versioning. > > As an example and motivation, the library will be used to define > multiple PCI host bridges for complex platforms that require it. > The first means of transportation that will be used is going to be > fw-cfg, over which a stream of bytes will be transferred and later > parsed by the hardware info library. Accordingly, the PCI driver > will make use of these host bridges definitions to populate the > list of Root Bridges and proceed with the configuration and discovery > of underlying hardware components. > > As mentioned before, the binary data to be parsed by the Hardware > Info library should be organized as a sequence of Header-element > pairs in which the header describes the type and size of the associated > element that comes right after it. As an illustration, to provide > inforation of 3 host bridges the data, conceptually, would look > like this: > > Header PCI Host Bridge (type and size) # 1 > PCI Host Bridge info # 1 > Header PCI Host Bridge (type and size) # 2 > PCI Host Bridge info # 2 > Header PCI Host Bridge (type and size) # 3 > PCI Host Bridge info # 3 > > Cc: Alexander Graf > Cc: Gerd Hoffmann > > Signed-off-by: Nicolas Ojeda Leon Acked-by: Gerd Hoffmann