From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from EUR03-AM5-obe.outbound.protection.outlook.com (EUR03-AM5-obe.outbound.protection.outlook.com [40.107.3.48]) by mx.groups.io with SMTP id smtpd.web11.9519.1642865253593956214 for ; Sat, 22 Jan 2022 07:27:34 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@armh.onmicrosoft.com header.s=selector2-armh-onmicrosoft-com header.b=wWwVnKYs; spf=pass (domain: arm.com, ip: 40.107.3.48, mailfrom: khasim.mohammed@arm.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=k6YSD2mpm+JOvvUSiKBaHnOFuTZtgwatWMtPeMcvFQM=; b=wWwVnKYsyHoHgWU8iDjZlF99oSi6T3qslj7c+bqsd1plwa/VQJOKQz61hCJRabSqdeebpAEHX+kXcpSjnrRMI4CfDKJAgfH3p5PojwNY7MtE+YOxuUJbjg/K5ipJApqrvAewFdcINUte6vmwTFqzrbQpM6JMuxN0DuuDv2gtaqo= Received: from AM6PR10CA0070.EURPRD10.PROD.OUTLOOK.COM (2603:10a6:209:80::47) by DBBPR08MB6281.eurprd08.prod.outlook.com (2603:10a6:10:1f6::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4909.11; Sat, 22 Jan 2022 15:27:30 +0000 Received: from VE1EUR03FT011.eop-EUR03.prod.protection.outlook.com (2603:10a6:209:80:cafe::ee) by AM6PR10CA0070.outlook.office365.com (2603:10a6:209:80::47) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4909.10 via Frontend Transport; Sat, 22 Jan 2022 15:27:30 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 63.35.35.123) smtp.mailfrom=arm.com; dkim=pass (signature was verified) header.d=armh.onmicrosoft.com;dmarc=pass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 63.35.35.123 as permitted sender) receiver=protection.outlook.com; client-ip=63.35.35.123; helo=64aa7808-outbound-1.mta.getcheckrecipient.com; Received: from 64aa7808-outbound-1.mta.getcheckrecipient.com (63.35.35.123) by VE1EUR03FT011.mail.protection.outlook.com (10.152.18.134) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4909.7 via Frontend Transport; Sat, 22 Jan 2022 15:27:29 +0000 Received: ("Tessian outbound 63bb5eb69ee8:v113"); Sat, 22 Jan 2022 15:27:29 +0000 X-CheckRecipientChecked: true X-CR-MTA-CID: 1b0a9b2c0da57f38 X-CR-MTA-TID: 64aa7808 Received: from 42c954c9feb7.1 by 64aa7808-outbound-1.mta.getcheckrecipient.com id 06E67E6E-CCBD-4838-B114-92198F989F33.1; Sat, 22 Jan 2022 15:27:19 +0000 Received: from EUR02-AM5-obe.outbound.protection.outlook.com by 64aa7808-outbound-1.mta.getcheckrecipient.com with ESMTPS id 42c954c9feb7.1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384); Sat, 22 Jan 2022 15:27:19 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=G+HYCSLXroVCBc+8PljHoJeVOOZ6ExafZvPSz8f/Es4Xewp5iuw0qXxW82mNu0YXgskOe6/gx4fzw94rbAkxAb1UyQOzI0mBb5knZxJ9s5VXSxSf+lEH2liZ3dlslKXiyHqCWeQsKdg+9M65oItlU9STGS/iDXHfqAU0bfK6QYsA5Ei4jKZh1Qdwzj57178h1KeaPyVRWfTOx6He+Gnrq5wPtoVsopAgP3/ZGh6eF3WSH1ZIJXhcyRIrkxwbitXrwQQFlW7wJstAnpb+45H6xvkkfG+yof2wYUS7QCbi0qvaT1JKeEfT9D1hWAhZ2bxmyDtHjU9/6hXqfYY6Coi+ug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=k6YSD2mpm+JOvvUSiKBaHnOFuTZtgwatWMtPeMcvFQM=; b=Vacie04d3I2oDfhzE5Bnkpv2BWs4vS8TQ6Tc8RSpH3lT2UNRPyJZLNMhZSaU8VQALAMZ0m8BTtTwXCuBDLLHTIzR+TV6GbQ24yp/GfpSRcU3Pt8v5x8qHSUFJwRVGxrXHvvMeCBa9RuIKXa0PpRbUXn7h/Ojn3kdMY6RwQrRqRHv6buNyFPx+6nkqHeAKSgHcuQRDf1i+RD5OaosHcxMg5niiCJcxOA0KnzND8cb3b9e625XcJCoOXyinrO5vyQjEpDov7vkpV4jJU5pfaWqEWA3lHtq2hex0wmA00lqyKJ7kcvp5Yc2tlduJdCjvpOFHipIkT1wZImi/GLN6HDR+w== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=none; dmarc=none; dkim=none; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=k6YSD2mpm+JOvvUSiKBaHnOFuTZtgwatWMtPeMcvFQM=; b=wWwVnKYsyHoHgWU8iDjZlF99oSi6T3qslj7c+bqsd1plwa/VQJOKQz61hCJRabSqdeebpAEHX+kXcpSjnrRMI4CfDKJAgfH3p5PojwNY7MtE+YOxuUJbjg/K5ipJApqrvAewFdcINUte6vmwTFqzrbQpM6JMuxN0DuuDv2gtaqo= Authentication-Results-Original: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=arm.com; Received: from PA4PR08MB5902.eurprd08.prod.outlook.com (2603:10a6:102:e0::10) by AM0PR08MB4579.eurprd08.prod.outlook.com (2603:10a6:208:108::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4909.12; Sat, 22 Jan 2022 15:27:16 +0000 Received: from PA4PR08MB5902.eurprd08.prod.outlook.com ([fe80::edb5:a2ea:773e:cb8]) by PA4PR08MB5902.eurprd08.prod.outlook.com ([fe80::edb5:a2ea:773e:cb8%7]) with mapi id 15.20.4909.014; Sat, 22 Jan 2022 15:27:16 +0000 From: "Khasim Mohammed" To: devel@edk2.groups.io Cc: nd@arm.com, sami.mujawar@arm.com, pierre.gondois@arm.com, Khasim Syed Mohammed Subject: [PATCH v6 2/4] Silicon/ARM/NeoverseN1Soc: Update PCDs to support multiple PCI root ports Date: Sat, 22 Jan 2022 20:56:13 +0530 Message-Id: <20220122152615.17366-3-khasim.mohammed@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220122152615.17366-1-khasim.mohammed@arm.com> References: <20220122152615.17366-1-khasim.mohammed@arm.com> X-ClientProxiedBy: PN0PR01CA0017.INDPRD01.PROD.OUTLOOK.COM (2603:1096:c01:4f::22) To PA4PR08MB5902.eurprd08.prod.outlook.com (2603:10a6:102:e0::10) MIME-Version: 1.0 X-MS-Office365-Filtering-Correlation-Id: 15917051-4e3d-4352-a56d-08d9ddbbb40c X-MS-TrafficTypeDiagnostic: AM0PR08MB4579:EE_|VE1EUR03FT011:EE_|DBBPR08MB6281:EE_ X-Microsoft-Antispam-PRVS: x-checkrecipientrouted: true NoDisclaimer: true X-MS-Oob-TLC-OOBClassifiers: OLM:6430;OLM:6430; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: VxrorWS7SMMAPTLkntOO2T992FtRO2SAVOP7hLozNMikeKD2Ku+xiwZKga/JuJMu/X9Y9D05nNeVHxlpm+IDW56LtXUXvTbS7H84SGo7R+jIvn6H90f18Eyl9vK/NbZ/VoiprJSZqcJUut6YXmmnt/LnDmg+07D40JbDtmVtSEkxGHeLxgHtomyXfvGyhkC1a6KbTXu8EPrRsR5sfTwBrEUZTaM1HhTpYK96VksdBLK/y6IPifzK5xB+gyKjEdwhB1Ra5vpDbHDmditO3AkMNmpuELCuF7t2itmw5LXfbQjye0g5iwIQu7o4+hjPdeAsbF0spefSO+s4710BXhoHx3MephQ1zNc8x8PCyjAyBpGSO8Os3RNOcKFq+Yk+b/1G1SXesuENbKqbqruLpfa4RHTqvwtF0/72268bXCD+0K2ZkcYS/TnxIZWMnBpACPR88brvVV647Q9d9xkukQ/z1pzbdEGSoAdA9L3GcNrDK14MqXUUkV4gHXh43nA8LBOXOGfLPIPK7C26o8hm8uMkiyvZR4eU5NGKZQaliXK3aR0elgHaGExPgFcg0glgZ9kG/qC+1oYx2JWkgP/6NJiwPNA2+RVUOJ5ZaqFt+x4jm9S8z1bGaGHNo/DNXdiUQ/o8oW90paFbPGsVdTdEqTFNcj0WTAZlLVsp5A/G+hJ6TZGBD608JWpZ/Q+toj+uj8urfTEMuvicuxc9clp6CWphug== X-Forefront-Antispam-Report-Untrusted: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:PA4PR08MB5902.eurprd08.prod.outlook.com;PTR:;CAT:NONE;SFS:(4636009)(366004)(6506007)(186003)(36756003)(83380400001)(6666004)(8676002)(4326008)(5660300002)(6486002)(6916009)(316002)(6512007)(15650500001)(26005)(19627235002)(30864003)(508600001)(52116002)(2906002)(8936002)(66476007)(38350700002)(38100700002)(66556008)(1076003)(2616005)(66946007)(86362001);DIR:OUT;SFP:1101; X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR08MB4579 Original-Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=arm.com; Return-Path: Khasim.Mohammed@arm.com X-EOPAttributedMessage: 0 X-MS-Exchange-Transport-CrossTenantHeadersStripped: VE1EUR03FT011.eop-EUR03.prod.protection.outlook.com X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id-Prvs: 7d0c27ab-3794-4c2b-d3d4-08d9ddbbac01 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: iuFsZHAfZ4rUapGCfhHUf7vmJQRQgo9jepK1UlYCHD0YsouK+b5C3wL4BUst6nD5GnPANyiFWxQrsJT9X8VL3QE24+qKPaEE1OfOsnQyiF3YDYhDSeuGdIEpfQe3zkK6v18m5VU92GHaHuE/Mtaxx/KbPVddGAQb6kqar7QyapRZfbahkXeKy4OTXekZXscpL7cCiP6XN3VkW8KhL1IzWZd2B/V9GUeWfS91PHugsDZqyAawMt5rRYYMJ1o0ymxHJon1qarK+jfZBlUafbMZMWf9k3FlY48KQNu0pjwPXED7K2leiGhdDoMKeI2DmXebyJmSL4J83fe0yCVWQxJeT1YXgfqDLeeTuJEwOgNAmnnMCWphaODeDLhzRcvzysfSks7PyP9/oig1m+LsovU0xOiNeY3bEySkVusWnAxCzdB8JdJrw6EfNRGlVF/wyx77MsHBnEQ+iCtVsMuOOXwYtBbAV9lTCPFM+Y92ETR33C7CI1l/P3MtQEyn+0qghpj8+XUqgTd+Ckx+ll1oihb+ZymiAsU5KxSgmeoqm11sqPE8Hpbbsc2oFYir1KeTaT5pTwUXrrPiukNKRoL596s9kmpwmlLkR6KmzmWFQCnZo7ew5O4IzTd1xRZH+BeNzldMfL5J+Mx01gBaGl2gGlP4oUzhSDQMs99F9/GZ2AUDg8CyO/1JwSdWwut0j/D61/RjudoGmzKzsHO3oQl28tvTef1RJ10+27laXZ+cS+4M8eCZMUsIvApWMxhMT0MPrBdqY3bFqiONKexfUdZdILjO6Q== X-Forefront-Antispam-Report: CIP:63.35.35.123;CTRY:IE;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:64aa7808-outbound-1.mta.getcheckrecipient.com;PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com;CAT:NONE;SFS:(4636009)(36840700001)(40470700004)(46966006)(40460700003)(8936002)(8676002)(47076005)(508600001)(2906002)(82310400004)(15650500001)(6916009)(6666004)(4326008)(6486002)(26005)(186003)(19627235002)(336012)(6512007)(6506007)(70586007)(81166007)(1076003)(83380400001)(36756003)(86362001)(2616005)(30864003)(36860700001)(356005)(5660300002)(70206006)(316002);DIR:OUT;SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Jan 2022 15:27:29.7423 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 15917051-4e3d-4352-a56d-08d9ddbbb40c X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: VE1EUR03FT011.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBBPR08MB6281 Content-Type: text/plain PCD entries are updated to remove the hardcoded assignments and to add support for multiple PCI root ports. Signed-off-by: Khasim Syed Mohammed --- .../AslTables/SsdtPci.asl | 8 +-- .../AslTables/SsdtRemotePci.asl | 4 +- .../ConfigurationManager.c | 24 +++---- .../ConfigurationManagerDxe.inf | 18 ++++-- Platform/ARM/N1Sdp/N1SdpPlatform.dec | 8 --- Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 1 - .../Library/PlatformLib/PlatformLib.inf | 1 + .../Library/PlatformLib/PlatformLibMem.c | 4 +- Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec | 64 +++++++++++-------- 9 files changed, 71 insertions(+), 61 deletions(-) diff --git a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/AslTables/SsdtPci.asl b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/AslTables/SsdtPci.asl index cdbd42c154..9922673d0d 100644 --- a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/AslTables/SsdtPci.asl +++ b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/AslTables/SsdtPci.asl @@ -80,8 +80,8 @@ DefinitionBlock("SsdtPci.aml", "SSDT", 1, "ARMLTD", "N1Sdp", Device(PCI0) { Name (_HID, EISAID("PNP0A08")) // PCI Express Root Bridge Name (_CID, EISAID("PNP0A03")) // Compatible PCI Root Bridge - Name (_SEG, Zero) // PCI Segment Group number - Name (_BBN, Zero) // PCI Base Bus Number + Name (_SEG, FixedPcdGet32 (PcdPcieSegmentNumber)) // Segment Number + Name (_BBN, FixedPcdGet32 (PcdPcieBusBaseNumber)) // Bus Base Number Name (_CCA, 1) // Cache Coherency Attribute // Root Complex 0 @@ -166,8 +166,8 @@ DefinitionBlock("SsdtPci.aml", "SSDT", 1, "ARMLTD", "N1Sdp", Device(PCI1) { Name (_HID, EISAID("PNP0A08")) // PCI Express Root Bridge Name (_CID, EISAID("PNP0A03")) // Compatible PCI Root Bridge - Name (_SEG, 1) // PCI Segment Group number - Name (_BBN, Zero) // PCI Base Bus Number + Name (_SEG, FixedPcdGet32 (PcdCcixSegmentNumber)) // Segment Number + Name (_BBN, FixedPcdGet32 (PcdCcixBusBaseNumber)) // Bus Base Number Name (_CCA, 1) // Cache Coherency Attribute // Root Complex 1 diff --git a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/AslTables/SsdtRemotePci.asl b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/AslTables/SsdtRemotePci.asl index b6bec7c106..4c6e0c762f 100644 --- a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/AslTables/SsdtRemotePci.asl +++ b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/AslTables/SsdtRemotePci.asl @@ -76,8 +76,8 @@ DefinitionBlock("SsdtRemotePci.aml", "SSDT", 1, "ARMLTD", "N1Sdp", Device(PCI2) { Name (_HID, EISAID("PNP0A08")) // PCI Express Root Bridge Name (_CID, EISAID("PNP0A03")) // Compatible PCI Root Bridge - Name (_SEG, 2) // PCI Segment Group number - Name (_BBN, Zero) // PCI Base Bus Number + Name (_SEG, FixedPcdGet32 (PcdRemotePcieSegmentNumber)) // Segment Number + Name (_BBN, FixedPcdGet32 (PcdRemotePcieBusBaseNumber)) // BusBase Number Name (_CCA, 1) // Cache Coherency Attribute // Remote Root Complex 0 diff --git a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c index 9c91372c11..f50623ae3f 100644 --- a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c +++ b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c @@ -1047,24 +1047,24 @@ EDKII_PLATFORM_REPOSITORY_INFO N1sdpRepositoryInfo = { { // PCIe ECAM { - 0x70000000, // Base Address - 0x0, // Segment Group Number - 0x0, // Start Bus Number - 17 // End Bus Number + FixedPcdGet64 (PcdPcieExpressBaseAddress), // Base Address + FixedPcdGet32 (PcdPcieSegmentNumber), // Segment Group Number + FixedPcdGet32 (PcdPcieBusMin), // Start Bus Number + FixedPcdGet32 (PcdPcieBusMax) // End Bus Number }, // CCIX ECAM { - 0x68000000, // Base Address - 0x1, // Segment Group Number - 0x0, // Start Bus Number - 17 // End Bus Number + FixedPcdGet32 (PcdCcixExpressBaseAddress), // Base Address + FixedPcdGet32 (PcdCcixSegmentNumber), // Segment Group Number + FixedPcdGet32 (PcdCcixBusMin), // Start Bus Number + FixedPcdGet32 (PcdCcixBusMax) // End Bus Number }, //Remote Chip PCIe ECAM { - 0x40070000000, // Base Address - 0x2, // Segment Group Number - 0x0, // Start Bus Number - 17 // End Bus Number + FixedPcdGet64 (PcdRemotePcieBaseAddress), // Base Address + FixedPcdGet32 (PcdRemotePcieSegmentNumber), // Segment Group Number + FixedPcdGet32 (PcdRemotePcieBusMin), // Start Bus Number + FixedPcdGet32 (PcdRemotePcieBusMax) // End Bus Number } }, diff --git a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf index 027a4202ff..4f8e7f1302 100644 --- a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf +++ b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf @@ -76,8 +76,6 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate - gArmN1SdpTokenSpaceGuid.PcdPcieExpressBaseAddress - gArmNeoverseN1SocTokenSpaceGuid.PcdExtMemorySpace gArmNeoverseN1SocTokenSpaceGuid.PcdDramBlock2Base @@ -88,9 +86,11 @@ gArmTokenSpaceGuid.PcdSystemMemorySize #PCIe + gArmNeoverseN1SocTokenSpaceGuid.PcdPcieBusBaseNumber gArmNeoverseN1SocTokenSpaceGuid.PcdPcieBusCount gArmNeoverseN1SocTokenSpaceGuid.PcdPcieBusMax gArmNeoverseN1SocTokenSpaceGuid.PcdPcieBusMin + gArmNeoverseN1SocTokenSpaceGuid.PcdPcieExpressBaseAddress gArmNeoverseN1SocTokenSpaceGuid.PcdPcieIoBase gArmNeoverseN1SocTokenSpaceGuid.PcdPcieIoMaxBase gArmNeoverseN1SocTokenSpaceGuid.PcdPcieIoSize @@ -105,8 +105,10 @@ gArmNeoverseN1SocTokenSpaceGuid.PcdPcieMmio64Translation gArmNeoverseN1SocTokenSpaceGuid.PcdPcieRootPortConfigBaseAddress gArmNeoverseN1SocTokenSpaceGuid.PcdPcieRootPortConfigBaseSize + gArmNeoverseN1SocTokenSpaceGuid.PcdPcieSegmentNumber # CCIX + gArmNeoverseN1SocTokenSpaceGuid.PcdCcixBusBaseNumber gArmNeoverseN1SocTokenSpaceGuid.PcdCcixBusCount gArmNeoverseN1SocTokenSpaceGuid.PcdCcixBusMax gArmNeoverseN1SocTokenSpaceGuid.PcdCcixBusMin @@ -125,6 +127,7 @@ gArmNeoverseN1SocTokenSpaceGuid.PcdCcixMmio64Translation gArmNeoverseN1SocTokenSpaceGuid.PcdCcixRootPortConfigBaseAddress gArmNeoverseN1SocTokenSpaceGuid.PcdCcixRootPortConfigBaseSize + gArmNeoverseN1SocTokenSpaceGuid.PcdCcixSegmentNumber # Coresight gArmN1SdpTokenSpaceGuid.PcdCsComponentSize @@ -158,9 +161,14 @@ gArmN1SdpTokenSpaceGuid.PcdCsTpiuMaxBase # Remote PCIe - gArmN1SdpTokenSpaceGuid.PcdRemotePcieIoTranslation - gArmN1SdpTokenSpaceGuid.PcdRemotePcieMmio32Translation - gArmN1SdpTokenSpaceGuid.PcdRemotePcieMmio64Translation + gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieBaseAddress + gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieBusBaseNumber + gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieBusMax + gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieBusMin + gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieIoTranslation + gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieMmio32Translation + gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieMmio64Translation + gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieSegmentNumber [Depex] TRUE diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.dec b/Platform/ARM/N1Sdp/N1SdpPlatform.dec index 2ab6c20dcc..16937197b8 100644 --- a/Platform/ARM/N1Sdp/N1SdpPlatform.dec +++ b/Platform/ARM/N1Sdp/N1SdpPlatform.dec @@ -34,9 +34,6 @@ gArmN1SdpTokenSpaceGuid.PcdRamDiskBase|0x88000000|UINT32|0x00000001 gArmN1SdpTokenSpaceGuid.PcdRamDiskSize|0x18000000|UINT32|0x00000002 - # PCIe - gArmN1SdpTokenSpaceGuid.PcdPcieExpressBaseAddress|0x70000000|UINT32|0x00000007 - # External memory gArmNeoverseN1SocTokenSpaceGuid.PcdExtMemorySpace|0|UINT64|0x00000029 @@ -92,8 +89,3 @@ # unmapped reserved region results in a DECERR response. # gArmN1SdpTokenSpaceGuid.PcdCsComponentSize|0x1000|UINT32|0x00000049 - - # Remote Chip PCIe - gArmN1SdpTokenSpaceGuid.PcdRemotePcieIoTranslation|0x40075200000|UINT64|0x0000004A - gArmN1SdpTokenSpaceGuid.PcdRemotePcieMmio32Translation|0x40000000000|UINT64|0x0000004B - gArmN1SdpTokenSpaceGuid.PcdRemotePcieMmio64Translation|0x40000000000|UINT64|0x0000004C diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc index 7488bdc036..cb2049966c 100644 --- a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc +++ b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc @@ -127,7 +127,6 @@ gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x300C0000 # PCIe - gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x70000000 gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|24 gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSupport|FALSE diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf index 8e2154aadf..96e590cdd8 100644 --- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf +++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf @@ -43,6 +43,7 @@ gArmNeoverseN1SocTokenSpaceGuid.PcdExtMemorySpace gArmNeoverseN1SocTokenSpaceGuid.PcdPcieBusMax gArmNeoverseN1SocTokenSpaceGuid.PcdPcieBusMin + gArmNeoverseN1SocTokenSpaceGuid.PcdPcieExpressBaseAddress gArmNeoverseN1SocTokenSpaceGuid.PcdPcieMmio32Base gArmNeoverseN1SocTokenSpaceGuid.PcdPcieMmio32Size gArmNeoverseN1SocTokenSpaceGuid.PcdPcieMmio64Base diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c index 1c4a445c5e..339fa07b32 100644 --- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c +++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c @@ -115,8 +115,8 @@ ArmPlatformGetVirtualMemoryMap ( VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; // PCIe ECAM Configuration Space - VirtualMemoryTable[++Index].PhysicalBase = PcdGet64 (PcdPciExpressBaseAddress); - VirtualMemoryTable[Index].VirtualBase = PcdGet64 (PcdPciExpressBaseAddress); + VirtualMemoryTable[++Index].PhysicalBase = PcdGet64 (PcdPcieExpressBaseAddress); + VirtualMemoryTable[Index].VirtualBase = PcdGet64 (PcdPcieExpressBaseAddress); VirtualMemoryTable[Index].Length = (FixedPcdGet32 (PcdPcieBusMax) - FixedPcdGet32 (PcdPcieBusMin) + 1) * SIZE_1MB; diff --git a/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec b/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec index eea2d58402..d59f25a5b9 100644 --- a/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec +++ b/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec @@ -29,11 +29,11 @@ gArmNeoverseN1SocTokenSpaceGuid.PcdDramBlock2Base|0|UINT64|0x00000001 #PCIe - gArmNeoverseN1SocTokenSpaceGuid.PcdPcieRootPortConfigBaseAddress|0x60000000|UINT32|0x00000002 - gArmNeoverseN1SocTokenSpaceGuid.PcdPcieRootPortConfigBaseSize|0x00001000|UINT32|0x00000003 - gArmNeoverseN1SocTokenSpaceGuid.PcdPcieBusCount|18|UINT32|0x00000004 - gArmNeoverseN1SocTokenSpaceGuid.PcdPcieBusMax|17|UINT32|0x00000005 - gArmNeoverseN1SocTokenSpaceGuid.PcdPcieBusMin|0|UINT32|0x00000006 + gArmNeoverseN1SocTokenSpaceGuid.PcdPcieBusBaseNumber|0|UINT32|0x00000002 + gArmNeoverseN1SocTokenSpaceGuid.PcdPcieBusCount|18|UINT32|0x00000003 + gArmNeoverseN1SocTokenSpaceGuid.PcdPcieBusMax|17|UINT32|0x00000004 + gArmNeoverseN1SocTokenSpaceGuid.PcdPcieBusMin|0|UINT32|0x00000005 + gArmNeoverseN1SocTokenSpaceGuid.PcdPcieExpressBaseAddress|0x70000000|UINT64|0x00000006 gArmNeoverseN1SocTokenSpaceGuid.PcdPcieIoBase|0x0|UINT32|0x00000007 gArmNeoverseN1SocTokenSpaceGuid.PcdPcieIoMaxBase|0x001FFFF|UINT32|0x00000008 gArmNeoverseN1SocTokenSpaceGuid.PcdPcieIoSize|0x020000|UINT32|0x00000009 @@ -46,30 +46,40 @@ gArmNeoverseN1SocTokenSpaceGuid.PcdPcieMmio64MaxBase|0x28FFFFFFFF|UINT64|0x00000010 gArmNeoverseN1SocTokenSpaceGuid.PcdPcieMmio64Size|0x2000000000|UINT64|0x00000011 gArmNeoverseN1SocTokenSpaceGuid.PcdPcieMmio64Translation|0x0|UINT64|0x00000012 + gArmNeoverseN1SocTokenSpaceGuid.PcdPcieRootPortConfigBaseAddress|0x60000000|UINT32|0x00000013 + gArmNeoverseN1SocTokenSpaceGuid.PcdPcieRootPortConfigBaseSize|0x00001000|UINT32|0x00000014 + gArmNeoverseN1SocTokenSpaceGuid.PcdPcieSegmentNumber|0|UINT32|0x00000015 # CCIX - gArmNeoverseN1SocTokenSpaceGuid.PcdCcixBusCount|18|UINT32|0x00000016 - gArmNeoverseN1SocTokenSpaceGuid.PcdCcixBusMax|17|UINT32|0x00000017 - gArmNeoverseN1SocTokenSpaceGuid.PcdCcixBusMin|0|UINT32|0x00000018 - gArmNeoverseN1SocTokenSpaceGuid.PcdCcixExpressBaseAddress|0x68000000|UINT32|0x00000019 - gArmNeoverseN1SocTokenSpaceGuid.PcdCcixIoBase|0x0|UINT32|0x0000001A - gArmNeoverseN1SocTokenSpaceGuid.PcdCcixIoMaxBase|0x01FFFF|UINT32|0x0000001B - gArmNeoverseN1SocTokenSpaceGuid.PcdCcixIoSize|0x020000|UINT32|0x0000001C - gArmNeoverseN1SocTokenSpaceGuid.PcdCcixIoTranslation|0x6D200000|UINT32|0x00000001D - gArmNeoverseN1SocTokenSpaceGuid.PcdCcixMmio32Base|0x69200000|UINT32|0x0000001E - gArmNeoverseN1SocTokenSpaceGuid.PcdCcixMmio32MaxBase|0x6D1FFFFF|UINT32|0x00000001F - gArmNeoverseN1SocTokenSpaceGuid.PcdCcixMmio32Size|0x04000000|UINT32|0x00000020 - gArmNeoverseN1SocTokenSpaceGuid.PcdCcixMmio32Translation|0x0|UINT32|0x00000021 - gArmNeoverseN1SocTokenSpaceGuid.PcdCcixMmio64Base|0x2900000000|UINT64|0x00000022 - gArmNeoverseN1SocTokenSpaceGuid.PcdCcixMmio64MaxBase|0x48FFFFFFFF|UINT64|0x00000023 - gArmNeoverseN1SocTokenSpaceGuid.PcdCcixMmio64Size|0x2000000000|UINT64|0x00000024 - gArmNeoverseN1SocTokenSpaceGuid.PcdCcixMmio64Translation|0x0|UINT64|0x00000025 - gArmNeoverseN1SocTokenSpaceGuid.PcdCcixRootPortConfigBaseAddress|0x62000000|UINT32|0x00000026 - gArmNeoverseN1SocTokenSpaceGuid.PcdCcixRootPortConfigBaseSize|0x00001000|UINT32|0x00000027 + gArmNeoverseN1SocTokenSpaceGuid.PcdCcixBusBaseNumber|0|UINT32|0x00000016 + gArmNeoverseN1SocTokenSpaceGuid.PcdCcixBusCount|18|UINT32|0x00000017 + gArmNeoverseN1SocTokenSpaceGuid.PcdCcixBusMax|17|UINT32|0x00000018 + gArmNeoverseN1SocTokenSpaceGuid.PcdCcixBusMin|0|UINT32|0x00000019 + gArmNeoverseN1SocTokenSpaceGuid.PcdCcixExpressBaseAddress|0x68000000|UINT32|0x0000001A + gArmNeoverseN1SocTokenSpaceGuid.PcdCcixIoBase|0x0|UINT32|0x0000001B + gArmNeoverseN1SocTokenSpaceGuid.PcdCcixIoMaxBase|0x00FFFFFF|UINT32|0x0000001C + gArmNeoverseN1SocTokenSpaceGuid.PcdCcixIoSize|0x01000000|UINT32|0x0000001D + gArmNeoverseN1SocTokenSpaceGuid.PcdCcixIoTranslation|0x6D200000|UINT32|0x00000001E + gArmNeoverseN1SocTokenSpaceGuid.PcdCcixMmio32Base|0x69200000|UINT32|0x0000001F + gArmNeoverseN1SocTokenSpaceGuid.PcdCcixMmio32MaxBase|0x6D1FFFFF|UINT32|0x000000020 + gArmNeoverseN1SocTokenSpaceGuid.PcdCcixMmio32Size|0x04000000|UINT32|0x00000021 + gArmNeoverseN1SocTokenSpaceGuid.PcdCcixMmio32Translation|0x0|UINT32|0x00000022 + gArmNeoverseN1SocTokenSpaceGuid.PcdCcixMmio64Base|0x2900000000|UINT64|0x00000023 + gArmNeoverseN1SocTokenSpaceGuid.PcdCcixMmio64MaxBase|0x48FFFFFFFF|UINT64|0x00000024 + gArmNeoverseN1SocTokenSpaceGuid.PcdCcixMmio64Size|0x2000000000|UINT64|0x00000025 + gArmNeoverseN1SocTokenSpaceGuid.PcdCcixMmio64Translation|0x0|UINT64|0x00000026 + gArmNeoverseN1SocTokenSpaceGuid.PcdCcixRootPortConfigBaseAddress|0x62000000|UINT32|0x00000027 + gArmNeoverseN1SocTokenSpaceGuid.PcdCcixRootPortConfigBaseSize|0x00001000|UINT32|0x00000028 + gArmNeoverseN1SocTokenSpaceGuid.PcdCcixSegmentNumber|1|UINT32|0x00000029 - gArmNeoverseN1SocTokenSpaceGuid.PcdExtMemorySpace|0x40000000000|UINT64|0x00000029 + gArmNeoverseN1SocTokenSpaceGuid.PcdExtMemorySpace|0x40000000000|UINT64|0x00000030 # Remote Chip PCIe - gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieIoTranslation|0x40075200000|UINT64|0x0000004A - gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieMmio32Translation|0x40000000000|UINT64|0x0000004B - gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieMmio64Translation|0x40000000000|UINT64|0x0000004C + gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieBaseAddress|0x40070000000|UINT64|0x0000004A + gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieBusBaseNumber|0|UINT32|0x0000004B + gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieBusMax|17|UINT32|0x0000004C + gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieBusMin|0|UINT32|0x0000004D + gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieIoTranslation|0x40075200000|UINT64|0x0000004E + gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieMmio32Translation|0x40000000000|UINT64|0x0000004F + gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieMmio64Translation|0x40000000000|UINT64|0x00000050 + gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieSegmentNumber|2|UINT32|0x00000051 -- 2.17.1