From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mx.groups.io with SMTP id smtpd.web08.3852.1643092545833111567 for ; Mon, 24 Jan 2022 22:35:50 -0800 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=EJvY5P7I; spf=pass (domain: intel.com, ip: 192.55.52.151, mailfrom: min.m.xu@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1643092550; x=1674628550; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=dteOuF1nxDPgueQpYW6L0e0NN7OG4Bobh3300UCKz1c=; b=EJvY5P7IlorXeMP7ik1++RPlwORk2yZJq2scFMoX7KnoORBprwcuvlQF h0A+1m/CSMyX1OfK2NMNq0+l9f2qi9vkEKPmPMY/UWNmDJdi7RZbH6dNq 5NjgrWRc5GGpCUkrmv8be/yYF/yWfaqRth0mM0yGYsbv6Sux1Rn6N9JIP 20yMkPAXIX9ttzCQ+ZdKl+BHIi/9PMTbGHLH6whcAI8ncgA6cHj+j1xJo B+/WzpqIIoLMVpS9Cw9/GaNbO0JJpRIsDN7dA73A1lWgWZzEFVoGPuLqV 7wAu/iySR0dFWyLe3Dgz1SNZ5kDm6btYqLhIRTBsJoy9OfP9/0SCDOaNC Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10237"; a="226904822" X-IronPort-AV: E=Sophos;i="5.88,314,1635231600"; d="scan'208";a="226904822" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jan 2022 22:35:37 -0800 X-IronPort-AV: E=Sophos;i="5.88,314,1635231600"; d="scan'208";a="534592646" Received: from mxu9-mobl1.ccr.corp.intel.com ([10.238.0.72]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jan 2022 22:35:34 -0800 From: "Min Xu" To: devel@edk2.groups.io Cc: Min Xu , Ard Biesheuvel , Jordan Justen , Brijesh Singh , Erdem Aktas , James Bottomley , Jiewen Yao , Tom Lendacky , Gerd Hoffmann , Ray Ni Subject: [PATCH V2 02/10] UefiCpuPkg: Add PcdTdxWorkAreaBase Date: Tue, 25 Jan 2022 14:33:10 +0800 Message-Id: <20220125063318.862-3-min.m.xu@intel.com> X-Mailer: git-send-email 2.29.2.windows.2 In-Reply-To: <20220125063318.862-1-min.m.xu@intel.com> References: <20220125063318.862-1-min.m.xu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 Add PcdTdxWorkAreaBase to indicate the area of memory where the TDX work area block lives. Cc: Ard Biesheuvel Cc: Jordan Justen Cc: Brijesh Singh Cc: Erdem Aktas Cc: James Bottomley Cc: Jiewen Yao Cc: Tom Lendacky Cc: Gerd Hoffmann Cc: Ray Ni Signed-off-by: Min Xu --- UefiCpuPkg/UefiCpuPkg.dec | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec index 7de66fde674c..87cd20e0aa36 100644 --- a/UefiCpuPkg/UefiCpuPkg.dec +++ b/UefiCpuPkg/UefiCpuPkg.dec @@ -178,6 +178,10 @@ # @Prompt Configure the SEV-ES work area base gUefiCpuPkgTokenSpaceGuid.PcdSevEsWorkAreaSize|0x0|UINT32|0x30002006 + ## Area of memory where the TDX work area block lives. + # @Prompt Configure the TDX work area base + gUefiCpuPkgTokenSpaceGuid.PcdTdxWorkAreaBase|0x0|UINT32|0x30002007 + [PcdsFixedAtBuild, PcdsPatchableInModule] ## This value is the CPU Local APIC base address, which aligns the address on a 4-KByte boundary. # @Prompt Configure base address of CPU Local APIC -- 2.29.2.windows.2